PPCTargetMachine.cpp revision 551ccae044b0ff658fe629dd67edd5ffe75d10e8 
1//===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13#include "PowerPC.h"
14#include "PowerPCTargetMachine.h"
15#include "PowerPCFrameInfo.h"
16#include "PPC32TargetMachine.h"
17#include "PPC64TargetMachine.h"
18#include "PPC32JITInfo.h"
19#include "PPC64JITInfo.h"
20#include "llvm/Module.h"
21#include "llvm/PassManager.h"
22#include "llvm/CodeGen/IntrinsicLowering.h"
23#include "llvm/CodeGen/MachineFunction.h"
24#include "llvm/CodeGen/Passes.h"
25#include "llvm/Target/TargetOptions.h"
26#include "llvm/Target/TargetMachineRegistry.h"
27#include "llvm/Transforms/Scalar.h"
28#include "llvm/Support/CommandLine.h"
29#include <iostream>
30using namespace llvm;
31
32namespace llvm {
33  cl::opt<bool> AIX("aix",
34                    cl::desc("Generate AIX/xcoff instead of Darwin/MachO"),
35                    cl::Hidden);
36}
37
38namespace {
39  const std::string PPC32ID = "PowerPC/32bit";
40  const std::string PPC64ID = "PowerPC/64bit";
41
42  // Register the targets
43  RegisterTarget<PPC32TargetMachine>
44  X("ppc32", "  PowerPC 32-bit (experimental)");
45
46#if 0
47  RegisterTarget<PPC64TargetMachine>
48  Y("ppc64", "  PowerPC 64-bit (unimplemented)");
49#endif
50}
51
52PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name,
53                                           IntrinsicLowering *IL,
54                                           const TargetData &TD,
55                                           const PowerPCFrameInfo &TFI,
56                                           const PowerPCJITInfo &TJI)
57  : TargetMachine(name, IL, TD), FrameInfo(TFI), JITInfo(TJI)
58{}
59
60unsigned PowerPCTargetMachine::getJITMatchQuality() {
61#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
62  return 10;
63#else
64  return 0;
65#endif
66}
67
68/// addPassesToEmitAssembly - Add passes to the specified pass manager
69/// to implement a static compiler for this target.
70///
71bool PowerPCTargetMachine::addPassesToEmitAssembly(PassManager &PM,
72                                                   std::ostream &Out) {
73  bool LP64 = (0 != dynamic_cast<PPC64TargetMachine *>(this));
74
75  // FIXME: Implement efficient support for garbage collection intrinsics.
76  PM.add(createLowerGCPass());
77
78  // FIXME: Implement the invoke/unwind instructions!
79  PM.add(createLowerInvokePass());
80
81  // FIXME: Implement the switch instruction in the instruction selector!
82  PM.add(createLowerSwitchPass());
83
84  PM.add(createLowerConstantExpressionsPass());
85
86  // Make sure that no unreachable blocks are instruction selected.
87  PM.add(createUnreachableBlockEliminationPass());
88
89  if (LP64)
90    PM.add(createPPC64ISelSimple(*this));
91  else
92    PM.add(createPPC32ISelSimple(*this));
93
94  if (PrintMachineCode)
95    PM.add(createMachineFunctionPrinterPass(&std::cerr));
96
97  PM.add(createRegisterAllocator());
98
99  if (PrintMachineCode)
100    PM.add(createMachineFunctionPrinterPass(&std::cerr));
101
102  PM.add(createPrologEpilogCodeInserter());
103
104  // Must run branch selection immediately preceding the asm printer
105  PM.add(createPPCBranchSelectionPass());
106
107  if (AIX)
108    PM.add(createPPC64AsmPrinter(Out, *this));
109  else
110    PM.add(createPPC32AsmPrinter(Out, *this));
111
112  PM.add(createMachineCodeDeleter());
113  return false;
114}
115
116void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
117  // FIXME: Implement efficient support for garbage collection intrinsics.
118  PM.add(createLowerGCPass());
119
120  // FIXME: Implement the invoke/unwind instructions!
121  PM.add(createLowerInvokePass());
122
123  // FIXME: Implement the switch instruction in the instruction selector!
124  PM.add(createLowerSwitchPass());
125
126  PM.add(createLowerConstantExpressionsPass());
127
128  // Make sure that no unreachable blocks are instruction selected.
129  PM.add(createUnreachableBlockEliminationPass());
130
131  PM.add(createPPC32ISelSimple(TM));
132  PM.add(createRegisterAllocator());
133  PM.add(createPrologEpilogCodeInserter());
134}
135
136void PowerPCJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
137  assert(0 && "Cannot execute PowerPCJITInfo::replaceMachineCodeForFunction()");
138}
139
140void *PowerPCJITInfo::getJITStubForFunction(Function *F,
141                                            MachineCodeEmitter &MCE) {
142  assert(0 && "Cannot execute PowerPCJITInfo::getJITStubForFunction()");
143  return 0;
144}
145
146/// PowerPCTargetMachine ctor - Create an ILP32 architecture model
147///
148PPC32TargetMachine::PPC32TargetMachine(const Module &M, IntrinsicLowering *IL)
149  : PowerPCTargetMachine(PPC32ID, IL,
150                         TargetData(PPC32ID,false,4,4,4,4,4,4,2,1,4),
151                         PowerPCFrameInfo(*this, false), PPC32JITInfo(*this)) {}
152
153/// PPC64TargetMachine ctor - Create a LP64 architecture model
154///
155PPC64TargetMachine::PPC64TargetMachine(const Module &M, IntrinsicLowering *IL)
156  : PowerPCTargetMachine(PPC64ID, IL,
157                         TargetData(PPC64ID,false,8,4,4,4,4,4,2,1,4),
158                         PowerPCFrameInfo(*this, true), PPC64JITInfo(*this)) {}
159
160unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
161  if (M.getEndianness()  == Module::BigEndian &&
162      M.getPointerSize() == Module::Pointer32)
163    return 10;                                   // Direct match
164  else if (M.getEndianness() != Module::AnyEndianness ||
165           M.getPointerSize() != Module::AnyPointerSize)
166    return 0;                                    // Match for some other target
167
168  return getJITMatchQuality()/2;
169}
170
171unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
172  if (M.getEndianness()  == Module::BigEndian &&
173      M.getPointerSize() == Module::Pointer64)
174    return 10;                                   // Direct match
175  else if (M.getEndianness() != Module::AnyEndianness ||
176           M.getPointerSize() != Module::AnyPointerSize)
177    return 0;                                    // Match for some other target
178
179  return getJITMatchQuality()/2;
180}
181