PPCTargetMachine.cpp revision 5ffe38ef6ae3427b39b2d866ab8d1a73f9f69e56 
1//===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Top-level implementation for the PowerPC target.
11//
12//===----------------------------------------------------------------------===//
13
14#include "PPC.h"
15#include "PPCMCAsmInfo.h"
16#include "PPCTargetMachine.h"
17#include "llvm/PassManager.h"
18#include "llvm/Target/TargetOptions.h"
19#include "llvm/Target/TargetRegistry.h"
20#include "llvm/Support/FormattedStream.h"
21using namespace llvm;
22
23static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
24  Triple TheTriple(TT);
25  bool isPPC64 = TheTriple.getArch() == Triple::ppc64;
26  if (TheTriple.getOS() == Triple::Darwin)
27    return new PPCMCAsmInfoDarwin(isPPC64);
28  return new PPCLinuxMCAsmInfo(isPPC64);
29
30}
31
32extern "C" void LLVMInitializePowerPCTarget() {
33  // Register the targets
34  RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
35  RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
36
37  RegisterAsmInfoFn C(ThePPC32Target, createMCAsmInfo);
38  RegisterAsmInfoFn D(ThePPC64Target, createMCAsmInfo);
39
40  // Register the MC Code Emitter
41  TargetRegistry::RegisterCodeEmitter(ThePPC32Target, createPPCMCCodeEmitter);
42  TargetRegistry::RegisterCodeEmitter(ThePPC64Target, createPPCMCCodeEmitter);
43}
44
45
46PPCTargetMachine::PPCTargetMachine(const Target &T, const std::string &TT,
47                                   const std::string &FS, bool is64Bit)
48  : LLVMTargetMachine(T, TT),
49    Subtarget(TT, FS, is64Bit),
50    DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
51    FrameInfo(Subtarget), JITInfo(*this, is64Bit),
52    TLInfo(*this), TSInfo(*this),
53    InstrItins(Subtarget.getInstrItineraryData()) {
54
55  if (getRelocationModel() == Reloc::Default) {
56    if (Subtarget.isDarwin())
57      setRelocationModel(Reloc::DynamicNoPIC);
58    else
59      setRelocationModel(Reloc::Static);
60  }
61}
62
63/// Override this for PowerPC.  Tail merging happily breaks up instruction issue
64/// groups, which typically degrades performance.
65bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
66
67PPC32TargetMachine::PPC32TargetMachine(const Target &T, const std::string &TT,
68                                       const std::string &FS)
69  : PPCTargetMachine(T, TT, FS, false) {
70}
71
72
73PPC64TargetMachine::PPC64TargetMachine(const Target &T, const std::string &TT,
74                                       const std::string &FS)
75  : PPCTargetMachine(T, TT, FS, true) {
76}
77
78
79//===----------------------------------------------------------------------===//
80// Pass Pipeline Configuration
81//===----------------------------------------------------------------------===//
82
83bool PPCTargetMachine::addInstSelector(PassManagerBase &PM,
84                                       CodeGenOpt::Level OptLevel) {
85  // Install an instruction selector.
86  PM.add(createPPCISelDag(*this));
87  return false;
88}
89
90bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM,
91                                      CodeGenOpt::Level OptLevel) {
92  // Must run branch selection immediately preceding the asm printer.
93  PM.add(createPPCBranchSelectionPass());
94  return false;
95}
96
97bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
98                                      CodeGenOpt::Level OptLevel,
99                                      JITCodeEmitter &JCE) {
100  // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
101  // FIXME: This should be moved to TargetJITInfo!!
102  if (Subtarget.isPPC64()) {
103    // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
104    // instructions to materialize arbitrary global variable + function +
105    // constant pool addresses.
106    setRelocationModel(Reloc::PIC_);
107    // Temporary workaround for the inability of PPC64 JIT to handle jump
108    // tables.
109    DisableJumpTables = true;
110  } else {
111    setRelocationModel(Reloc::Static);
112  }
113
114  // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
115  // writing?
116  Subtarget.SetJITMode();
117
118  // Machine code emitter pass for PowerPC.
119  PM.add(createPPCJITCodeEmitterPass(*this, JCE));
120
121  return false;
122}
123