PPCTargetMachine.cpp revision 98a366d547772010e94609e4584489b3e5ce0043 
1//===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Top-level implementation for the PowerPC target.
11//
12//===----------------------------------------------------------------------===//
13
14#include "PPC.h"
15#include "PPCTargetAsmInfo.h"
16#include "PPCTargetMachine.h"
17#include "llvm/Module.h"
18#include "llvm/PassManager.h"
19#include "llvm/Target/TargetMachineRegistry.h"
20#include "llvm/Target/TargetOptions.h"
21#include "llvm/Support/raw_ostream.h"
22using namespace llvm;
23
24/// PowerPCTargetMachineModule - Note that this is used on hosts that
25/// cannot link in a library unless there are references into the
26/// library.  In particular, it seems that it is not possible to get
27/// things to work on Win32 without this.  Though it is unused, do not
28/// remove it.
29extern "C" int PowerPCTargetMachineModule;
30int PowerPCTargetMachineModule = 0;
31
32// Register the targets
33static RegisterTarget<PPC32TargetMachine>
34X("ppc32", "PowerPC 32");
35static RegisterTarget<PPC64TargetMachine>
36Y("ppc64", "PowerPC 64");
37
38// No assembler printer by default
39PPCTargetMachine::AsmPrinterCtorFn PPCTargetMachine::AsmPrinterCtor = 0;
40
41const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
42  if (Subtarget.isDarwin())
43    return new PPCDarwinTargetAsmInfo(*this);
44  else
45    return new PPCLinuxTargetAsmInfo(*this);
46}
47
48unsigned PPC32TargetMachine::getJITMatchQuality() {
49#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
50  if (sizeof(void*) == 4)
51    return 10;
52#endif
53  return 0;
54}
55unsigned PPC64TargetMachine::getJITMatchQuality() {
56#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
57  if (sizeof(void*) == 8)
58    return 10;
59#endif
60  return 0;
61}
62
63unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
64  // We strongly match "powerpc-*".
65  std::string TT = M.getTargetTriple();
66  if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
67    return 20;
68
69  // If the target triple is something non-powerpc, we don't match.
70  if (!TT.empty()) return 0;
71
72  if (M.getEndianness()  == Module::BigEndian &&
73      M.getPointerSize() == Module::Pointer32)
74    return 10;                                   // Weak match
75  else if (M.getEndianness() != Module::AnyEndianness ||
76           M.getPointerSize() != Module::AnyPointerSize)
77    return 0;                                    // Match for some other target
78
79  return getJITMatchQuality()/2;
80}
81
82unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
83  // We strongly match "powerpc64-*".
84  std::string TT = M.getTargetTriple();
85  if (TT.size() >= 10 && std::string(TT.begin(), TT.begin()+10) == "powerpc64-")
86    return 20;
87
88  if (M.getEndianness()  == Module::BigEndian &&
89      M.getPointerSize() == Module::Pointer64)
90    return 10;                                   // Weak match
91  else if (M.getEndianness() != Module::AnyEndianness ||
92           M.getPointerSize() != Module::AnyPointerSize)
93    return 0;                                    // Match for some other target
94
95  return getJITMatchQuality()/2;
96}
97
98
99PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
100                                   bool is64Bit)
101  : Subtarget(*this, M, FS, is64Bit),
102    DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
103    FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
104    InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
105
106  if (getRelocationModel() == Reloc::Default) {
107    if (Subtarget.isDarwin())
108      setRelocationModel(Reloc::DynamicNoPIC);
109    else
110      setRelocationModel(Reloc::Static);
111  }
112}
113
114/// Override this for PowerPC.  Tail merging happily breaks up instruction issue
115/// groups, which typically degrades performance.
116bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
117
118PPC32TargetMachine::PPC32TargetMachine(const Module &M, const std::string &FS)
119  : PPCTargetMachine(M, FS, false) {
120}
121
122
123PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS)
124  : PPCTargetMachine(M, FS, true) {
125}
126
127
128//===----------------------------------------------------------------------===//
129// Pass Pipeline Configuration
130//===----------------------------------------------------------------------===//
131
132bool PPCTargetMachine::addInstSelector(PassManagerBase &PM,
133                                       CodeGenOpt::Level OptLevel) {
134  // Install an instruction selector.
135  PM.add(createPPCISelDag(*this));
136  return false;
137}
138
139bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM,
140                                      CodeGenOpt::Level OptLevel) {
141  // Must run branch selection immediately preceding the asm printer.
142  PM.add(createPPCBranchSelectionPass());
143  return false;
144}
145
146bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
147                                          CodeGenOpt::Level OptLevel,
148                                          bool Verbose,
149                                          raw_ostream &Out) {
150  assert(AsmPrinterCtor && "AsmPrinter was not linked in");
151  if (AsmPrinterCtor)
152    PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose));
153
154  return false;
155}
156
157bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
158                                      CodeGenOpt::Level OptLevel,
159                                      bool DumpAsm, MachineCodeEmitter &MCE) {
160  // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
161  // FIXME: This should be moved to TargetJITInfo!!
162  if (Subtarget.isPPC64()) {
163    // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
164    // instructions to materialize arbitrary global variable + function +
165    // constant pool addresses.
166    setRelocationModel(Reloc::PIC_);
167    // Temporary workaround for the inability of PPC64 JIT to handle jump
168    // tables.
169    DisableJumpTables = true;
170  } else {
171    setRelocationModel(Reloc::Static);
172  }
173
174  // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
175  // writing?
176  Subtarget.SetJITMode();
177
178  // Machine code emitter pass for PowerPC.
179  PM.add(createPPCCodeEmitterPass(*this, MCE));
180  if (DumpAsm) {
181    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
182    if (AsmPrinterCtor)
183      PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
184  }
185
186  return false;
187}
188
189bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
190                                            CodeGenOpt::Level OptLevel,
191                                            bool DumpAsm, MachineCodeEmitter &MCE) {
192  // Machine code emitter pass for PowerPC.
193  PM.add(createPPCCodeEmitterPass(*this, MCE));
194  if (DumpAsm) {
195    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
196    if (AsmPrinterCtor)
197      PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
198  }
199
200  return false;
201}
202