PPCTargetMachine.cpp revision 9c543b2299b706c4ebc3fed6e5227e5930087ff8
1//===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// Top-level implementation for the PowerPC target. 11// 12//===----------------------------------------------------------------------===// 13 14#include "PPC.h" 15#include "PPCFrameInfo.h" 16#include "PPCTargetMachine.h" 17#include "PPCJITInfo.h" 18#include "llvm/Module.h" 19#include "llvm/PassManager.h" 20#include "llvm/Analysis/Verifier.h" 21#include "llvm/CodeGen/IntrinsicLowering.h" 22#include "llvm/CodeGen/MachineFunction.h" 23#include "llvm/CodeGen/Passes.h" 24#include "llvm/Target/TargetOptions.h" 25#include "llvm/Target/TargetMachineRegistry.h" 26#include "llvm/Transforms/Scalar.h" 27#include "llvm/Support/CommandLine.h" 28#include <iostream> 29using namespace llvm; 30 31namespace { 32 // Register the targets 33 RegisterTarget<PPCTargetMachine> 34 X("ppc32", " PowerPC"); 35} 36 37unsigned PPCTargetMachine::getJITMatchQuality() { 38#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) 39 return 10; 40#else 41 return 0; 42#endif 43} 44 45unsigned PPCTargetMachine::getModuleMatchQuality(const Module &M) { 46 // We strongly match "powerpc-*". 47 std::string TT = M.getTargetTriple(); 48 if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-") 49 return 20; 50 51 if (M.getEndianness() == Module::BigEndian && 52 M.getPointerSize() == Module::Pointer32) 53 return 10; // Weak match 54 else if (M.getEndianness() != Module::AnyEndianness || 55 M.getPointerSize() != Module::AnyPointerSize) 56 return 0; // Match for some other target 57 58 return getJITMatchQuality()/2; 59} 60 61PPCTargetMachine::PPCTargetMachine(const Module &M, IntrinsicLowering *IL, 62 const std::string &FS) 63: TargetMachine("PowerPC", IL, false, 4, 4, 4, 4, 4, 4, 2, 1, 1), 64 Subtarget(M, FS), FrameInfo(*this, false), JITInfo(*this), 65 TLInfo(*this), InstrItins(Subtarget.getInstrItineraryData()) { 66 if (TargetDefault == PPCTarget) { 67 if (Subtarget.isAIX()) PPCTarget = TargetAIX; 68 if (Subtarget.isDarwin()) PPCTarget = TargetDarwin; 69 } 70 if (getRelocationModel() == Reloc::Default) 71 if (Subtarget.isDarwin()) 72 setRelocationModel(Reloc::DynamicNoPIC); 73 else 74 setRelocationModel(Reloc::PIC); 75} 76 77/// addPassesToEmitFile - Add passes to the specified pass manager to implement 78/// a static compiler for this target. 79/// 80bool PPCTargetMachine::addPassesToEmitFile(PassManager &PM, 81 std::ostream &Out, 82 CodeGenFileType FileType, 83 bool Fast) { 84 if (FileType != TargetMachine::AssemblyFile) return true; 85 86 // Run loop strength reduction before anything else. 87 if (!Fast) PM.add(createLoopStrengthReducePass(1, &TLInfo)); 88 89 // FIXME: Implement efficient support for garbage collection intrinsics. 90 PM.add(createLowerGCPass()); 91 92 // FIXME: Implement the invoke/unwind instructions! 93 PM.add(createLowerInvokePass()); 94 95 // Clean up after other passes, e.g. merging critical edges. 96 if (!Fast) PM.add(createCFGSimplificationPass()); 97 98 // FIXME: Implement the switch instruction in the instruction selector! 99 PM.add(createLowerSwitchPass()); 100 101 // Make sure that no unreachable blocks are instruction selected. 102 PM.add(createUnreachableBlockEliminationPass()); 103 104 // Install an instruction selector. 105 PM.add(createPPCISelDag(*this)); 106 107 if (PrintMachineCode) 108 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 109 110 PM.add(createRegisterAllocator()); 111 112 if (PrintMachineCode) 113 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 114 115 PM.add(createPrologEpilogCodeInserter()); 116 117 // Must run branch selection immediately preceding the asm printer 118 PM.add(createPPCBranchSelectionPass()); 119 120 // Decide which asm printer to use. If the user has not specified one on 121 // the command line, choose whichever one matches the default (current host). 122 switch (PPCTarget) { 123 case TargetAIX: 124 PM.add(createAIXAsmPrinter(Out, *this)); 125 break; 126 case TargetDefault: 127 case TargetDarwin: 128 PM.add(createDarwinAsmPrinter(Out, *this)); 129 break; 130 } 131 132 PM.add(createMachineCodeDeleter()); 133 return false; 134} 135 136void PPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) { 137 // The JIT should use dynamic-no-pic relocation model. 138 TM.setRelocationModel(Reloc::DynamicNoPIC); 139 140 // Run loop strength reduction before anything else. 141 PM.add(createLoopStrengthReducePass(1, TM.getTargetLowering())); 142 143 // FIXME: Implement efficient support for garbage collection intrinsics. 144 PM.add(createLowerGCPass()); 145 146 // FIXME: Implement the invoke/unwind instructions! 147 PM.add(createLowerInvokePass()); 148 149 // Clean up after other passes, e.g. merging critical edges. 150 PM.add(createCFGSimplificationPass()); 151 152 // FIXME: Implement the switch instruction in the instruction selector! 153 PM.add(createLowerSwitchPass()); 154 155 // Make sure that no unreachable blocks are instruction selected. 156 PM.add(createUnreachableBlockEliminationPass()); 157 158 // Install an instruction selector. 159 PM.add(createPPCISelDag(TM)); 160 161 PM.add(createRegisterAllocator()); 162 PM.add(createPrologEpilogCodeInserter()); 163 164 // Must run branch selection immediately preceding the asm printer 165 PM.add(createPPCBranchSelectionPass()); 166 167 if (PrintMachineCode) 168 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 169} 170 171