PPCTargetMachine.cpp revision bf1118285c0f784b120a69b4a4207e15ef065ead
1//===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Top-level implementation for the PowerPC target.
11//
12//===----------------------------------------------------------------------===//
13
14#include "PPC.h"
15#include "PPCTargetAsmInfo.h"
16#include "PPCTargetMachine.h"
17#include "llvm/Module.h"
18#include "llvm/PassManager.h"
19#include "llvm/Target/TargetMachineRegistry.h"
20using namespace llvm;
21
22namespace {
23  // Register the targets
24  RegisterTarget<PPC32TargetMachine>
25  X("ppc32", "  PowerPC 32");
26  RegisterTarget<PPC64TargetMachine>
27  Y("ppc64", "  PowerPC 64");
28}
29
30const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
31  if (Subtarget.isDarwin())
32    return new DarwinTargetAsmInfo(*this);
33  else
34    return new LinuxTargetAsmInfo(*this);
35}
36
37unsigned PPC32TargetMachine::getJITMatchQuality() {
38#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
39  if (sizeof(void*) == 4)
40    return 10;
41#endif
42  return 0;
43}
44unsigned PPC64TargetMachine::getJITMatchQuality() {
45#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
46  if (sizeof(void*) == 8)
47    return 10;
48#endif
49  return 0;
50}
51
52unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
53  // We strongly match "powerpc-*".
54  std::string TT = M.getTargetTriple();
55  if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
56    return 20;
57
58  if (M.getEndianness()  == Module::BigEndian &&
59      M.getPointerSize() == Module::Pointer32)
60    return 10;                                   // Weak match
61  else if (M.getEndianness() != Module::AnyEndianness ||
62           M.getPointerSize() != Module::AnyPointerSize)
63    return 0;                                    // Match for some other target
64
65  return getJITMatchQuality()/2;
66}
67
68unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
69  // We strongly match "powerpc64-*".
70  std::string TT = M.getTargetTriple();
71  if (TT.size() >= 10 && std::string(TT.begin(), TT.begin()+10) == "powerpc64-")
72    return 20;
73
74  if (M.getEndianness()  == Module::BigEndian &&
75      M.getPointerSize() == Module::Pointer64)
76    return 10;                                   // Weak match
77  else if (M.getEndianness() != Module::AnyEndianness ||
78           M.getPointerSize() != Module::AnyPointerSize)
79    return 0;                                    // Match for some other target
80
81  return getJITMatchQuality()/2;
82}
83
84
85PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
86                                   bool is64Bit)
87  : Subtarget(*this, M, FS, is64Bit),
88    DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
89    FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
90    InstrItins(Subtarget.getInstrItineraryData()) {
91
92  if (getRelocationModel() == Reloc::Default)
93    if (Subtarget.isDarwin())
94      setRelocationModel(Reloc::DynamicNoPIC);
95    else
96      setRelocationModel(Reloc::Static);
97}
98
99PPC32TargetMachine::PPC32TargetMachine(const Module &M, const std::string &FS)
100  : PPCTargetMachine(M, FS, false) {
101}
102
103
104PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS)
105  : PPCTargetMachine(M, FS, true) {
106}
107
108
109//===----------------------------------------------------------------------===//
110// Pass Pipeline Configuration
111//===----------------------------------------------------------------------===//
112
113bool PPCTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
114  // Install an instruction selector.
115  PM.add(createPPCISelDag(*this));
116  return false;
117}
118
119bool PPCTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
120
121  // Must run branch selection immediately preceding the asm printer.
122  PM.add(createPPCBranchSelectionPass());
123  return false;
124}
125
126bool PPCTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
127                                          std::ostream &Out) {
128  PM.add(createPPCAsmPrinterPass(Out, *this));
129  return false;
130}
131
132bool PPCTargetMachine::addObjectWriter(FunctionPassManager &PM, bool Fast,
133                                       std::ostream &Out) {
134  // FIXME: support PPC ELF files at some point
135  addPPCMachOObjectWriterPass(PM, Out, *this);
136  return false;
137}
138
139bool PPCTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
140                                      MachineCodeEmitter &MCE) {
141  // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
142  // FIXME: This should be moved to TargetJITInfo!!
143  if (Subtarget.isPPC64()) {
144    // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
145    // instructions to materialize arbitrary global variable + function +
146    // constant pool addresses.
147    setRelocationModel(Reloc::PIC_);
148  } else {
149    setRelocationModel(Reloc::Static);
150  }
151
152  // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
153  // writing?
154  Subtarget.SetJITMode();
155
156  // Machine code emitter pass for PowerPC.
157  PM.add(createPPCCodeEmitterPass(*this, MCE));
158  return false;
159}
160
161