X86FloatingPoint.cpp revision cf00c4ab3ba308d45d98c5ccab87362cf802facb
1//===-- FloatingPoint.cpp - Floating point Reg -> Stack converter ---------===// 2// 3// This file defines the pass which converts floating point instructions from 4// virtual registers into register stack instructions. 5// 6//===----------------------------------------------------------------------===// 7 8#define DEBUG_TYPE "fp" 9#include "X86.h" 10#include "X86InstrInfo.h" 11#include "llvm/CodeGen/MachineFunctionPass.h" 12#include "llvm/CodeGen/MachineInstrBuilder.h" 13#include "llvm/CodeGen/LiveVariables.h" 14#include "llvm/Target/TargetInstrInfo.h" 15#include "llvm/Target/TargetMachine.h" 16#include "Support/Debug.h" 17#include "Support/Statistic.h" 18#include <algorithm> 19#include <iostream> 20 21namespace { 22 Statistic<> NumFXCH("x86-codegen", "Number of fxch instructions inserted"); 23 Statistic<> NumFP ("x86-codegen", "Number of floating point instructions"); 24 25 struct FPS : public MachineFunctionPass { 26 virtual bool runOnMachineFunction(MachineFunction &MF); 27 28 virtual const char *getPassName() const { return "X86 FP Stackifier"; } 29 30 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 31 AU.addRequired<LiveVariables>(); 32 MachineFunctionPass::getAnalysisUsage(AU); 33 } 34 private: 35 LiveVariables *LV; // Live variable info for current function... 36 MachineBasicBlock *MBB; // Current basic block 37 unsigned Stack[8]; // FP<n> Registers in each stack slot... 38 unsigned RegMap[8]; // Track which stack slot contains each register 39 unsigned StackTop; // The current top of the FP stack. 40 41 void dumpStack() const { 42 std::cerr << "Stack contents:"; 43 for (unsigned i = 0; i != StackTop; ++i) { 44 std::cerr << " FP" << Stack[i]; 45 assert(RegMap[Stack[i]] == i && "Stack[] doesn't match RegMap[]!"); 46 } 47 std::cerr << "\n"; 48 } 49 private: 50 // getSlot - Return the stack slot number a particular register number is 51 // in... 52 unsigned getSlot(unsigned RegNo) const { 53 assert(RegNo < 8 && "Regno out of range!"); 54 return RegMap[RegNo]; 55 } 56 57 // getStackEntry - Return the X86::FP<n> register in register ST(i) 58 unsigned getStackEntry(unsigned STi) const { 59 assert(STi < StackTop && "Access past stack top!"); 60 return Stack[StackTop-1-STi]; 61 } 62 63 // getSTReg - Return the X86::ST(i) register which contains the specified 64 // FP<RegNo> register 65 unsigned getSTReg(unsigned RegNo) const { 66 return StackTop - 1 - getSlot(RegNo) + X86::ST0; 67 } 68 69 // pushReg - Push the specifiex FP<n> register onto the stack 70 void pushReg(unsigned Reg) { 71 assert(Reg < 8 && "Register number out of range!"); 72 assert(StackTop < 8 && "Stack overflow!"); 73 Stack[StackTop] = Reg; 74 RegMap[Reg] = StackTop++; 75 } 76 77 bool isAtTop(unsigned RegNo) const { return getSlot(RegNo) == StackTop-1; } 78 void moveToTop(unsigned RegNo, MachineBasicBlock::iterator &I) { 79 if (!isAtTop(RegNo)) { 80 unsigned Slot = getSlot(RegNo); 81 unsigned STReg = getSTReg(RegNo); 82 unsigned RegOnTop = getStackEntry(0); 83 84 // Swap the slots the regs are in 85 std::swap(RegMap[RegNo], RegMap[RegOnTop]); 86 87 // Swap stack slot contents 88 assert(RegMap[RegOnTop] < StackTop); 89 std::swap(Stack[RegMap[RegOnTop]], Stack[StackTop-1]); 90 91 // Emit an fxch to update the runtime processors version of the state 92 MachineInstr *MI = BuildMI(X86::FXCH, 1).addReg(STReg); 93 I = 1+MBB->insert(I, MI); 94 NumFXCH++; 95 } 96 } 97 98 void duplicateToTop(unsigned RegNo, unsigned AsReg, 99 MachineBasicBlock::iterator &I) { 100 unsigned STReg = getSTReg(RegNo); 101 pushReg(AsReg); // New register on top of stack 102 103 MachineInstr *MI = BuildMI(X86::FLDrr, 1).addReg(STReg); 104 I = 1+MBB->insert(I, MI); 105 } 106 107 // popStackAfter - Pop the current value off of the top of the FP stack 108 // after the specified instruction. 109 void popStackAfter(MachineBasicBlock::iterator &I); 110 111 bool processBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB); 112 113 void handleZeroArgFP(MachineBasicBlock::iterator &I); 114 void handleOneArgFP(MachineBasicBlock::iterator &I); 115 void handleTwoArgFP(MachineBasicBlock::iterator &I); 116 void handleSpecialFP(MachineBasicBlock::iterator &I); 117 }; 118} 119 120FunctionPass *createX86FloatingPointStackifierPass() { return new FPS(); } 121 122/// runOnMachineFunction - Loop over all of the basic blocks, transforming FP 123/// register references into FP stack references. 124/// 125bool FPS::runOnMachineFunction(MachineFunction &MF) { 126 LV = &getAnalysis<LiveVariables>(); 127 StackTop = 0; 128 129 bool Changed = false; 130 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) 131 Changed |= processBasicBlock(MF, *I); 132 return Changed; 133} 134 135/// processBasicBlock - Loop over all of the instructions in the basic block, 136/// transforming FP instructions into their stack form. 137/// 138bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) { 139 const TargetInstrInfo &TII = MF.getTarget().getInstrInfo(); 140 bool Changed = false; 141 MBB = &BB; 142 143 for (MachineBasicBlock::iterator I = BB.begin(); I != BB.end(); ++I) { 144 MachineInstr *MI = *I; 145 MachineInstr *PrevMI = I == BB.begin() ? 0 : *(I-1); 146 unsigned Flags = TII.get(MI->getOpcode()).TSFlags; 147 148 if ((Flags & X86II::FPTypeMask) == 0) continue; // Ignore non-fp insts! 149 150 ++NumFP; // Keep track of # of pseudo instrs 151 DEBUG(std::cerr << "\nFPInst:\t"; 152 MI->print(std::cerr, MF.getTarget())); 153 154 // Get dead variables list now because the MI pointer may be deleted as part 155 // of processing! 156 LiveVariables::killed_iterator IB = LV->dead_begin(MI); 157 LiveVariables::killed_iterator IE = LV->dead_end(MI); 158 159 DEBUG(const MRegisterInfo *MRI = MF.getTarget().getRegisterInfo(); 160 LiveVariables::killed_iterator I = LV->killed_begin(MI); 161 LiveVariables::killed_iterator E = LV->killed_end(MI); 162 if (I != E) { 163 std::cerr << "Killed Operands:"; 164 for (; I != E; ++I) 165 std::cerr << " %" << MRI->getName(I->second); 166 std::cerr << "\n"; 167 }); 168 169 switch (Flags & X86II::FPTypeMask) { 170 case X86II::ZeroArgFP: handleZeroArgFP(I); break; 171 case X86II::OneArgFP: handleOneArgFP(I); break; 172 173 case X86II::OneArgFPRW: // ST(0) = fsqrt(ST(0)) 174 assert(0 && "FP instr type not handled yet!"); 175 176 case X86II::TwoArgFP: handleTwoArgFP(I); break; 177 case X86II::SpecialFP: handleSpecialFP(I); break; 178 default: assert(0 && "Unknown FP Type!"); 179 } 180 181 // Check to see if any of the values defined by this instruction are dead 182 // after definition. If so, pop them. 183 for (; IB != IE; ++IB) { 184 unsigned Reg = IB->second; 185 if (Reg >= X86::FP0 && Reg <= X86::FP6) { 186 DEBUG(std::cerr << "Register FP#" << Reg-X86::FP0 << " is dead!\n"); 187 ++I; // Insert fxch AFTER the instruction 188 moveToTop(Reg-X86::FP0, I); // Insert fxch if necessary 189 --I; // Move to fxch or old instruction 190 popStackAfter(I); // Pop the top of the stack, killing value 191 } 192 } 193 194 // Print out all of the instructions expanded to if -debug 195 DEBUG(if (*I == PrevMI) { 196 std::cerr<< "Just deleted pseudo instruction\n"; 197 } else { 198 MachineBasicBlock::iterator Start = I; 199 // Rewind to first instruction newly inserted. 200 while (Start != BB.begin() && *(Start-1) != PrevMI) --Start; 201 std::cerr << "Inserted instructions:\n\t"; 202 (*Start)->print(std::cerr, MF.getTarget()); 203 while (++Start != I+1); 204 } 205 dumpStack(); 206 ); 207 208 Changed = true; 209 } 210 211 assert(StackTop == 0 && "Stack not empty at end of basic block?"); 212 return Changed; 213} 214 215//===----------------------------------------------------------------------===// 216// Efficient Lookup Table Support 217//===----------------------------------------------------------------------===// 218 219struct TableEntry { 220 unsigned from; 221 unsigned to; 222 bool operator<(const TableEntry &TE) const { return from < TE.from; } 223 bool operator<(unsigned V) const { return from < V; } 224}; 225 226static bool TableIsSorted(const TableEntry *Table, unsigned NumEntries) { 227 for (unsigned i = 0; i != NumEntries-1; ++i) 228 if (!(Table[i] < Table[i+1])) return false; 229 return true; 230} 231 232static int Lookup(const TableEntry *Table, unsigned N, unsigned Opcode) { 233 const TableEntry *I = std::lower_bound(Table, Table+N, Opcode); 234 if (I != Table+N && I->from == Opcode) 235 return I->to; 236 return -1; 237} 238 239#define ARRAY_SIZE(TABLE) \ 240 (sizeof(TABLE)/sizeof(TABLE[0])) 241 242#ifdef NDEBUG 243#define ASSERT_SORTED(TABLE) 244#else 245#define ASSERT_SORTED(TABLE) \ 246 { static bool TABLE##Checked = false; \ 247 if (!TABLE##Checked) \ 248 assert(TableIsSorted(TABLE, ARRAY_SIZE(TABLE)) && \ 249 "All lookup tables must be sorted for efficient access!"); \ 250 } 251#endif 252 253 254//===----------------------------------------------------------------------===// 255// Helper Methods 256//===----------------------------------------------------------------------===// 257 258// PopTable - Sorted map of instructions to their popping version. The first 259// element is an instruction, the second is the version which pops. 260// 261static const TableEntry PopTable[] = { 262 { X86::FADDrST0 , X86::FADDPrST0 }, 263 264 { X86::FDIVRrST0, X86::FDIVRPrST0 }, 265 { X86::FDIVrST0 , X86::FDIVPrST0 }, 266 267 { X86::FISTr16 , X86::FISTPr16 }, 268 { X86::FISTr32 , X86::FISTPr32 }, 269 270 { X86::FMULrST0 , X86::FMULPrST0 }, 271 272 { X86::FSTr32 , X86::FSTPr32 }, 273 { X86::FSTr64 , X86::FSTPr64 }, 274 { X86::FSTrr , X86::FSTPrr }, 275 276 { X86::FSUBRrST0, X86::FSUBRPrST0 }, 277 { X86::FSUBrST0 , X86::FSUBPrST0 }, 278 279 { X86::FUCOMPr , X86::FUCOMPPr }, 280 { X86::FUCOMr , X86::FUCOMPr }, 281}; 282 283/// popStackAfter - Pop the current value off of the top of the FP stack after 284/// the specified instruction. This attempts to be sneaky and combine the pop 285/// into the instruction itself if possible. The iterator is left pointing to 286/// the last instruction, be it a new pop instruction inserted, or the old 287/// instruction if it was modified in place. 288/// 289void FPS::popStackAfter(MachineBasicBlock::iterator &I) { 290 ASSERT_SORTED(PopTable); 291 assert(StackTop > 0 && "Cannot pop empty stack!"); 292 RegMap[Stack[--StackTop]] = ~0; // Update state 293 294 // Check to see if there is a popping version of this instruction... 295 int Opcode = Lookup(PopTable, ARRAY_SIZE(PopTable), (*I)->getOpcode()); 296 if (Opcode != -1) { 297 (*I)->setOpcode(Opcode); 298 if (Opcode == X86::FUCOMPPr) 299 (*I)->RemoveOperand(0); 300 301 } else { // Insert an explicit pop 302 MachineInstr *MI = BuildMI(X86::FSTPrr, 1).addReg(X86::ST0); 303 I = MBB->insert(I+1, MI); 304 } 305} 306 307static unsigned getFPReg(const MachineOperand &MO) { 308 assert(MO.isPhysicalRegister() && "Expected an FP register!"); 309 unsigned Reg = MO.getReg(); 310 assert(Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!"); 311 return Reg - X86::FP0; 312} 313 314 315//===----------------------------------------------------------------------===// 316// Instruction transformation implementation 317//===----------------------------------------------------------------------===// 318 319/// handleZeroArgFP - ST(0) = fld0 ST(0) = flds <mem> 320// 321void FPS::handleZeroArgFP(MachineBasicBlock::iterator &I) { 322 MachineInstr *MI = *I; 323 unsigned DestReg = getFPReg(MI->getOperand(0)); 324 MI->RemoveOperand(0); // Remove the explicit ST(0) operand 325 326 // Result gets pushed on the stack... 327 pushReg(DestReg); 328} 329 330/// handleOneArgFP - fst ST(0), <mem> 331// 332void FPS::handleOneArgFP(MachineBasicBlock::iterator &I) { 333 MachineInstr *MI = *I; 334 assert(MI->getNumOperands() == 5 && "Can only handle fst* instructions!"); 335 336 unsigned Reg = getFPReg(MI->getOperand(4)); 337 bool KillsSrc = false; 338 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 339 E = LV->killed_end(MI); KI != E; ++KI) 340 KillsSrc |= KI->second == X86::FP0+Reg; 341 342 // FSTPr80 and FISTPr64 are strange because there are no non-popping versions. 343 // If we have one _and_ we don't want to pop the operand, duplicate the value 344 // on the stack instead of moving it. This ensure that popping the value is 345 // always ok. 346 // 347 if ((MI->getOpcode() == X86::FSTPr80 || 348 MI->getOpcode() == X86::FISTPr64) && !KillsSrc) { 349 duplicateToTop(Reg, 7 /*temp register*/, I); 350 } else { 351 moveToTop(Reg, I); // Move to the top of the stack... 352 } 353 MI->RemoveOperand(4); // Remove explicit ST(0) operand 354 355 if (MI->getOpcode() == X86::FSTPr80 || MI->getOpcode() == X86::FISTPr64) { 356 assert(StackTop > 0 && "Stack empty??"); 357 --StackTop; 358 } else if (KillsSrc) { // Last use of operand? 359 popStackAfter(I); 360 } 361} 362 363//===----------------------------------------------------------------------===// 364// Define tables of various ways to map pseudo instructions 365// 366 367// ForwardST0Table - Map: A = B op C into: ST(0) = ST(0) op ST(i) 368static const TableEntry ForwardST0Table[] = { 369 { X86::FpADD, X86::FADDST0r }, 370 { X86::FpDIV, X86::FDIVST0r }, 371 { X86::FpMUL, X86::FMULST0r }, 372 { X86::FpSUB, X86::FSUBST0r }, 373 { X86::FpUCOM, X86::FUCOMr }, 374}; 375 376// ReverseST0Table - Map: A = B op C into: ST(0) = ST(i) op ST(0) 377static const TableEntry ReverseST0Table[] = { 378 { X86::FpADD, X86::FADDST0r }, // commutative 379 { X86::FpDIV, X86::FDIVRST0r }, 380 { X86::FpMUL, X86::FMULST0r }, // commutative 381 { X86::FpSUB, X86::FSUBRST0r }, 382 { X86::FpUCOM, ~0 }, 383}; 384 385// ForwardSTiTable - Map: A = B op C into: ST(i) = ST(0) op ST(i) 386static const TableEntry ForwardSTiTable[] = { 387 { X86::FpADD, X86::FADDrST0 }, // commutative 388 { X86::FpDIV, X86::FDIVRrST0 }, 389 { X86::FpMUL, X86::FMULrST0 }, // commutative 390 { X86::FpSUB, X86::FSUBRrST0 }, 391 { X86::FpUCOM, X86::FUCOMr }, 392}; 393 394// ReverseSTiTable - Map: A = B op C into: ST(i) = ST(i) op ST(0) 395static const TableEntry ReverseSTiTable[] = { 396 { X86::FpADD, X86::FADDrST0 }, 397 { X86::FpDIV, X86::FDIVrST0 }, 398 { X86::FpMUL, X86::FMULrST0 }, 399 { X86::FpSUB, X86::FSUBrST0 }, 400 { X86::FpUCOM, ~0 }, 401}; 402 403 404/// handleTwoArgFP - Handle instructions like FADD and friends which are virtual 405/// instructions which need to be simplified and possibly transformed. 406/// 407/// Result: ST(0) = fsub ST(0), ST(i) 408/// ST(i) = fsub ST(0), ST(i) 409/// ST(0) = fsubr ST(0), ST(i) 410/// ST(i) = fsubr ST(0), ST(i) 411/// 412/// In addition to three address instructions, this also handles the FpUCOM 413/// instruction which only has two operands, but no destination. This 414/// instruction is also annoying because there is no "reverse" form of it 415/// available. 416/// 417void FPS::handleTwoArgFP(MachineBasicBlock::iterator &I) { 418 ASSERT_SORTED(ForwardST0Table); ASSERT_SORTED(ReverseST0Table); 419 ASSERT_SORTED(ForwardSTiTable); ASSERT_SORTED(ReverseSTiTable); 420 MachineInstr *MI = *I; 421 422 unsigned NumOperands = MI->getNumOperands(); 423 assert(NumOperands == 3 || 424 (NumOperands == 2 && MI->getOpcode() == X86::FpUCOM) && 425 "Illegal TwoArgFP instruction!"); 426 unsigned Dest = getFPReg(MI->getOperand(0)); 427 unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2)); 428 unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1)); 429 bool KillsOp0 = false, KillsOp1 = false; 430 431 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 432 E = LV->killed_end(MI); KI != E; ++KI) { 433 KillsOp0 |= (KI->second == X86::FP0+Op0); 434 KillsOp1 |= (KI->second == X86::FP0+Op1); 435 } 436 437 // If this is an FpUCOM instruction, we must make sure the first operand is on 438 // the top of stack, the other one can be anywhere... 439 if (MI->getOpcode() == X86::FpUCOM) 440 moveToTop(Op0, I); 441 442 unsigned TOS = getStackEntry(0); 443 444 // One of our operands must be on the top of the stack. If neither is yet, we 445 // need to move one. 446 if (Op0 != TOS && Op1 != TOS) { // No operand at TOS? 447 // We can choose to move either operand to the top of the stack. If one of 448 // the operands is killed by this instruction, we want that one so that we 449 // can update right on top of the old version. 450 if (KillsOp0) { 451 moveToTop(Op0, I); // Move dead operand to TOS. 452 TOS = Op0; 453 } else if (KillsOp1) { 454 moveToTop(Op1, I); 455 TOS = Op1; 456 } else { 457 // All of the operands are live after this instruction executes, so we 458 // cannot update on top of any operand. Because of this, we must 459 // duplicate one of the stack elements to the top. It doesn't matter 460 // which one we pick. 461 // 462 duplicateToTop(Op0, Dest, I); 463 Op0 = TOS = Dest; 464 KillsOp0 = true; 465 } 466 } else if (!KillsOp0 && !KillsOp1 && MI->getOpcode() != X86::FpUCOM) { 467 // If we DO have one of our operands at the top of the stack, but we don't 468 // have a dead operand, we must duplicate one of the operands to a new slot 469 // on the stack. 470 duplicateToTop(Op0, Dest, I); 471 Op0 = TOS = Dest; 472 KillsOp0 = true; 473 } 474 475 // Now we know that one of our operands is on the top of the stack, and at 476 // least one of our operands is killed by this instruction. 477 assert((TOS == Op0 || TOS == Op1) && 478 (KillsOp0 || KillsOp1 || MI->getOpcode() == X86::FpUCOM) && 479 "Stack conditions not set up right!"); 480 481 // We decide which form to use based on what is on the top of the stack, and 482 // which operand is killed by this instruction. 483 const TableEntry *InstTable; 484 bool isForward = TOS == Op0; 485 bool updateST0 = (TOS == Op0 && !KillsOp1) || (TOS == Op1 && !KillsOp0); 486 if (updateST0) { 487 if (isForward) 488 InstTable = ForwardST0Table; 489 else 490 InstTable = ReverseST0Table; 491 } else { 492 if (isForward) 493 InstTable = ForwardSTiTable; 494 else 495 InstTable = ReverseSTiTable; 496 } 497 498 int Opcode = Lookup(InstTable, ARRAY_SIZE(ForwardST0Table), MI->getOpcode()); 499 assert(Opcode != -1 && "Unknown TwoArgFP pseudo instruction!"); 500 501 // NotTOS - The register which is not on the top of stack... 502 unsigned NotTOS = (TOS == Op0) ? Op1 : Op0; 503 504 // Replace the old instruction with a new instruction 505 *I = BuildMI(Opcode, 1).addReg(getSTReg(NotTOS)); 506 507 // If both operands are killed, pop one off of the stack in addition to 508 // overwriting the other one. 509 if (KillsOp0 && KillsOp1 && Op0 != Op1) { 510 assert(!updateST0 && "Should have updated other operand!"); 511 popStackAfter(I); // Pop the top of stack 512 } 513 514 // Insert an explicit pop of the "updated" operand for FUCOM 515 if (MI->getOpcode() == X86::FpUCOM) { 516 if (KillsOp0 && !KillsOp1) 517 popStackAfter(I); // If we kill the first operand, pop it! 518 else if (KillsOp1 && Op0 != Op1) { 519 if (getStackEntry(0) == Op1) { 520 popStackAfter(I); // If it's right at the top of stack, just pop it 521 } else { 522 // Otherwise, move the top of stack into the dead slot, killing the 523 // operand without having to add in an explicit xchg then pop. 524 // 525 unsigned STReg = getSTReg(Op1); 526 unsigned OldSlot = getSlot(Op1); 527 unsigned TopReg = Stack[StackTop-1]; 528 Stack[OldSlot] = TopReg; 529 RegMap[TopReg] = OldSlot; 530 RegMap[Op1] = ~0; 531 Stack[--StackTop] = ~0; 532 533 MachineInstr *MI = BuildMI(X86::FSTPrr, 1).addReg(STReg); 534 I = MBB->insert(I+1, MI); 535 } 536 } 537 } 538 539 // Update stack information so that we know the destination register is now on 540 // the stack. 541 if (MI->getOpcode() != X86::FpUCOM) { 542 unsigned UpdatedSlot = getSlot(updateST0 ? TOS : NotTOS); 543 assert(UpdatedSlot < StackTop && Dest < 7); 544 Stack[UpdatedSlot] = Dest; 545 RegMap[Dest] = UpdatedSlot; 546 } 547 delete MI; // Remove the old instruction 548} 549 550 551/// handleSpecialFP - Handle special instructions which behave unlike other 552/// floating point instructions. This is primarily intended for use by pseudo 553/// instructions. 554/// 555void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) { 556 MachineInstr *MI = *I; 557 switch (MI->getOpcode()) { 558 default: assert(0 && "Unknown SpecialFP instruction!"); 559 case X86::FpGETRESULT: // Appears immediately after a call returning FP type! 560 assert(StackTop == 0 && "Stack should be empty after a call!"); 561 pushReg(getFPReg(MI->getOperand(0))); 562 break; 563 case X86::FpSETRESULT: 564 assert(StackTop == 1 && "Stack should have one element on it to return!"); 565 --StackTop; // "Forget" we have something on the top of stack! 566 break; 567 case X86::FpMOV: { 568 unsigned SrcReg = getFPReg(MI->getOperand(1)); 569 unsigned DestReg = getFPReg(MI->getOperand(0)); 570 bool KillsSrc = false; 571 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 572 E = LV->killed_end(MI); KI != E; ++KI) 573 KillsSrc |= KI->second == X86::FP0+SrcReg; 574 575 if (KillsSrc) { 576 // If the input operand is killed, we can just change the owner of the 577 // incoming stack slot into the result. 578 unsigned Slot = getSlot(SrcReg); 579 assert(Slot < 7 && DestReg < 7 && "FpMOV operands invalid!"); 580 Stack[Slot] = DestReg; 581 RegMap[DestReg] = Slot; 582 583 } else { 584 // For FMOV we just duplicate the specified value to a new stack slot. 585 // This could be made better, but would require substantial changes. 586 duplicateToTop(SrcReg, DestReg, I); 587 } 588 break; 589 } 590 } 591 592 I = MBB->erase(I)-1; // Remove the pseudo instruction 593} 594