17a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# 27a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# VR5500, VR5532 and VR7701 events 37a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# 47a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# Very similar to what the VR5432 provides. 57a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brown# 67a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x0 counters:0,1 um:zero minimum:500 name:CYCLES : Processor clock cycles 77a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x1 counters:0,1 um:zero minimum:500 name:INSTRUCTIONS_EXECUTED : Instructions executed 87a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x2 counters:0,1 um:zero minimum:500 name:LOAD_PREF_CACHE_INSTRUCTIONS : Execution of load/prefetch/cache instruction 97a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x3 counters:0,1 um:zero minimum:500 name:STORES : Execution of store instruction 107a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x4 counters:0,1 um:zero minimum:500 name:BRANCHES : Execution of branch instruction 117a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x5 counters:0,1 um:zero minimum:500 name:FP_INSTRUCTIONS : Execution of floating-point instruction 127a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x6 counters:0,1 um:zero minimum:500 name:DOUBLEWORDS_FLUSHED : Doubleword flush to main memory 137a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x7 counters:0,1 um:zero minimum:500 name:JTLB_REFILLS : TLB refill 147a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x8 counters:0,1 um:zero minimum:500 name:DCACHE_MISSES : Data cache miss 157a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0x9 counters:0,1 um:zero minimum:500 name:ICACHE_MISSES : Instruction cache miss 167a33c86eb98056ef0570c99e713214f8dc56b6efJeff Brownevent:0xa counters:0,1 um:zero minimum:500 name:BRANCHES_MISPREDICTED : Branch prediction miss 17