Lines Matching refs:R0
330 BuildMI(MBB, MBBI, dl, TII.get(PPC::MFLR), PPC::R0);
340 .addReg(PPC::R0)
361 BuildMI(MBB, MBBI, dl, TII.get(PPC::RLWINM), PPC::R0)
366 BuildMI(MBB, MBBI, dl, TII.get(PPC::SUBFIC) ,PPC::R0)
367 .addReg(PPC::R0, RegState::Kill)
372 .addReg(PPC::R0);
379 BuildMI(MBB, MBBI, dl, TII.get(PPC::LIS), PPC::R0)
381 BuildMI(MBB, MBBI, dl, TII.get(PPC::ORI), PPC::R0)
382 .addReg(PPC::R0, RegState::Kill)
387 .addReg(PPC::R0);
590 BuildMI(MBB, MBBI, dl, TII.get(PPC::LIS), PPC::R0)
592 BuildMI(MBB, MBBI, dl, TII.get(PPC::ORI), PPC::R0)
593 .addReg(PPC::R0, RegState::Kill)
598 .addReg(PPC::R0);
647 BuildMI(MBB, MBBI, dl, TII.get(PPC::LWZ), PPC::R0)
655 BuildMI(MBB, MBBI, dl, TII.get(PPC::MTLR)).addReg(PPC::R0);
666 unsigned TmpReg = isPPC64 ? PPC::X0 : PPC::R0;