Cross Reference: /external/qemu/target-mips/op

Lines Matching refs:tlb
811     unsigned int tmp = env->tlb->nb_tlb;
1076     env->CP0_Wired = arg1 % env->tlb->nb_tlb;
1506     env->tlb->tlb_in_use = env->tlb->nb_tlb;
1511     /* Discard entries from env->tlb[first] onwards.  */
1512     while (env->tlb->tlb_in_use > first) {
1513         r4k_invalidate_tlb(env, --env->tlb->tlb_in_use, 0);
1519     r4k_tlb_t *tlb;
1522     tlb = &env->tlb->mmu.r4k.tlb[idx];
1523     tlb->VPN = env->CP0_EntryHi & (TARGET_PAGE_MASK << 1);
1525     tlb->VPN &= env->SEGMask;
1527     tlb->ASID = env->CP0_EntryHi & 0xFF;
1528     tlb->PageMask = env->CP0_PageMask;
1529     tlb->G = env->CP0_EntryLo0 & env->CP0_EntryLo1 & 1;
1530     tlb->V0 = (env->CP0_EntryLo0 & 2) != 0;
1531     tlb->D0 = (env->CP0_EntryLo0 & 4) != 0;
1532     tlb->C0 = (env->CP0_EntryLo0 >> 3) & 0x7;
1533     tlb->PFN[0] = (env->CP0_EntryLo0 >> 6) << 12;
1534     tlb->V1 = (env->CP0_EntryLo1 & 2) != 0;
1535     tlb->D1 = (env->CP0_EntryLo1 & 4) != 0;
1536     tlb->C1 = (env->CP0_EntryLo1 >> 3) & 0x7;
1537     tlb->PFN[1] = (env->CP0_EntryLo1 >> 6) << 12;
1544     idx = (env->CP0_Index & ~0x80000000) % env->tlb->nb_tlb;
1549     r4k_mips_tlb_flush_extra (env, env->tlb->nb_tlb);
1565     r4k_tlb_t *tlb;
1573     for (i = 0; i < env->tlb->nb_tlb; i++) {
1574         tlb = &env->tlb->mmu.r4k.tlb[i];
1576         mask = tlb->PageMask | ~(TARGET_PAGE_MASK << 1);
1578         VPN = tlb->VPN & ~mask;
1580         if ((tlb->G == 1 || tlb->ASID == ASID) && VPN == tag) {
1586     if (i == env->tlb->nb_tlb) {
1588         for (i = env->tlb->nb_tlb; i < env->tlb->tlb_in_use; i++) {
1589             tlb = &env->tlb->mmu.r4k.tlb[i];
1591             mask = tlb->PageMask | ~(TARGET_PAGE_MASK << 1);
1593             VPN = tlb->VPN & ~mask;
1595             if ((tlb->G == 1 || tlb->ASID == ASID) && VPN == tag) {
1607     r4k_tlb_t *tlb;
1612     idx = (env->CP0_Index & ~0x80000000) % env->tlb->nb_tlb;
1613     tlb = &env->tlb->mmu.r4k.tlb[idx];
1616     if (ASID != tlb->ASID)
1619     r4k_mips_tlb_flush_extra(env, env->tlb->nb_tlb);
1621     env->CP0_EntryHi = tlb->VPN | tlb->ASID;
1622     env->CP0_PageMask = tlb->PageMask;
1623     env->CP0_EntryLo0 = tlb->G | (tlb->V0 << 1) | (tlb->D0 << 2) |
1624                         (tlb->C0 << 3) | (tlb->PFN[0] >> 6);
1625     env->CP0_EntryLo1 = tlb->G | (tlb->V1 << 1) | (tlb->D1 << 2) |
1626                         (tlb->C1 << 3) | (tlb->PFN[1] >> 6);
1631     env->tlb->helper_tlbwi();
1636     env->tlb->helper_tlbwr();
1641     env->tlb->helper_tlbp();
1646     env->tlb->helper_tlbr();