Searched refs:ADD8 (Results 1 - 5 of 5) sorted by relevance
/external/qemu/target-arm/ |
H A D | op_addsub.h | 39 ADD8(a, b, 0); 40 ADD8(a >> 8, b >> 8, 1); 41 ADD8(a >> 16, b >> 16, 2); 42 ADD8(a >> 24, b >> 24, 3); 102 #undef ADD8 macro
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H A D | helper.c | 2405 #define ADD8(a, b, n) RESULT(add8_sat(a, b), n, 8); macro 2448 #define ADD8(a, b, n) RESULT(add8_usat(a, b), n, 8); macro 2474 #define ADD8(a, b, n) SARITH8(a, b, n, +) macro 2490 #define ADD8(a, b, n) do { \ macro 2524 #define ADD8(a, b, n) \ macro 2537 #define ADD8(a, b, n) \ macro
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCRegisterInfo.cpp | 89 ImmToIdxMap[PPC::ADDI8] = PPC::ADD8; ImmToIdxMap[PPC::STD_32] = PPC::STDX_32; 211 unsigned ADDInstr = is64Bit ? PPC::ADD8 : PPC::ADD4;
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H A D | PPCFrameLowering.cpp | 619 BuildMI(MBB, MBBI, dl, TII.get(PPC::ADD8)) 668 unsigned ADDInstr = isPPC64 ? PPC::ADD8 : PPC::ADD4;
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H A D | PPCISelLowering.cpp | 4836 BuildMI(BB, dl, TII->get(is64bit ? PPC::ADD8 : PPC::ADD4), Ptr1Reg) 4963 BB = EmitAtomicBinary(MI, BB, true, PPC::ADD8); 5168 BuildMI(BB, dl, TII->get(is64bit ? PPC::ADD8 : PPC::ADD4), Ptr1Reg)
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