Searched refs:CSR3 (Results 1 - 5 of 5) sorted by relevance
/external/grub/netboot/ |
H A D | otulip.c | 57 CSR0=0, CSR1=0x08, CSR2=0x10, CSR3=0x18, CSR4=0x20, CSR5=0x28, enumerator in enum:tulip_offsets 255 outl((unsigned long)&rxd[0], ioaddr + CSR3);
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H A D | davicom.c | 64 CSR0=0, CSR1=0x08, CSR2=0x10, CSR3=0x18, CSR4=0x20, CSR5=0x28, 517 outl((unsigned long)&rxd[0], ioaddr + CSR3); 63 CSR0=0, CSR1=0x08, CSR2=0x10, CSR3=0x18, CSR4=0x20, CSR5=0x28, enumerator in enum:davicom_offsets
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H A D | depca.c | 254 #define CSR3 3 macro 295 ** CONTROL AND STATUS REGISTER 3 (CSR3) 507 outw(CSR3, DEPCA_ADDR); /* ALE control */
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H A D | sk_g16.c | 256 * CSR3 - Allows redefinition of the Bus Master Interface. 265 #define CSR3 0x03 macro 970 SK_write_reg(CSR3, CSR3_ACON); /* Ale Control !!!THIS MUST BE SET!!!! */
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H A D | tulip.c | 291 CSR0=0, CSR1=0x08, CSR2=0x10, CSR3=0x18, CSR4=0x20, CSR5=0x28, 1033 outl((unsigned long)&rx_ring[0], ioaddr + CSR3); 290 CSR0=0, CSR1=0x08, CSR2=0x10, CSR3=0x18, CSR4=0x20, CSR5=0x28, enumerator in enum:tulip_offsets
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