MipsMachineFunction.h revision b8e0ebf034a473ac4a5ff477d4bf653b70c778a4 
1//===-- MipsMachineFunctionInfo.h - Private data used for Mips ----*- C++ -*-=//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares the Mips specific subclass of MachineFunctionInfo.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef MIPS_MACHINE_FUNCTION_INFO_H
15#define MIPS_MACHINE_FUNCTION_INFO_H
16
17#include "llvm/ADT/SmallVector.h"
18#include "llvm/ADT/VectorExtras.h"
19#include "llvm/CodeGen/MachineFunction.h"
20#include "llvm/CodeGen/MachineFrameInfo.h"
21
22namespace llvm {
23
24/// MipsFunctionInfo - This class is derived from MachineFunction private
25/// Mips target-specific information for each MachineFunction.
26class MipsFunctionInfo : public MachineFunctionInfo {
27
28private:
29  /// Holds for each function where on the stack the Frame Pointer must be
30  /// saved. This is used on Prologue and Epilogue to emit FP save/restore
31  int FPStackOffset;
32
33  /// Holds for each function where on the stack the Return Address must be
34  /// saved. This is used on Prologue and Epilogue to emit RA save/restore
35  int RAStackOffset;
36
37  /// At each function entry, two special bitmask directives must be emitted
38  /// to help debugging, for CPU and FPU callee saved registers. Both need
39  /// the negative offset from the final stack size and its higher registers
40  /// location on the stack.
41  int CPUTopSavedRegOff;
42  int FPUTopSavedRegOff;
43
44  /// MipsFIHolder - Holds a FrameIndex and it's Stack Pointer Offset
45  struct MipsFIHolder {
46
47    int FI;
48    int SPOffset;
49
50    MipsFIHolder(int FrameIndex, int StackPointerOffset)
51      : FI(FrameIndex), SPOffset(StackPointerOffset) {}
52  };
53
54  /// When PIC is used the GP must be saved on the stack on the function
55  /// prologue and must be reloaded from this stack location after every
56  /// call. A reference to its stack location and frame index must be kept
57  /// to be used on emitPrologue and processFunctionBeforeFrameFinalized.
58  MipsFIHolder GPHolder;
59
60  /// On LowerFormalArguments the stack size is unknown, so the Stack
61  /// Pointer Offset calculation of "not in register arguments" must be
62  /// postponed to emitPrologue.
63  SmallVector<MipsFIHolder, 16> FnLoadArgs;
64  bool HasLoadArgs;
65
66  // When VarArgs, we must write registers back to caller stack, preserving
67  // on register arguments. Since the stack size is unknown on
68  // LowerFormalArguments, the Stack Pointer Offset calculation must be
69  // postponed to emitPrologue.
70  SmallVector<MipsFIHolder, 4> FnStoreVarArgs;
71  bool HasStoreVarArgs;
72
73  /// SRetReturnReg - Some subtargets require that sret lowering includes
74  /// returning the value of the returned struct in a register. This field
75  /// holds the virtual register into which the sret argument is passed.
76  unsigned SRetReturnReg;
77
78  /// GlobalBaseReg - keeps track of the virtual register initialized for
79  /// use as the global base register. This is used for PIC in some PIC
80  /// relocation models.
81  unsigned GlobalBaseReg;
82
83public:
84  MipsFunctionInfo(MachineFunction& MF)
85  : FPStackOffset(0), RAStackOffset(0), CPUTopSavedRegOff(0),
86    FPUTopSavedRegOff(0), GPHolder(-1,-1), HasLoadArgs(false),
87    HasStoreVarArgs(false), SRetReturnReg(0), GlobalBaseReg(0)
88  {}
89
90  int getFPStackOffset() const { return FPStackOffset; }
91  void setFPStackOffset(int Off) { FPStackOffset = Off; }
92
93  int getRAStackOffset() const { return RAStackOffset; }
94  void setRAStackOffset(int Off) { RAStackOffset = Off; }
95
96  int getCPUTopSavedRegOff() const { return CPUTopSavedRegOff; }
97  void setCPUTopSavedRegOff(int Off) { CPUTopSavedRegOff = Off; }
98
99  int getFPUTopSavedRegOff() const { return FPUTopSavedRegOff; }
100  void setFPUTopSavedRegOff(int Off) { FPUTopSavedRegOff = Off; }
101
102  int getGPStackOffset() const { return GPHolder.SPOffset; }
103  int getGPFI() const { return GPHolder.FI; }
104  void setGPStackOffset(int Off) { GPHolder.SPOffset = Off; }
105  void setGPFI(int FI) { GPHolder.FI = FI; }
106  bool needGPSaveRestore() const { return GPHolder.SPOffset != -1; }
107
108  bool hasLoadArgs() const { return HasLoadArgs; }
109  bool hasStoreVarArgs() const { return HasStoreVarArgs; }
110
111  void recordLoadArgsFI(int FI, int SPOffset) {
112    if (!HasLoadArgs) HasLoadArgs=true;
113    FnLoadArgs.push_back(MipsFIHolder(FI, SPOffset));
114  }
115  void recordStoreVarArgsFI(int FI, int SPOffset) {
116    if (!HasStoreVarArgs) HasStoreVarArgs=true;
117    FnStoreVarArgs.push_back(MipsFIHolder(FI, SPOffset));
118  }
119
120  void adjustLoadArgsFI(MachineFrameInfo *MFI) const {
121    if (!hasLoadArgs()) return;
122    for (unsigned i = 0, e = FnLoadArgs.size(); i != e; ++i)
123      MFI->setObjectOffset( FnLoadArgs[i].FI, FnLoadArgs[i].SPOffset );
124  }
125  void adjustStoreVarArgsFI(MachineFrameInfo *MFI) const {
126    if (!hasStoreVarArgs()) return;
127    for (unsigned i = 0, e = FnStoreVarArgs.size(); i != e; ++i)
128      MFI->setObjectOffset( FnStoreVarArgs[i].FI, FnStoreVarArgs[i].SPOffset );
129  }
130
131  unsigned getSRetReturnReg() const { return SRetReturnReg; }
132  void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; }
133
134  unsigned getGlobalBaseReg() const { return GlobalBaseReg; }
135  void setGlobalBaseReg(unsigned Reg) { GlobalBaseReg = Reg; }
136};
137
138} // end of namespace llvm
139
140#endif // MIPS_MACHINE_FUNCTION_INFO_H
141