ir_defs.c revision 8f943afc22a6a683b78271836c8ddc462b4824a9
1 2/*---------------------------------------------------------------*/ 3/*--- begin ir_defs.c ---*/ 4/*---------------------------------------------------------------*/ 5 6/* 7 This file is part of Valgrind, a dynamic binary instrumentation 8 framework. 9 10 Copyright (C) 2004-2011 OpenWorks LLP 11 info@open-works.net 12 13 This program is free software; you can redistribute it and/or 14 modify it under the terms of the GNU General Public License as 15 published by the Free Software Foundation; either version 2 of the 16 License, or (at your option) any later version. 17 18 This program is distributed in the hope that it will be useful, but 19 WITHOUT ANY WARRANTY; without even the implied warranty of 20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 21 General Public License for more details. 22 23 You should have received a copy of the GNU General Public License 24 along with this program; if not, write to the Free Software 25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 26 02110-1301, USA. 27 28 The GNU General Public License is contained in the file COPYING. 29 30 Neither the names of the U.S. Department of Energy nor the 31 University of California nor the names of its contributors may be 32 used to endorse or promote products derived from this software 33 without prior written permission. 34*/ 35 36#include "libvex_basictypes.h" 37#include "libvex_ir.h" 38#include "libvex.h" 39 40#include "main_util.h" 41 42 43/*---------------------------------------------------------------*/ 44/*--- Printing the IR ---*/ 45/*---------------------------------------------------------------*/ 46 47void ppIRType ( IRType ty ) 48{ 49 switch (ty) { 50 case Ity_INVALID: vex_printf("Ity_INVALID"); break; 51 case Ity_I1: vex_printf( "I1"); break; 52 case Ity_I8: vex_printf( "I8"); break; 53 case Ity_I16: vex_printf( "I16"); break; 54 case Ity_I32: vex_printf( "I32"); break; 55 case Ity_I64: vex_printf( "I64"); break; 56 case Ity_I128: vex_printf( "I128"); break; 57 case Ity_F32: vex_printf( "F32"); break; 58 case Ity_F64: vex_printf( "F64"); break; 59 case Ity_F128: vex_printf( "F128"); break; 60 case Ity_V128: vex_printf( "V128"); break; 61 default: vex_printf("ty = 0x%x\n", (Int)ty); 62 vpanic("ppIRType"); 63 } 64} 65 66void ppIRConst ( IRConst* con ) 67{ 68 union { ULong i64; Double f64; UInt i32; Float f32; } u; 69 vassert(sizeof(ULong) == sizeof(Double)); 70 switch (con->tag) { 71 case Ico_U1: vex_printf( "%d:I1", con->Ico.U1 ? 1 : 0); break; 72 case Ico_U8: vex_printf( "0x%x:I8", (UInt)(con->Ico.U8)); break; 73 case Ico_U16: vex_printf( "0x%x:I16", (UInt)(con->Ico.U16)); break; 74 case Ico_U32: vex_printf( "0x%x:I32", (UInt)(con->Ico.U32)); break; 75 case Ico_U64: vex_printf( "0x%llx:I64", (ULong)(con->Ico.U64)); break; 76 case Ico_F32: u.f32 = con->Ico.F32; 77 vex_printf( "F32{0x%x}", u.i32); 78 break; 79 case Ico_F32i: vex_printf( "F32i{0x%x}", con->Ico.F32i); break; 80 case Ico_F64: u.f64 = con->Ico.F64; 81 vex_printf( "F64{0x%llx}", u.i64); 82 break; 83 case Ico_F64i: vex_printf( "F64i{0x%llx}", con->Ico.F64i); break; 84 case Ico_V128: vex_printf( "V128{0x%04x}", (UInt)(con->Ico.V128)); break; 85 default: vpanic("ppIRConst"); 86 } 87} 88 89void ppIRCallee ( IRCallee* ce ) 90{ 91 vex_printf("%s", ce->name); 92 if (ce->regparms > 0) 93 vex_printf("[rp=%d]", ce->regparms); 94 if (ce->mcx_mask > 0) 95 vex_printf("[mcx=0x%x]", ce->mcx_mask); 96 vex_printf("{%p}", (void*)ce->addr); 97} 98 99void ppIRRegArray ( IRRegArray* arr ) 100{ 101 vex_printf("(%d:%dx", arr->base, arr->nElems); 102 ppIRType(arr->elemTy); 103 vex_printf(")"); 104} 105 106void ppIRTemp ( IRTemp tmp ) 107{ 108 if (tmp == IRTemp_INVALID) 109 vex_printf("IRTemp_INVALID"); 110 else 111 vex_printf( "t%d", (Int)tmp); 112} 113 114void ppIROp ( IROp op ) 115{ 116 HChar* str = NULL; 117 IROp base; 118 switch (op) { 119 case Iop_Add8 ... Iop_Add64: 120 str = "Add"; base = Iop_Add8; break; 121 case Iop_Sub8 ... Iop_Sub64: 122 str = "Sub"; base = Iop_Sub8; break; 123 case Iop_Mul8 ... Iop_Mul64: 124 str = "Mul"; base = Iop_Mul8; break; 125 case Iop_Or8 ... Iop_Or64: 126 str = "Or"; base = Iop_Or8; break; 127 case Iop_And8 ... Iop_And64: 128 str = "And"; base = Iop_And8; break; 129 case Iop_Xor8 ... Iop_Xor64: 130 str = "Xor"; base = Iop_Xor8; break; 131 case Iop_Shl8 ... Iop_Shl64: 132 str = "Shl"; base = Iop_Shl8; break; 133 case Iop_Shr8 ... Iop_Shr64: 134 str = "Shr"; base = Iop_Shr8; break; 135 case Iop_Sar8 ... Iop_Sar64: 136 str = "Sar"; base = Iop_Sar8; break; 137 case Iop_CmpEQ8 ... Iop_CmpEQ64: 138 str = "CmpEQ"; base = Iop_CmpEQ8; break; 139 case Iop_CmpNE8 ... Iop_CmpNE64: 140 str = "CmpNE"; base = Iop_CmpNE8; break; 141 case Iop_CasCmpEQ8 ... Iop_CasCmpEQ64: 142 str = "CasCmpEQ"; base = Iop_CasCmpEQ8; break; 143 case Iop_CasCmpNE8 ... Iop_CasCmpNE64: 144 str = "CasCmpNE"; base = Iop_CasCmpNE8; break; 145 case Iop_Not8 ... Iop_Not64: 146 str = "Not"; base = Iop_Not8; break; 147 /* other cases must explicitly "return;" */ 148 case Iop_8Uto16: vex_printf("8Uto16"); return; 149 case Iop_8Uto32: vex_printf("8Uto32"); return; 150 case Iop_16Uto32: vex_printf("16Uto32"); return; 151 case Iop_8Sto16: vex_printf("8Sto16"); return; 152 case Iop_8Sto32: vex_printf("8Sto32"); return; 153 case Iop_16Sto32: vex_printf("16Sto32"); return; 154 case Iop_32Sto64: vex_printf("32Sto64"); return; 155 case Iop_32Uto64: vex_printf("32Uto64"); return; 156 case Iop_32to8: vex_printf("32to8"); return; 157 case Iop_16Uto64: vex_printf("16Uto64"); return; 158 case Iop_16Sto64: vex_printf("16Sto64"); return; 159 case Iop_8Uto64: vex_printf("8Uto64"); return; 160 case Iop_8Sto64: vex_printf("8Sto64"); return; 161 case Iop_64to16: vex_printf("64to16"); return; 162 case Iop_64to8: vex_printf("64to8"); return; 163 164 case Iop_Not1: vex_printf("Not1"); return; 165 case Iop_32to1: vex_printf("32to1"); return; 166 case Iop_64to1: vex_printf("64to1"); return; 167 case Iop_1Uto8: vex_printf("1Uto8"); return; 168 case Iop_1Uto32: vex_printf("1Uto32"); return; 169 case Iop_1Uto64: vex_printf("1Uto64"); return; 170 case Iop_1Sto8: vex_printf("1Sto8"); return; 171 case Iop_1Sto16: vex_printf("1Sto16"); return; 172 case Iop_1Sto32: vex_printf("1Sto32"); return; 173 case Iop_1Sto64: vex_printf("1Sto64"); return; 174 175 case Iop_MullS8: vex_printf("MullS8"); return; 176 case Iop_MullS16: vex_printf("MullS16"); return; 177 case Iop_MullS32: vex_printf("MullS32"); return; 178 case Iop_MullS64: vex_printf("MullS64"); return; 179 case Iop_MullU8: vex_printf("MullU8"); return; 180 case Iop_MullU16: vex_printf("MullU16"); return; 181 case Iop_MullU32: vex_printf("MullU32"); return; 182 case Iop_MullU64: vex_printf("MullU64"); return; 183 184 case Iop_Clz64: vex_printf("Clz64"); return; 185 case Iop_Clz32: vex_printf("Clz32"); return; 186 case Iop_Ctz64: vex_printf("Ctz64"); return; 187 case Iop_Ctz32: vex_printf("Ctz32"); return; 188 189 case Iop_CmpLT32S: vex_printf("CmpLT32S"); return; 190 case Iop_CmpLE32S: vex_printf("CmpLE32S"); return; 191 case Iop_CmpLT32U: vex_printf("CmpLT32U"); return; 192 case Iop_CmpLE32U: vex_printf("CmpLE32U"); return; 193 194 case Iop_CmpLT64S: vex_printf("CmpLT64S"); return; 195 case Iop_CmpLE64S: vex_printf("CmpLE64S"); return; 196 case Iop_CmpLT64U: vex_printf("CmpLT64U"); return; 197 case Iop_CmpLE64U: vex_printf("CmpLE64U"); return; 198 199 case Iop_CmpNEZ8: vex_printf("CmpNEZ8"); return; 200 case Iop_CmpNEZ16: vex_printf("CmpNEZ16"); return; 201 case Iop_CmpNEZ32: vex_printf("CmpNEZ32"); return; 202 case Iop_CmpNEZ64: vex_printf("CmpNEZ64"); return; 203 204 case Iop_CmpwNEZ32: vex_printf("CmpwNEZ32"); return; 205 case Iop_CmpwNEZ64: vex_printf("CmpwNEZ64"); return; 206 207 case Iop_Left8: vex_printf("Left8"); return; 208 case Iop_Left16: vex_printf("Left16"); return; 209 case Iop_Left32: vex_printf("Left32"); return; 210 case Iop_Left64: vex_printf("Left64"); return; 211 case Iop_Max32U: vex_printf("Max32U"); return; 212 213 case Iop_CmpORD32U: vex_printf("CmpORD32U"); return; 214 case Iop_CmpORD32S: vex_printf("CmpORD32S"); return; 215 216 case Iop_CmpORD64U: vex_printf("CmpORD64U"); return; 217 case Iop_CmpORD64S: vex_printf("CmpORD64S"); return; 218 219 case Iop_DivU32: vex_printf("DivU32"); return; 220 case Iop_DivS32: vex_printf("DivS32"); return; 221 case Iop_DivU64: vex_printf("DivU64"); return; 222 case Iop_DivS64: vex_printf("DivS64"); return; 223 case Iop_DivU64E: vex_printf("DivU64E"); return; 224 case Iop_DivS64E: vex_printf("DivS64E"); return; 225 case Iop_DivU32E: vex_printf("DivU32E"); return; 226 case Iop_DivS32E: vex_printf("DivS32E"); return; 227 228 case Iop_DivModU64to32: vex_printf("DivModU64to32"); return; 229 case Iop_DivModS64to32: vex_printf("DivModS64to32"); return; 230 231 case Iop_DivModU128to64: vex_printf("DivModU128to64"); return; 232 case Iop_DivModS128to64: vex_printf("DivModS128to64"); return; 233 234 case Iop_DivModS64to64: vex_printf("DivModS64to64"); return; 235 236 case Iop_16HIto8: vex_printf("16HIto8"); return; 237 case Iop_16to8: vex_printf("16to8"); return; 238 case Iop_8HLto16: vex_printf("8HLto16"); return; 239 240 case Iop_32HIto16: vex_printf("32HIto16"); return; 241 case Iop_32to16: vex_printf("32to16"); return; 242 case Iop_16HLto32: vex_printf("16HLto32"); return; 243 244 case Iop_64HIto32: vex_printf("64HIto32"); return; 245 case Iop_64to32: vex_printf("64to32"); return; 246 case Iop_32HLto64: vex_printf("32HLto64"); return; 247 248 case Iop_128HIto64: vex_printf("128HIto64"); return; 249 case Iop_128to64: vex_printf("128to64"); return; 250 case Iop_64HLto128: vex_printf("64HLto128"); return; 251 252 case Iop_CmpF32: vex_printf("CmpF32"); return; 253 case Iop_F32toI16S: vex_printf("F32toI16S"); return; 254 case Iop_F32toI32S: vex_printf("F32toI32S"); return; 255 case Iop_F32toI64S: vex_printf("F32toI64S"); return; 256 case Iop_I16StoF32: vex_printf("I16StoF32"); return; 257 case Iop_I32StoF32: vex_printf("I32StoF32"); return; 258 case Iop_I64StoF32: vex_printf("I64StoF32"); return; 259 260 case Iop_AddF64: vex_printf("AddF64"); return; 261 case Iop_SubF64: vex_printf("SubF64"); return; 262 case Iop_MulF64: vex_printf("MulF64"); return; 263 case Iop_DivF64: vex_printf("DivF64"); return; 264 case Iop_AddF64r32: vex_printf("AddF64r32"); return; 265 case Iop_SubF64r32: vex_printf("SubF64r32"); return; 266 case Iop_MulF64r32: vex_printf("MulF64r32"); return; 267 case Iop_DivF64r32: vex_printf("DivF64r32"); return; 268 case Iop_AddF32: vex_printf("AddF32"); return; 269 case Iop_SubF32: vex_printf("SubF32"); return; 270 case Iop_MulF32: vex_printf("MulF32"); return; 271 case Iop_DivF32: vex_printf("DivF32"); return; 272 273 /* 128 bit floating point */ 274 case Iop_AddF128: vex_printf("AddF128"); return; 275 case Iop_SubF128: vex_printf("SubF128"); return; 276 case Iop_MulF128: vex_printf("MulF128"); return; 277 case Iop_DivF128: vex_printf("DivF128"); return; 278 case Iop_AbsF128: vex_printf("AbsF128"); return; 279 case Iop_NegF128: vex_printf("NegF128"); return; 280 case Iop_SqrtF128: vex_printf("SqrtF128"); return; 281 case Iop_CmpF128: vex_printf("CmpF128"); return; 282 283 case Iop_F64HLtoF128: vex_printf("F64HLtoF128"); return; 284 case Iop_F128HItoF64: vex_printf("F128HItoF64"); return; 285 case Iop_F128LOtoF64: vex_printf("F128LOtoF64"); return; 286 case Iop_I32StoF128: vex_printf("I32StoF128"); return; 287 case Iop_I64StoF128: vex_printf("I64StoF128"); return; 288 case Iop_F128toI32S: vex_printf("F128toI32S"); return; 289 case Iop_F128toI64S: vex_printf("F128toI64S"); return; 290 case Iop_F32toF128: vex_printf("F32toF128"); return; 291 case Iop_F64toF128: vex_printf("F64toF128"); return; 292 case Iop_F128toF64: vex_printf("F128toF64"); return; 293 case Iop_F128toF32: vex_printf("F128toF32"); return; 294 295 /* s390 specific */ 296 case Iop_MAddF32: vex_printf("s390_MAddF32"); return; 297 case Iop_MSubF32: vex_printf("s390_MSubF32"); return; 298 299 case Iop_ScaleF64: vex_printf("ScaleF64"); return; 300 case Iop_AtanF64: vex_printf("AtanF64"); return; 301 case Iop_Yl2xF64: vex_printf("Yl2xF64"); return; 302 case Iop_Yl2xp1F64: vex_printf("Yl2xp1F64"); return; 303 case Iop_PRemF64: vex_printf("PRemF64"); return; 304 case Iop_PRemC3210F64: vex_printf("PRemC3210F64"); return; 305 case Iop_PRem1F64: vex_printf("PRem1F64"); return; 306 case Iop_PRem1C3210F64: vex_printf("PRem1C3210F64"); return; 307 case Iop_NegF64: vex_printf("NegF64"); return; 308 case Iop_AbsF64: vex_printf("AbsF64"); return; 309 case Iop_NegF32: vex_printf("NegF32"); return; 310 case Iop_AbsF32: vex_printf("AbsF32"); return; 311 case Iop_SqrtF64: vex_printf("SqrtF64"); return; 312 case Iop_SqrtF32: vex_printf("SqrtF32"); return; 313 case Iop_SinF64: vex_printf("SinF64"); return; 314 case Iop_CosF64: vex_printf("CosF64"); return; 315 case Iop_TanF64: vex_printf("TanF64"); return; 316 case Iop_2xm1F64: vex_printf("2xm1F64"); return; 317 318 case Iop_MAddF64: vex_printf("MAddF64"); return; 319 case Iop_MSubF64: vex_printf("MSubF64"); return; 320 case Iop_MAddF64r32: vex_printf("MAddF64r32"); return; 321 case Iop_MSubF64r32: vex_printf("MSubF64r32"); return; 322 323 case Iop_Est5FRSqrt: vex_printf("Est5FRSqrt"); return; 324 case Iop_RoundF64toF64_NEAREST: vex_printf("RoundF64toF64_NEAREST"); return; 325 case Iop_RoundF64toF64_NegINF: vex_printf("RoundF64toF64_NegINF"); return; 326 case Iop_RoundF64toF64_PosINF: vex_printf("RoundF64toF64_PosINF"); return; 327 case Iop_RoundF64toF64_ZERO: vex_printf("RoundF64toF64_ZERO"); return; 328 329 case Iop_TruncF64asF32: vex_printf("TruncF64asF32"); return; 330 case Iop_CalcFPRF: vex_printf("CalcFPRF"); return; 331 332 case Iop_Add16x2: vex_printf("Add16x2"); return; 333 case Iop_Sub16x2: vex_printf("Sub16x2"); return; 334 case Iop_QAdd16Sx2: vex_printf("QAdd16Sx2"); return; 335 case Iop_QAdd16Ux2: vex_printf("QAdd16Ux2"); return; 336 case Iop_QSub16Sx2: vex_printf("QSub16Sx2"); return; 337 case Iop_QSub16Ux2: vex_printf("QSub16Ux2"); return; 338 case Iop_HAdd16Ux2: vex_printf("HAdd16Ux2"); return; 339 case Iop_HAdd16Sx2: vex_printf("HAdd16Sx2"); return; 340 case Iop_HSub16Ux2: vex_printf("HSub16Ux2"); return; 341 case Iop_HSub16Sx2: vex_printf("HSub16Sx2"); return; 342 343 case Iop_Add8x4: vex_printf("Add8x4"); return; 344 case Iop_Sub8x4: vex_printf("Sub8x4"); return; 345 case Iop_QAdd8Sx4: vex_printf("QAdd8Sx4"); return; 346 case Iop_QAdd8Ux4: vex_printf("QAdd8Ux4"); return; 347 case Iop_QSub8Sx4: vex_printf("QSub8Sx4"); return; 348 case Iop_QSub8Ux4: vex_printf("QSub8Ux4"); return; 349 case Iop_HAdd8Ux4: vex_printf("HAdd8Ux4"); return; 350 case Iop_HAdd8Sx4: vex_printf("HAdd8Sx4"); return; 351 case Iop_HSub8Ux4: vex_printf("HSub8Ux4"); return; 352 case Iop_HSub8Sx4: vex_printf("HSub8Sx4"); return; 353 case Iop_Sad8Ux4: vex_printf("Sad8Ux4"); return; 354 355 case Iop_CmpNEZ16x2: vex_printf("CmpNEZ16x2"); return; 356 case Iop_CmpNEZ8x4: vex_printf("CmpNEZ8x4"); return; 357 358 case Iop_CmpF64: vex_printf("CmpF64"); return; 359 360 case Iop_F64toI16S: vex_printf("F64toI16S"); return; 361 case Iop_F64toI32S: vex_printf("F64toI32S"); return; 362 case Iop_F64toI64S: vex_printf("F64toI64S"); return; 363 case Iop_F64toI64U: vex_printf("F64toI64U"); return; 364 365 case Iop_F64toI32U: vex_printf("F64toI32U"); return; 366 367 case Iop_I16StoF64: vex_printf("I16StoF64"); return; 368 case Iop_I32StoF64: vex_printf("I32StoF64"); return; 369 case Iop_I64StoF64: vex_printf("I64StoF64"); return; 370 case Iop_I64UtoF64: vex_printf("I64UtoF64"); return; 371 case Iop_I64UtoF32: vex_printf("I64UtoF32"); return; 372 373 case Iop_I32UtoF64: vex_printf("I32UtoF64"); return; 374 375 case Iop_F32toF64: vex_printf("F32toF64"); return; 376 case Iop_F64toF32: vex_printf("F64toF32"); return; 377 378 case Iop_RoundF64toInt: vex_printf("RoundF64toInt"); return; 379 case Iop_RoundF32toInt: vex_printf("RoundF32toInt"); return; 380 case Iop_RoundF64toF32: vex_printf("RoundF64toF32"); return; 381 382 case Iop_ReinterpF64asI64: vex_printf("ReinterpF64asI64"); return; 383 case Iop_ReinterpI64asF64: vex_printf("ReinterpI64asF64"); return; 384 case Iop_ReinterpF32asI32: vex_printf("ReinterpF32asI32"); return; 385 case Iop_ReinterpI32asF32: vex_printf("ReinterpI32asF32"); return; 386 387 case Iop_I32UtoFx4: vex_printf("I32UtoFx4"); return; 388 case Iop_I32StoFx4: vex_printf("I32StoFx4"); return; 389 390 case Iop_F32toF16x4: vex_printf("F32toF16x4"); return; 391 case Iop_F16toF32x4: vex_printf("F16toF32x4"); return; 392 393 case Iop_Rsqrte32Fx4: vex_printf("VRsqrte32Fx4"); return; 394 case Iop_Rsqrte32x4: vex_printf("VRsqrte32x4"); return; 395 case Iop_Rsqrte32Fx2: vex_printf("VRsqrte32Fx2"); return; 396 case Iop_Rsqrte32x2: vex_printf("VRsqrte32x2"); return; 397 398 case Iop_QFtoI32Ux4_RZ: vex_printf("QFtoI32Ux4_RZ"); return; 399 case Iop_QFtoI32Sx4_RZ: vex_printf("QFtoI32Sx4_RZ"); return; 400 401 case Iop_FtoI32Ux4_RZ: vex_printf("FtoI32Ux4_RZ"); return; 402 case Iop_FtoI32Sx4_RZ: vex_printf("FtoI32Sx4_RZ"); return; 403 404 case Iop_I32UtoFx2: vex_printf("I32UtoFx2"); return; 405 case Iop_I32StoFx2: vex_printf("I32StoFx2"); return; 406 407 case Iop_FtoI32Ux2_RZ: vex_printf("FtoI32Ux2_RZ"); return; 408 case Iop_FtoI32Sx2_RZ: vex_printf("FtoI32Sx2_RZ"); return; 409 410 case Iop_RoundF32x4_RM: vex_printf("RoundF32x4_RM"); return; 411 case Iop_RoundF32x4_RP: vex_printf("RoundF32x4_RP"); return; 412 case Iop_RoundF32x4_RN: vex_printf("RoundF32x4_RN"); return; 413 case Iop_RoundF32x4_RZ: vex_printf("RoundF32x4_RZ"); return; 414 415 case Iop_Abs8x8: vex_printf("Abs8x8"); return; 416 case Iop_Abs16x4: vex_printf("Abs16x4"); return; 417 case Iop_Abs32x2: vex_printf("Abs32x2"); return; 418 case Iop_Add8x8: vex_printf("Add8x8"); return; 419 case Iop_Add16x4: vex_printf("Add16x4"); return; 420 case Iop_Add32x2: vex_printf("Add32x2"); return; 421 case Iop_QAdd8Ux8: vex_printf("QAdd8Ux8"); return; 422 case Iop_QAdd16Ux4: vex_printf("QAdd16Ux4"); return; 423 case Iop_QAdd32Ux2: vex_printf("QAdd32Ux2"); return; 424 case Iop_QAdd64Ux1: vex_printf("QAdd64Ux1"); return; 425 case Iop_QAdd8Sx8: vex_printf("QAdd8Sx8"); return; 426 case Iop_QAdd16Sx4: vex_printf("QAdd16Sx4"); return; 427 case Iop_QAdd32Sx2: vex_printf("QAdd32Sx2"); return; 428 case Iop_QAdd64Sx1: vex_printf("QAdd64Sx1"); return; 429 case Iop_PwAdd8x8: vex_printf("PwAdd8x8"); return; 430 case Iop_PwAdd16x4: vex_printf("PwAdd16x4"); return; 431 case Iop_PwAdd32x2: vex_printf("PwAdd32x2"); return; 432 case Iop_PwAdd32Fx2: vex_printf("PwAdd32Fx2"); return; 433 case Iop_PwAddL8Ux8: vex_printf("PwAddL8Ux8"); return; 434 case Iop_PwAddL16Ux4: vex_printf("PwAddL16Ux4"); return; 435 case Iop_PwAddL32Ux2: vex_printf("PwAddL32Ux2"); return; 436 case Iop_PwAddL8Sx8: vex_printf("PwAddL8Sx8"); return; 437 case Iop_PwAddL16Sx4: vex_printf("PwAddL16Sx4"); return; 438 case Iop_PwAddL32Sx2: vex_printf("PwAddL32Sx2"); return; 439 case Iop_Sub8x8: vex_printf("Sub8x8"); return; 440 case Iop_Sub16x4: vex_printf("Sub16x4"); return; 441 case Iop_Sub32x2: vex_printf("Sub32x2"); return; 442 case Iop_QSub8Ux8: vex_printf("QSub8Ux8"); return; 443 case Iop_QSub16Ux4: vex_printf("QSub16Ux4"); return; 444 case Iop_QSub32Ux2: vex_printf("QSub32Ux2"); return; 445 case Iop_QSub64Ux1: vex_printf("QSub64Ux1"); return; 446 case Iop_QSub8Sx8: vex_printf("QSub8Sx8"); return; 447 case Iop_QSub16Sx4: vex_printf("QSub16Sx4"); return; 448 case Iop_QSub32Sx2: vex_printf("QSub32Sx2"); return; 449 case Iop_QSub64Sx1: vex_printf("QSub64Sx1"); return; 450 case Iop_Mul8x8: vex_printf("Mul8x8"); return; 451 case Iop_Mul16x4: vex_printf("Mul16x4"); return; 452 case Iop_Mul32x2: vex_printf("Mul32x2"); return; 453 case Iop_Mul32Fx2: vex_printf("Mul32Fx2"); return; 454 case Iop_PolynomialMul8x8: vex_printf("PolynomialMul8x8"); return; 455 case Iop_MulHi16Ux4: vex_printf("MulHi16Ux4"); return; 456 case Iop_MulHi16Sx4: vex_printf("MulHi16Sx4"); return; 457 case Iop_QDMulHi16Sx4: vex_printf("QDMulHi16Sx4"); return; 458 case Iop_QDMulHi32Sx2: vex_printf("QDMulHi32Sx2"); return; 459 case Iop_QRDMulHi16Sx4: vex_printf("QRDMulHi16Sx4"); return; 460 case Iop_QRDMulHi32Sx2: vex_printf("QRDMulHi32Sx2"); return; 461 case Iop_QDMulLong16Sx4: vex_printf("QDMulLong16Sx4"); return; 462 case Iop_QDMulLong32Sx2: vex_printf("QDMulLong32Sx2"); return; 463 case Iop_Avg8Ux8: vex_printf("Avg8Ux8"); return; 464 case Iop_Avg16Ux4: vex_printf("Avg16Ux4"); return; 465 case Iop_Max8Sx8: vex_printf("Max8Sx8"); return; 466 case Iop_Max16Sx4: vex_printf("Max16Sx4"); return; 467 case Iop_Max32Sx2: vex_printf("Max32Sx2"); return; 468 case Iop_Max8Ux8: vex_printf("Max8Ux8"); return; 469 case Iop_Max16Ux4: vex_printf("Max16Ux4"); return; 470 case Iop_Max32Ux2: vex_printf("Max32Ux2"); return; 471 case Iop_Min8Sx8: vex_printf("Min8Sx8"); return; 472 case Iop_Min16Sx4: vex_printf("Min16Sx4"); return; 473 case Iop_Min32Sx2: vex_printf("Min32Sx2"); return; 474 case Iop_Min8Ux8: vex_printf("Min8Ux8"); return; 475 case Iop_Min16Ux4: vex_printf("Min16Ux4"); return; 476 case Iop_Min32Ux2: vex_printf("Min32Ux2"); return; 477 case Iop_PwMax8Sx8: vex_printf("PwMax8Sx8"); return; 478 case Iop_PwMax16Sx4: vex_printf("PwMax16Sx4"); return; 479 case Iop_PwMax32Sx2: vex_printf("PwMax32Sx2"); return; 480 case Iop_PwMax8Ux8: vex_printf("PwMax8Ux8"); return; 481 case Iop_PwMax16Ux4: vex_printf("PwMax16Ux4"); return; 482 case Iop_PwMax32Ux2: vex_printf("PwMax32Ux2"); return; 483 case Iop_PwMin8Sx8: vex_printf("PwMin8Sx8"); return; 484 case Iop_PwMin16Sx4: vex_printf("PwMin16Sx4"); return; 485 case Iop_PwMin32Sx2: vex_printf("PwMin32Sx2"); return; 486 case Iop_PwMin8Ux8: vex_printf("PwMin8Ux8"); return; 487 case Iop_PwMin16Ux4: vex_printf("PwMin16Ux4"); return; 488 case Iop_PwMin32Ux2: vex_printf("PwMin32Ux2"); return; 489 case Iop_CmpEQ8x8: vex_printf("CmpEQ8x8"); return; 490 case Iop_CmpEQ16x4: vex_printf("CmpEQ16x4"); return; 491 case Iop_CmpEQ32x2: vex_printf("CmpEQ32x2"); return; 492 case Iop_CmpGT8Ux8: vex_printf("CmpGT8Ux8"); return; 493 case Iop_CmpGT16Ux4: vex_printf("CmpGT16Ux4"); return; 494 case Iop_CmpGT32Ux2: vex_printf("CmpGT32Ux2"); return; 495 case Iop_CmpGT8Sx8: vex_printf("CmpGT8Sx8"); return; 496 case Iop_CmpGT16Sx4: vex_printf("CmpGT16Sx4"); return; 497 case Iop_CmpGT32Sx2: vex_printf("CmpGT32Sx2"); return; 498 case Iop_Cnt8x8: vex_printf("Cnt8x8"); return; 499 case Iop_Clz8Sx8: vex_printf("Clz8Sx8"); return; 500 case Iop_Clz16Sx4: vex_printf("Clz16Sx4"); return; 501 case Iop_Clz32Sx2: vex_printf("Clz32Sx2"); return; 502 case Iop_Cls8Sx8: vex_printf("Cls8Sx8"); return; 503 case Iop_Cls16Sx4: vex_printf("Cls16Sx4"); return; 504 case Iop_Cls32Sx2: vex_printf("Cls32Sx2"); return; 505 case Iop_ShlN8x8: vex_printf("ShlN8x8"); return; 506 case Iop_ShlN16x4: vex_printf("ShlN16x4"); return; 507 case Iop_ShlN32x2: vex_printf("ShlN32x2"); return; 508 case Iop_ShrN8x8: vex_printf("ShrN8x8"); return; 509 case Iop_ShrN16x4: vex_printf("ShrN16x4"); return; 510 case Iop_ShrN32x2: vex_printf("ShrN32x2"); return; 511 case Iop_SarN8x8: vex_printf("SarN8x8"); return; 512 case Iop_SarN16x4: vex_printf("SarN16x4"); return; 513 case Iop_SarN32x2: vex_printf("SarN32x2"); return; 514 case Iop_QNarrowBin16Sto8Ux8: vex_printf("QNarrowBin16Sto8Ux8"); return; 515 case Iop_QNarrowBin16Sto8Sx8: vex_printf("QNarrowBin16Sto8Sx8"); return; 516 case Iop_QNarrowBin32Sto16Sx4: vex_printf("QNarrowBin32Sto16Sx4"); return; 517 case Iop_NarrowBin16to8x8: vex_printf("NarrowBin16to8x8"); return; 518 case Iop_NarrowBin32to16x4: vex_printf("NarrowBin32to16x4"); return; 519 case Iop_InterleaveHI8x8: vex_printf("InterleaveHI8x8"); return; 520 case Iop_InterleaveHI16x4: vex_printf("InterleaveHI16x4"); return; 521 case Iop_InterleaveHI32x2: vex_printf("InterleaveHI32x2"); return; 522 case Iop_InterleaveLO8x8: vex_printf("InterleaveLO8x8"); return; 523 case Iop_InterleaveLO16x4: vex_printf("InterleaveLO16x4"); return; 524 case Iop_InterleaveLO32x2: vex_printf("InterleaveLO32x2"); return; 525 case Iop_CatOddLanes8x8: vex_printf("CatOddLanes8x8"); return; 526 case Iop_CatOddLanes16x4: vex_printf("CatOddLanes16x4"); return; 527 case Iop_CatEvenLanes8x8: vex_printf("CatEvenLanes8x8"); return; 528 case Iop_CatEvenLanes16x4: vex_printf("CatEvenLanes16x4"); return; 529 case Iop_InterleaveOddLanes8x8: vex_printf("InterleaveOddLanes8x8"); return; 530 case Iop_InterleaveOddLanes16x4: vex_printf("InterleaveOddLanes16x4"); return; 531 case Iop_InterleaveEvenLanes8x8: vex_printf("InterleaveEvenLanes8x8"); return; 532 case Iop_InterleaveEvenLanes16x4: vex_printf("InterleaveEvenLanes16x4"); return; 533 case Iop_Shl8x8: vex_printf("Shl8x8"); return; 534 case Iop_Shl16x4: vex_printf("Shl16x4"); return; 535 case Iop_Shl32x2: vex_printf("Shl32x2"); return; 536 case Iop_Shr8x8: vex_printf("Shr8x8"); return; 537 case Iop_Shr16x4: vex_printf("Shr16x4"); return; 538 case Iop_Shr32x2: vex_printf("Shr32x2"); return; 539 case Iop_QShl8x8: vex_printf("QShl8x8"); return; 540 case Iop_QShl16x4: vex_printf("QShl16x4"); return; 541 case Iop_QShl32x2: vex_printf("QShl32x2"); return; 542 case Iop_QShl64x1: vex_printf("QShl64x1"); return; 543 case Iop_QSal8x8: vex_printf("QSal8x8"); return; 544 case Iop_QSal16x4: vex_printf("QSal16x4"); return; 545 case Iop_QSal32x2: vex_printf("QSal32x2"); return; 546 case Iop_QSal64x1: vex_printf("QSal64x1"); return; 547 case Iop_QShlN8x8: vex_printf("QShlN8x8"); return; 548 case Iop_QShlN16x4: vex_printf("QShlN16x4"); return; 549 case Iop_QShlN32x2: vex_printf("QShlN32x2"); return; 550 case Iop_QShlN64x1: vex_printf("QShlN64x1"); return; 551 case Iop_QShlN8Sx8: vex_printf("QShlN8Sx8"); return; 552 case Iop_QShlN16Sx4: vex_printf("QShlN16Sx4"); return; 553 case Iop_QShlN32Sx2: vex_printf("QShlN32Sx2"); return; 554 case Iop_QShlN64Sx1: vex_printf("QShlN64Sx1"); return; 555 case Iop_QSalN8x8: vex_printf("QSalN8x8"); return; 556 case Iop_QSalN16x4: vex_printf("QSalN16x4"); return; 557 case Iop_QSalN32x2: vex_printf("QSalN32x2"); return; 558 case Iop_QSalN64x1: vex_printf("QSalN64x1"); return; 559 case Iop_Sar8x8: vex_printf("Sar8x8"); return; 560 case Iop_Sar16x4: vex_printf("Sar16x4"); return; 561 case Iop_Sar32x2: vex_printf("Sar32x2"); return; 562 case Iop_Sal8x8: vex_printf("Sal8x8"); return; 563 case Iop_Sal16x4: vex_printf("Sal16x4"); return; 564 case Iop_Sal32x2: vex_printf("Sal32x2"); return; 565 case Iop_Sal64x1: vex_printf("Sal64x1"); return; 566 case Iop_Perm8x8: vex_printf("Perm8x8"); return; 567 case Iop_Reverse16_8x8: vex_printf("Reverse16_8x8"); return; 568 case Iop_Reverse32_8x8: vex_printf("Reverse32_8x8"); return; 569 case Iop_Reverse32_16x4: vex_printf("Reverse32_16x4"); return; 570 case Iop_Reverse64_8x8: vex_printf("Reverse64_8x8"); return; 571 case Iop_Reverse64_16x4: vex_printf("Reverse64_16x4"); return; 572 case Iop_Reverse64_32x2: vex_printf("Reverse64_32x2"); return; 573 case Iop_Abs32Fx2: vex_printf("Abs32Fx2"); return; 574 575 case Iop_CmpNEZ32x2: vex_printf("CmpNEZ32x2"); return; 576 case Iop_CmpNEZ16x4: vex_printf("CmpNEZ16x4"); return; 577 case Iop_CmpNEZ8x8: vex_printf("CmpNEZ8x8"); return; 578 579 case Iop_Add32Fx4: vex_printf("Add32Fx4"); return; 580 case Iop_Add32Fx2: vex_printf("Add32Fx2"); return; 581 case Iop_Add32F0x4: vex_printf("Add32F0x4"); return; 582 case Iop_Add64Fx2: vex_printf("Add64Fx2"); return; 583 case Iop_Add64F0x2: vex_printf("Add64F0x2"); return; 584 585 case Iop_Div32Fx4: vex_printf("Div32Fx4"); return; 586 case Iop_Div32F0x4: vex_printf("Div32F0x4"); return; 587 case Iop_Div64Fx2: vex_printf("Div64Fx2"); return; 588 case Iop_Div64F0x2: vex_printf("Div64F0x2"); return; 589 590 case Iop_Max32Fx4: vex_printf("Max32Fx4"); return; 591 case Iop_Max32Fx2: vex_printf("Max32Fx2"); return; 592 case Iop_PwMax32Fx4: vex_printf("PwMax32Fx4"); return; 593 case Iop_PwMax32Fx2: vex_printf("PwMax32Fx2"); return; 594 case Iop_Max32F0x4: vex_printf("Max32F0x4"); return; 595 case Iop_Max64Fx2: vex_printf("Max64Fx2"); return; 596 case Iop_Max64F0x2: vex_printf("Max64F0x2"); return; 597 598 case Iop_Min32Fx4: vex_printf("Min32Fx4"); return; 599 case Iop_Min32Fx2: vex_printf("Min32Fx2"); return; 600 case Iop_PwMin32Fx4: vex_printf("PwMin32Fx4"); return; 601 case Iop_PwMin32Fx2: vex_printf("PwMin32Fx2"); return; 602 case Iop_Min32F0x4: vex_printf("Min32F0x4"); return; 603 case Iop_Min64Fx2: vex_printf("Min64Fx2"); return; 604 case Iop_Min64F0x2: vex_printf("Min64F0x2"); return; 605 606 case Iop_Mul32Fx4: vex_printf("Mul32Fx4"); return; 607 case Iop_Mul32F0x4: vex_printf("Mul32F0x4"); return; 608 case Iop_Mul64Fx2: vex_printf("Mul64Fx2"); return; 609 case Iop_Mul64F0x2: vex_printf("Mul64F0x2"); return; 610 611 case Iop_Recip32x2: vex_printf("Recip32x2"); return; 612 case Iop_Recip32Fx2: vex_printf("Recip32Fx2"); return; 613 case Iop_Recip32Fx4: vex_printf("Recip32Fx4"); return; 614 case Iop_Recip32x4: vex_printf("Recip32x4"); return; 615 case Iop_Recip32F0x4: vex_printf("Recip32F0x4"); return; 616 case Iop_Recip64Fx2: vex_printf("Recip64Fx2"); return; 617 case Iop_Recip64F0x2: vex_printf("Recip64F0x2"); return; 618 case Iop_Recps32Fx2: vex_printf("VRecps32Fx2"); return; 619 case Iop_Recps32Fx4: vex_printf("VRecps32Fx4"); return; 620 case Iop_Abs32Fx4: vex_printf("Abs32Fx4"); return; 621 case Iop_Rsqrts32Fx4: vex_printf("VRsqrts32Fx4"); return; 622 case Iop_Rsqrts32Fx2: vex_printf("VRsqrts32Fx2"); return; 623 624 case Iop_RSqrt32Fx4: vex_printf("RSqrt32Fx4"); return; 625 case Iop_RSqrt32F0x4: vex_printf("RSqrt32F0x4"); return; 626 case Iop_RSqrt64Fx2: vex_printf("RSqrt64Fx2"); return; 627 case Iop_RSqrt64F0x2: vex_printf("RSqrt64F0x2"); return; 628 629 case Iop_Sqrt32Fx4: vex_printf("Sqrt32Fx4"); return; 630 case Iop_Sqrt32F0x4: vex_printf("Sqrt32F0x4"); return; 631 case Iop_Sqrt64Fx2: vex_printf("Sqrt64Fx2"); return; 632 case Iop_Sqrt64F0x2: vex_printf("Sqrt64F0x2"); return; 633 634 case Iop_Sub32Fx4: vex_printf("Sub32Fx4"); return; 635 case Iop_Sub32Fx2: vex_printf("Sub32Fx2"); return; 636 case Iop_Sub32F0x4: vex_printf("Sub32F0x4"); return; 637 case Iop_Sub64Fx2: vex_printf("Sub64Fx2"); return; 638 case Iop_Sub64F0x2: vex_printf("Sub64F0x2"); return; 639 640 case Iop_CmpEQ32Fx4: vex_printf("CmpEQ32Fx4"); return; 641 case Iop_CmpLT32Fx4: vex_printf("CmpLT32Fx4"); return; 642 case Iop_CmpLE32Fx4: vex_printf("CmpLE32Fx4"); return; 643 case Iop_CmpGT32Fx4: vex_printf("CmpGT32Fx4"); return; 644 case Iop_CmpGE32Fx4: vex_printf("CmpGE32Fx4"); return; 645 case Iop_CmpUN32Fx4: vex_printf("CmpUN32Fx4"); return; 646 case Iop_CmpEQ64Fx2: vex_printf("CmpEQ64Fx2"); return; 647 case Iop_CmpLT64Fx2: vex_printf("CmpLT64Fx2"); return; 648 case Iop_CmpLE64Fx2: vex_printf("CmpLE64Fx2"); return; 649 case Iop_CmpUN64Fx2: vex_printf("CmpUN64Fx2"); return; 650 case Iop_CmpGT32Fx2: vex_printf("CmpGT32Fx2"); return; 651 case Iop_CmpEQ32Fx2: vex_printf("CmpEQ32Fx2"); return; 652 case Iop_CmpGE32Fx2: vex_printf("CmpGE32Fx2"); return; 653 654 case Iop_CmpEQ32F0x4: vex_printf("CmpEQ32F0x4"); return; 655 case Iop_CmpLT32F0x4: vex_printf("CmpLT32F0x4"); return; 656 case Iop_CmpLE32F0x4: vex_printf("CmpLE32F0x4"); return; 657 case Iop_CmpUN32F0x4: vex_printf("CmpUN32F0x4"); return; 658 case Iop_CmpEQ64F0x2: vex_printf("CmpEQ64F0x2"); return; 659 case Iop_CmpLT64F0x2: vex_printf("CmpLT64F0x2"); return; 660 case Iop_CmpLE64F0x2: vex_printf("CmpLE64F0x2"); return; 661 case Iop_CmpUN64F0x2: vex_printf("CmpUN64F0x2"); return; 662 663 case Iop_Neg32Fx4: vex_printf("Neg32Fx4"); return; 664 case Iop_Neg32Fx2: vex_printf("Neg32Fx2"); return; 665 666 case Iop_V128to64: vex_printf("V128to64"); return; 667 case Iop_V128HIto64: vex_printf("V128HIto64"); return; 668 case Iop_64HLtoV128: vex_printf("64HLtoV128"); return; 669 670 case Iop_64UtoV128: vex_printf("64UtoV128"); return; 671 case Iop_SetV128lo64: vex_printf("SetV128lo64"); return; 672 673 case Iop_32UtoV128: vex_printf("32UtoV128"); return; 674 case Iop_V128to32: vex_printf("V128to32"); return; 675 case Iop_SetV128lo32: vex_printf("SetV128lo32"); return; 676 677 case Iop_Dup8x16: vex_printf("Dup8x16"); return; 678 case Iop_Dup16x8: vex_printf("Dup16x8"); return; 679 case Iop_Dup32x4: vex_printf("Dup32x4"); return; 680 case Iop_Dup8x8: vex_printf("Dup8x8"); return; 681 case Iop_Dup16x4: vex_printf("Dup16x4"); return; 682 case Iop_Dup32x2: vex_printf("Dup32x2"); return; 683 684 case Iop_NotV128: vex_printf("NotV128"); return; 685 case Iop_AndV128: vex_printf("AndV128"); return; 686 case Iop_OrV128: vex_printf("OrV128"); return; 687 case Iop_XorV128: vex_printf("XorV128"); return; 688 689 case Iop_CmpNEZ8x16: vex_printf("CmpNEZ8x16"); return; 690 case Iop_CmpNEZ16x8: vex_printf("CmpNEZ16x8"); return; 691 case Iop_CmpNEZ32x4: vex_printf("CmpNEZ32x4"); return; 692 case Iop_CmpNEZ64x2: vex_printf("CmpNEZ64x2"); return; 693 694 case Iop_Abs8x16: vex_printf("Abs8x16"); return; 695 case Iop_Abs16x8: vex_printf("Abs16x8"); return; 696 case Iop_Abs32x4: vex_printf("Abs32x4"); return; 697 698 case Iop_Add8x16: vex_printf("Add8x16"); return; 699 case Iop_Add16x8: vex_printf("Add16x8"); return; 700 case Iop_Add32x4: vex_printf("Add32x4"); return; 701 case Iop_Add64x2: vex_printf("Add64x2"); return; 702 case Iop_QAdd8Ux16: vex_printf("QAdd8Ux16"); return; 703 case Iop_QAdd16Ux8: vex_printf("QAdd16Ux8"); return; 704 case Iop_QAdd32Ux4: vex_printf("QAdd32Ux4"); return; 705 case Iop_QAdd8Sx16: vex_printf("QAdd8Sx16"); return; 706 case Iop_QAdd16Sx8: vex_printf("QAdd16Sx8"); return; 707 case Iop_QAdd32Sx4: vex_printf("QAdd32Sx4"); return; 708 case Iop_QAdd64Ux2: vex_printf("QAdd64Ux2"); return; 709 case Iop_QAdd64Sx2: vex_printf("QAdd64Sx2"); return; 710 case Iop_PwAdd8x16: vex_printf("PwAdd8x16"); return; 711 case Iop_PwAdd16x8: vex_printf("PwAdd16x8"); return; 712 case Iop_PwAdd32x4: vex_printf("PwAdd32x4"); return; 713 case Iop_PwAddL8Ux16: vex_printf("PwAddL8Ux16"); return; 714 case Iop_PwAddL16Ux8: vex_printf("PwAddL16Ux8"); return; 715 case Iop_PwAddL32Ux4: vex_printf("PwAddL32Ux4"); return; 716 case Iop_PwAddL8Sx16: vex_printf("PwAddL8Sx16"); return; 717 case Iop_PwAddL16Sx8: vex_printf("PwAddL16Sx8"); return; 718 case Iop_PwAddL32Sx4: vex_printf("PwAddL32Sx4"); return; 719 720 case Iop_Sub8x16: vex_printf("Sub8x16"); return; 721 case Iop_Sub16x8: vex_printf("Sub16x8"); return; 722 case Iop_Sub32x4: vex_printf("Sub32x4"); return; 723 case Iop_Sub64x2: vex_printf("Sub64x2"); return; 724 case Iop_QSub8Ux16: vex_printf("QSub8Ux16"); return; 725 case Iop_QSub16Ux8: vex_printf("QSub16Ux8"); return; 726 case Iop_QSub32Ux4: vex_printf("QSub32Ux4"); return; 727 case Iop_QSub8Sx16: vex_printf("QSub8Sx16"); return; 728 case Iop_QSub16Sx8: vex_printf("QSub16Sx8"); return; 729 case Iop_QSub32Sx4: vex_printf("QSub32Sx4"); return; 730 case Iop_QSub64Ux2: vex_printf("QSub64Ux2"); return; 731 case Iop_QSub64Sx2: vex_printf("QSub64Sx2"); return; 732 733 case Iop_Mul8x16: vex_printf("Mul8x16"); return; 734 case Iop_Mul16x8: vex_printf("Mul16x8"); return; 735 case Iop_Mul32x4: vex_printf("Mul32x4"); return; 736 case Iop_Mull8Ux8: vex_printf("Mull8Ux8"); return; 737 case Iop_Mull8Sx8: vex_printf("Mull8Sx8"); return; 738 case Iop_Mull16Ux4: vex_printf("Mull16Ux4"); return; 739 case Iop_Mull16Sx4: vex_printf("Mull16Sx4"); return; 740 case Iop_Mull32Ux2: vex_printf("Mull32Ux2"); return; 741 case Iop_Mull32Sx2: vex_printf("Mull32Sx2"); return; 742 case Iop_PolynomialMul8x16: vex_printf("PolynomialMul8x16"); return; 743 case Iop_PolynomialMull8x8: vex_printf("PolynomialMull8x8"); return; 744 case Iop_MulHi16Ux8: vex_printf("MulHi16Ux8"); return; 745 case Iop_MulHi32Ux4: vex_printf("MulHi32Ux4"); return; 746 case Iop_MulHi16Sx8: vex_printf("MulHi16Sx8"); return; 747 case Iop_MulHi32Sx4: vex_printf("MulHi32Sx4"); return; 748 case Iop_QDMulHi16Sx8: vex_printf("QDMulHi16Sx8"); return; 749 case Iop_QDMulHi32Sx4: vex_printf("QDMulHi32Sx4"); return; 750 case Iop_QRDMulHi16Sx8: vex_printf("QRDMulHi16Sx8"); return; 751 case Iop_QRDMulHi32Sx4: vex_printf("QRDMulHi32Sx4"); return; 752 753 case Iop_MullEven8Ux16: vex_printf("MullEven8Ux16"); return; 754 case Iop_MullEven16Ux8: vex_printf("MullEven16Ux8"); return; 755 case Iop_MullEven8Sx16: vex_printf("MullEven8Sx16"); return; 756 case Iop_MullEven16Sx8: vex_printf("MullEven16Sx8"); return; 757 758 case Iop_Avg8Ux16: vex_printf("Avg8Ux16"); return; 759 case Iop_Avg16Ux8: vex_printf("Avg16Ux8"); return; 760 case Iop_Avg32Ux4: vex_printf("Avg32Ux4"); return; 761 case Iop_Avg8Sx16: vex_printf("Avg8Sx16"); return; 762 case Iop_Avg16Sx8: vex_printf("Avg16Sx8"); return; 763 case Iop_Avg32Sx4: vex_printf("Avg32Sx4"); return; 764 765 case Iop_Max8Sx16: vex_printf("Max8Sx16"); return; 766 case Iop_Max16Sx8: vex_printf("Max16Sx8"); return; 767 case Iop_Max32Sx4: vex_printf("Max32Sx4"); return; 768 case Iop_Max8Ux16: vex_printf("Max8Ux16"); return; 769 case Iop_Max16Ux8: vex_printf("Max16Ux8"); return; 770 case Iop_Max32Ux4: vex_printf("Max32Ux4"); return; 771 772 case Iop_Min8Sx16: vex_printf("Min8Sx16"); return; 773 case Iop_Min16Sx8: vex_printf("Min16Sx8"); return; 774 case Iop_Min32Sx4: vex_printf("Min32Sx4"); return; 775 case Iop_Min8Ux16: vex_printf("Min8Ux16"); return; 776 case Iop_Min16Ux8: vex_printf("Min16Ux8"); return; 777 case Iop_Min32Ux4: vex_printf("Min32Ux4"); return; 778 779 case Iop_CmpEQ8x16: vex_printf("CmpEQ8x16"); return; 780 case Iop_CmpEQ16x8: vex_printf("CmpEQ16x8"); return; 781 case Iop_CmpEQ32x4: vex_printf("CmpEQ32x4"); return; 782 case Iop_CmpEQ64x2: vex_printf("CmpEQ64x2"); return; 783 case Iop_CmpGT8Sx16: vex_printf("CmpGT8Sx16"); return; 784 case Iop_CmpGT16Sx8: vex_printf("CmpGT16Sx8"); return; 785 case Iop_CmpGT32Sx4: vex_printf("CmpGT32Sx4"); return; 786 case Iop_CmpGT64Sx2: vex_printf("CmpGT64Sx2"); return; 787 case Iop_CmpGT8Ux16: vex_printf("CmpGT8Ux16"); return; 788 case Iop_CmpGT16Ux8: vex_printf("CmpGT16Ux8"); return; 789 case Iop_CmpGT32Ux4: vex_printf("CmpGT32Ux4"); return; 790 791 case Iop_Cnt8x16: vex_printf("Cnt8x16"); return; 792 case Iop_Clz8Sx16: vex_printf("Clz8Sx16"); return; 793 case Iop_Clz16Sx8: vex_printf("Clz16Sx8"); return; 794 case Iop_Clz32Sx4: vex_printf("Clz32Sx4"); return; 795 case Iop_Cls8Sx16: vex_printf("Cls8Sx16"); return; 796 case Iop_Cls16Sx8: vex_printf("Cls16Sx8"); return; 797 case Iop_Cls32Sx4: vex_printf("Cls32Sx4"); return; 798 799 case Iop_ShlV128: vex_printf("ShlV128"); return; 800 case Iop_ShrV128: vex_printf("ShrV128"); return; 801 802 case Iop_ShlN8x16: vex_printf("ShlN8x16"); return; 803 case Iop_ShlN16x8: vex_printf("ShlN16x8"); return; 804 case Iop_ShlN32x4: vex_printf("ShlN32x4"); return; 805 case Iop_ShlN64x2: vex_printf("ShlN64x2"); return; 806 case Iop_ShrN8x16: vex_printf("ShrN8x16"); return; 807 case Iop_ShrN16x8: vex_printf("ShrN16x8"); return; 808 case Iop_ShrN32x4: vex_printf("ShrN32x4"); return; 809 case Iop_ShrN64x2: vex_printf("ShrN64x2"); return; 810 case Iop_SarN8x16: vex_printf("SarN8x16"); return; 811 case Iop_SarN16x8: vex_printf("SarN16x8"); return; 812 case Iop_SarN32x4: vex_printf("SarN32x4"); return; 813 case Iop_SarN64x2: vex_printf("SarN64x2"); return; 814 815 case Iop_Shl8x16: vex_printf("Shl8x16"); return; 816 case Iop_Shl16x8: vex_printf("Shl16x8"); return; 817 case Iop_Shl32x4: vex_printf("Shl32x4"); return; 818 case Iop_Shl64x2: vex_printf("Shl64x2"); return; 819 case Iop_QSal8x16: vex_printf("QSal8x16"); return; 820 case Iop_QSal16x8: vex_printf("QSal16x8"); return; 821 case Iop_QSal32x4: vex_printf("QSal32x4"); return; 822 case Iop_QSal64x2: vex_printf("QSal64x2"); return; 823 case Iop_QShl8x16: vex_printf("QShl8x16"); return; 824 case Iop_QShl16x8: vex_printf("QShl16x8"); return; 825 case Iop_QShl32x4: vex_printf("QShl32x4"); return; 826 case Iop_QShl64x2: vex_printf("QShl64x2"); return; 827 case Iop_QSalN8x16: vex_printf("QSalN8x16"); return; 828 case Iop_QSalN16x8: vex_printf("QSalN16x8"); return; 829 case Iop_QSalN32x4: vex_printf("QSalN32x4"); return; 830 case Iop_QSalN64x2: vex_printf("QSalN64x2"); return; 831 case Iop_QShlN8x16: vex_printf("QShlN8x16"); return; 832 case Iop_QShlN16x8: vex_printf("QShlN16x8"); return; 833 case Iop_QShlN32x4: vex_printf("QShlN32x4"); return; 834 case Iop_QShlN64x2: vex_printf("QShlN64x2"); return; 835 case Iop_QShlN8Sx16: vex_printf("QShlN8Sx16"); return; 836 case Iop_QShlN16Sx8: vex_printf("QShlN16Sx8"); return; 837 case Iop_QShlN32Sx4: vex_printf("QShlN32Sx4"); return; 838 case Iop_QShlN64Sx2: vex_printf("QShlN64Sx2"); return; 839 case Iop_Shr8x16: vex_printf("Shr8x16"); return; 840 case Iop_Shr16x8: vex_printf("Shr16x8"); return; 841 case Iop_Shr32x4: vex_printf("Shr32x4"); return; 842 case Iop_Shr64x2: vex_printf("Shr64x2"); return; 843 case Iop_Sar8x16: vex_printf("Sar8x16"); return; 844 case Iop_Sar16x8: vex_printf("Sar16x8"); return; 845 case Iop_Sar32x4: vex_printf("Sar32x4"); return; 846 case Iop_Sar64x2: vex_printf("Sar64x2"); return; 847 case Iop_Sal8x16: vex_printf("Sal8x16"); return; 848 case Iop_Sal16x8: vex_printf("Sal16x8"); return; 849 case Iop_Sal32x4: vex_printf("Sal32x4"); return; 850 case Iop_Sal64x2: vex_printf("Sal64x2"); return; 851 case Iop_Rol8x16: vex_printf("Rol8x16"); return; 852 case Iop_Rol16x8: vex_printf("Rol16x8"); return; 853 case Iop_Rol32x4: vex_printf("Rol32x4"); return; 854 855 case Iop_NarrowBin16to8x16: vex_printf("NarrowBin16to8x16"); return; 856 case Iop_NarrowBin32to16x8: vex_printf("NarrowBin32to16x8"); return; 857 case Iop_QNarrowBin16Uto8Ux16: vex_printf("QNarrowBin16Uto8Ux16"); return; 858 case Iop_QNarrowBin32Sto16Ux8: vex_printf("QNarrowBin32Sto16Ux8"); return; 859 case Iop_QNarrowBin16Sto8Ux16: vex_printf("QNarrowBin16Sto8Ux16"); return; 860 case Iop_QNarrowBin32Uto16Ux8: vex_printf("QNarrowBin32Uto16Ux8"); return; 861 case Iop_QNarrowBin16Sto8Sx16: vex_printf("QNarrowBin16Sto8Sx16"); return; 862 case Iop_QNarrowBin32Sto16Sx8: vex_printf("QNarrowBin32Sto16Sx8"); return; 863 case Iop_NarrowUn16to8x8: vex_printf("NarrowUn16to8x8"); return; 864 case Iop_NarrowUn32to16x4: vex_printf("NarrowUn32to16x4"); return; 865 case Iop_NarrowUn64to32x2: vex_printf("NarrowUn64to32x2"); return; 866 case Iop_QNarrowUn16Uto8Ux8: vex_printf("QNarrowUn16Uto8Ux8"); return; 867 case Iop_QNarrowUn32Uto16Ux4: vex_printf("QNarrowUn32Uto16Ux4"); return; 868 case Iop_QNarrowUn64Uto32Ux2: vex_printf("QNarrowUn64Uto32Ux2"); return; 869 case Iop_QNarrowUn16Sto8Sx8: vex_printf("QNarrowUn16Sto8Sx8"); return; 870 case Iop_QNarrowUn32Sto16Sx4: vex_printf("QNarrowUn32Sto16Sx4"); return; 871 case Iop_QNarrowUn64Sto32Sx2: vex_printf("QNarrowUn64Sto32Sx2"); return; 872 case Iop_QNarrowUn16Sto8Ux8: vex_printf("QNarrowUn16Sto8Ux8"); return; 873 case Iop_QNarrowUn32Sto16Ux4: vex_printf("QNarrowUn32Sto16Ux4"); return; 874 case Iop_QNarrowUn64Sto32Ux2: vex_printf("QNarrowUn64Sto32Ux2"); return; 875 case Iop_Widen8Uto16x8: vex_printf("Widen8Uto16x8"); return; 876 case Iop_Widen16Uto32x4: vex_printf("Widen16Uto32x4"); return; 877 case Iop_Widen32Uto64x2: vex_printf("Widen32Uto64x2"); return; 878 case Iop_Widen8Sto16x8: vex_printf("Widen8Sto16x8"); return; 879 case Iop_Widen16Sto32x4: vex_printf("Widen16Sto32x4"); return; 880 case Iop_Widen32Sto64x2: vex_printf("Widen32Sto64x2"); return; 881 882 case Iop_InterleaveHI8x16: vex_printf("InterleaveHI8x16"); return; 883 case Iop_InterleaveHI16x8: vex_printf("InterleaveHI16x8"); return; 884 case Iop_InterleaveHI32x4: vex_printf("InterleaveHI32x4"); return; 885 case Iop_InterleaveHI64x2: vex_printf("InterleaveHI64x2"); return; 886 case Iop_InterleaveLO8x16: vex_printf("InterleaveLO8x16"); return; 887 case Iop_InterleaveLO16x8: vex_printf("InterleaveLO16x8"); return; 888 case Iop_InterleaveLO32x4: vex_printf("InterleaveLO32x4"); return; 889 case Iop_InterleaveLO64x2: vex_printf("InterleaveLO64x2"); return; 890 891 case Iop_CatOddLanes8x16: vex_printf("CatOddLanes8x16"); return; 892 case Iop_CatOddLanes16x8: vex_printf("CatOddLanes16x8"); return; 893 case Iop_CatOddLanes32x4: vex_printf("CatOddLanes32x4"); return; 894 case Iop_CatEvenLanes8x16: vex_printf("CatEvenLanes8x16"); return; 895 case Iop_CatEvenLanes16x8: vex_printf("CatEvenLanes16x8"); return; 896 case Iop_CatEvenLanes32x4: vex_printf("CatEvenLanes32x4"); return; 897 898 case Iop_InterleaveOddLanes8x16: vex_printf("InterleaveOddLanes8x16"); return; 899 case Iop_InterleaveOddLanes16x8: vex_printf("InterleaveOddLanes16x8"); return; 900 case Iop_InterleaveOddLanes32x4: vex_printf("InterleaveOddLanes32x4"); return; 901 case Iop_InterleaveEvenLanes8x16: vex_printf("InterleaveEvenLanes8x16"); return; 902 case Iop_InterleaveEvenLanes16x8: vex_printf("InterleaveEvenLanes16x8"); return; 903 case Iop_InterleaveEvenLanes32x4: vex_printf("InterleaveEvenLanes32x4"); return; 904 905 case Iop_GetElem8x16: vex_printf("GetElem8x16"); return; 906 case Iop_GetElem16x8: vex_printf("GetElem16x8"); return; 907 case Iop_GetElem32x4: vex_printf("GetElem32x4"); return; 908 case Iop_GetElem64x2: vex_printf("GetElem64x2"); return; 909 910 case Iop_GetElem8x8: vex_printf("GetElem8x8"); return; 911 case Iop_GetElem16x4: vex_printf("GetElem16x4"); return; 912 case Iop_GetElem32x2: vex_printf("GetElem32x2"); return; 913 case Iop_SetElem8x8: vex_printf("SetElem8x8"); return; 914 case Iop_SetElem16x4: vex_printf("SetElem16x4"); return; 915 case Iop_SetElem32x2: vex_printf("SetElem32x2"); return; 916 917 case Iop_Extract64: vex_printf("Extract64"); return; 918 case Iop_ExtractV128: vex_printf("ExtractV128"); return; 919 920 case Iop_Perm8x16: vex_printf("Perm8x16"); return; 921 case Iop_Reverse16_8x16: vex_printf("Reverse16_8x16"); return; 922 case Iop_Reverse32_8x16: vex_printf("Reverse32_8x16"); return; 923 case Iop_Reverse32_16x8: vex_printf("Reverse32_16x8"); return; 924 case Iop_Reverse64_8x16: vex_printf("Reverse64_8x16"); return; 925 case Iop_Reverse64_16x8: vex_printf("Reverse64_16x8"); return; 926 case Iop_Reverse64_32x4: vex_printf("Reverse64_32x4"); return; 927 928 case Iop_F32ToFixed32Ux4_RZ: vex_printf("F32ToFixed32Ux4_RZ"); return; 929 case Iop_F32ToFixed32Sx4_RZ: vex_printf("F32ToFixed32Sx4_RZ"); return; 930 case Iop_Fixed32UToF32x4_RN: vex_printf("Fixed32UToF32x4_RN"); return; 931 case Iop_Fixed32SToF32x4_RN: vex_printf("Fixed32SToF32x4_RN"); return; 932 case Iop_F32ToFixed32Ux2_RZ: vex_printf("F32ToFixed32Ux2_RZ"); return; 933 case Iop_F32ToFixed32Sx2_RZ: vex_printf("F32ToFixed32Sx2_RZ"); return; 934 case Iop_Fixed32UToF32x2_RN: vex_printf("Fixed32UToF32x2_RN"); return; 935 case Iop_Fixed32SToF32x2_RN: vex_printf("Fixed32SToF32x2_RN"); return; 936 937 default: vpanic("ppIROp(1)"); 938 } 939 940 vassert(str); 941 switch (op - base) { 942 case 0: vex_printf("%s",str); vex_printf("8"); break; 943 case 1: vex_printf("%s",str); vex_printf("16"); break; 944 case 2: vex_printf("%s",str); vex_printf("32"); break; 945 case 3: vex_printf("%s",str); vex_printf("64"); break; 946 default: vpanic("ppIROp(2)"); 947 } 948} 949 950void ppIRExpr ( IRExpr* e ) 951{ 952 Int i; 953 switch (e->tag) { 954 case Iex_Binder: 955 vex_printf("BIND-%d", e->Iex.Binder.binder); 956 break; 957 case Iex_Get: 958 vex_printf( "GET:" ); 959 ppIRType(e->Iex.Get.ty); 960 vex_printf("(%d)", e->Iex.Get.offset); 961 break; 962 case Iex_GetI: 963 vex_printf( "GETI" ); 964 ppIRRegArray(e->Iex.GetI.descr); 965 vex_printf("["); 966 ppIRExpr(e->Iex.GetI.ix); 967 vex_printf(",%d]", e->Iex.GetI.bias); 968 break; 969 case Iex_RdTmp: 970 ppIRTemp(e->Iex.RdTmp.tmp); 971 break; 972 case Iex_Qop: 973 ppIROp(e->Iex.Qop.op); 974 vex_printf( "(" ); 975 ppIRExpr(e->Iex.Qop.arg1); 976 vex_printf( "," ); 977 ppIRExpr(e->Iex.Qop.arg2); 978 vex_printf( "," ); 979 ppIRExpr(e->Iex.Qop.arg3); 980 vex_printf( "," ); 981 ppIRExpr(e->Iex.Qop.arg4); 982 vex_printf( ")" ); 983 break; 984 case Iex_Triop: 985 ppIROp(e->Iex.Triop.op); 986 vex_printf( "(" ); 987 ppIRExpr(e->Iex.Triop.arg1); 988 vex_printf( "," ); 989 ppIRExpr(e->Iex.Triop.arg2); 990 vex_printf( "," ); 991 ppIRExpr(e->Iex.Triop.arg3); 992 vex_printf( ")" ); 993 break; 994 case Iex_Binop: 995 ppIROp(e->Iex.Binop.op); 996 vex_printf( "(" ); 997 ppIRExpr(e->Iex.Binop.arg1); 998 vex_printf( "," ); 999 ppIRExpr(e->Iex.Binop.arg2); 1000 vex_printf( ")" ); 1001 break; 1002 case Iex_Unop: 1003 ppIROp(e->Iex.Unop.op); 1004 vex_printf( "(" ); 1005 ppIRExpr(e->Iex.Unop.arg); 1006 vex_printf( ")" ); 1007 break; 1008 case Iex_Load: 1009 vex_printf( "LD%s:", e->Iex.Load.end==Iend_LE ? "le" : "be" ); 1010 ppIRType(e->Iex.Load.ty); 1011 vex_printf( "(" ); 1012 ppIRExpr(e->Iex.Load.addr); 1013 vex_printf( ")" ); 1014 break; 1015 case Iex_Const: 1016 ppIRConst(e->Iex.Const.con); 1017 break; 1018 case Iex_CCall: 1019 ppIRCallee(e->Iex.CCall.cee); 1020 vex_printf("("); 1021 for (i = 0; e->Iex.CCall.args[i] != NULL; i++) { 1022 ppIRExpr(e->Iex.CCall.args[i]); 1023 if (e->Iex.CCall.args[i+1] != NULL) 1024 vex_printf(","); 1025 } 1026 vex_printf("):"); 1027 ppIRType(e->Iex.CCall.retty); 1028 break; 1029 case Iex_Mux0X: 1030 vex_printf("Mux0X("); 1031 ppIRExpr(e->Iex.Mux0X.cond); 1032 vex_printf(","); 1033 ppIRExpr(e->Iex.Mux0X.expr0); 1034 vex_printf(","); 1035 ppIRExpr(e->Iex.Mux0X.exprX); 1036 vex_printf(")"); 1037 break; 1038 default: 1039 vpanic("ppIRExpr"); 1040 } 1041} 1042 1043void ppIREffect ( IREffect fx ) 1044{ 1045 switch (fx) { 1046 case Ifx_None: vex_printf("noFX"); return; 1047 case Ifx_Read: vex_printf("RdFX"); return; 1048 case Ifx_Write: vex_printf("WrFX"); return; 1049 case Ifx_Modify: vex_printf("MoFX"); return; 1050 default: vpanic("ppIREffect"); 1051 } 1052} 1053 1054void ppIRDirty ( IRDirty* d ) 1055{ 1056 Int i; 1057 if (d->tmp != IRTemp_INVALID) { 1058 ppIRTemp(d->tmp); 1059 vex_printf(" = "); 1060 } 1061 vex_printf("DIRTY "); 1062 ppIRExpr(d->guard); 1063 if (d->needsBBP) 1064 vex_printf(" NeedsBBP"); 1065 if (d->mFx != Ifx_None) { 1066 vex_printf(" "); 1067 ppIREffect(d->mFx); 1068 vex_printf("-mem("); 1069 ppIRExpr(d->mAddr); 1070 vex_printf(",%d)", d->mSize); 1071 } 1072 for (i = 0; i < d->nFxState; i++) { 1073 vex_printf(" "); 1074 ppIREffect(d->fxState[i].fx); 1075 vex_printf("-gst(%d,%d)", d->fxState[i].offset, d->fxState[i].size); 1076 } 1077 vex_printf(" ::: "); 1078 ppIRCallee(d->cee); 1079 vex_printf("("); 1080 for (i = 0; d->args[i] != NULL; i++) { 1081 ppIRExpr(d->args[i]); 1082 if (d->args[i+1] != NULL) { 1083 vex_printf(","); 1084 } 1085 } 1086 vex_printf(")"); 1087} 1088 1089void ppIRCAS ( IRCAS* cas ) 1090{ 1091 /* Print even structurally invalid constructions, as an aid to 1092 debugging. */ 1093 if (cas->oldHi != IRTemp_INVALID) { 1094 ppIRTemp(cas->oldHi); 1095 vex_printf(","); 1096 } 1097 ppIRTemp(cas->oldLo); 1098 vex_printf(" = CAS%s(", cas->end==Iend_LE ? "le" : "be" ); 1099 ppIRExpr(cas->addr); 1100 vex_printf("::"); 1101 if (cas->expdHi) { 1102 ppIRExpr(cas->expdHi); 1103 vex_printf(","); 1104 } 1105 ppIRExpr(cas->expdLo); 1106 vex_printf("->"); 1107 if (cas->dataHi) { 1108 ppIRExpr(cas->dataHi); 1109 vex_printf(","); 1110 } 1111 ppIRExpr(cas->dataLo); 1112 vex_printf(")"); 1113} 1114 1115void ppIRJumpKind ( IRJumpKind kind ) 1116{ 1117 switch (kind) { 1118 case Ijk_Boring: vex_printf("Boring"); break; 1119 case Ijk_Call: vex_printf("Call"); break; 1120 case Ijk_Ret: vex_printf("Return"); break; 1121 case Ijk_ClientReq: vex_printf("ClientReq"); break; 1122 case Ijk_Yield: vex_printf("Yield"); break; 1123 case Ijk_YieldNoRedir: vex_printf("YieldNoRedir"); break; 1124 case Ijk_EmWarn: vex_printf("EmWarn"); break; 1125 case Ijk_EmFail: vex_printf("EmFail"); break; 1126 case Ijk_NoDecode: vex_printf("NoDecode"); break; 1127 case Ijk_MapFail: vex_printf("MapFail"); break; 1128 case Ijk_TInval: vex_printf("Invalidate"); break; 1129 case Ijk_NoRedir: vex_printf("NoRedir"); break; 1130 case Ijk_SigTRAP: vex_printf("SigTRAP"); break; 1131 case Ijk_SigSEGV: vex_printf("SigSEGV"); break; 1132 case Ijk_SigBUS: vex_printf("SigBUS"); break; 1133 case Ijk_Sys_syscall: vex_printf("Sys_syscall"); break; 1134 case Ijk_Sys_int32: vex_printf("Sys_int32"); break; 1135 case Ijk_Sys_int128: vex_printf("Sys_int128"); break; 1136 case Ijk_Sys_int129: vex_printf("Sys_int129"); break; 1137 case Ijk_Sys_int130: vex_printf("Sys_int130"); break; 1138 case Ijk_Sys_sysenter: vex_printf("Sys_sysenter"); break; 1139 default: vpanic("ppIRJumpKind"); 1140 } 1141} 1142 1143void ppIRMBusEvent ( IRMBusEvent event ) 1144{ 1145 switch (event) { 1146 case Imbe_Fence: 1147 vex_printf("Fence"); break; 1148 case Imbe_CancelReservation: 1149 vex_printf("CancelReservation"); break; 1150 default: 1151 vpanic("ppIRMBusEvent"); 1152 } 1153} 1154 1155void ppIRStmt ( IRStmt* s ) 1156{ 1157 if (!s) { 1158 vex_printf("!!! IRStmt* which is NULL !!!"); 1159 return; 1160 } 1161 switch (s->tag) { 1162 case Ist_NoOp: 1163 vex_printf("IR-NoOp"); 1164 break; 1165 case Ist_IMark: 1166 vex_printf( "------ IMark(0x%llx, %d, %u) ------", 1167 s->Ist.IMark.addr, s->Ist.IMark.len, 1168 (UInt)s->Ist.IMark.delta); 1169 break; 1170 case Ist_AbiHint: 1171 vex_printf("====== AbiHint("); 1172 ppIRExpr(s->Ist.AbiHint.base); 1173 vex_printf(", %d, ", s->Ist.AbiHint.len); 1174 ppIRExpr(s->Ist.AbiHint.nia); 1175 vex_printf(") ======"); 1176 break; 1177 case Ist_Put: 1178 vex_printf( "PUT(%d) = ", s->Ist.Put.offset); 1179 ppIRExpr(s->Ist.Put.data); 1180 break; 1181 case Ist_PutI: 1182 vex_printf( "PUTI" ); 1183 ppIRRegArray(s->Ist.PutI.descr); 1184 vex_printf("["); 1185 ppIRExpr(s->Ist.PutI.ix); 1186 vex_printf(",%d] = ", s->Ist.PutI.bias); 1187 ppIRExpr(s->Ist.PutI.data); 1188 break; 1189 case Ist_WrTmp: 1190 ppIRTemp(s->Ist.WrTmp.tmp); 1191 vex_printf( " = " ); 1192 ppIRExpr(s->Ist.WrTmp.data); 1193 break; 1194 case Ist_Store: 1195 vex_printf( "ST%s(", s->Ist.Store.end==Iend_LE ? "le" : "be" ); 1196 ppIRExpr(s->Ist.Store.addr); 1197 vex_printf( ") = "); 1198 ppIRExpr(s->Ist.Store.data); 1199 break; 1200 case Ist_CAS: 1201 ppIRCAS(s->Ist.CAS.details); 1202 break; 1203 case Ist_LLSC: 1204 if (s->Ist.LLSC.storedata == NULL) { 1205 ppIRTemp(s->Ist.LLSC.result); 1206 vex_printf(" = LD%s-Linked(", 1207 s->Ist.LLSC.end==Iend_LE ? "le" : "be"); 1208 ppIRExpr(s->Ist.LLSC.addr); 1209 vex_printf(")"); 1210 } else { 1211 ppIRTemp(s->Ist.LLSC.result); 1212 vex_printf(" = ( ST%s-Cond(", 1213 s->Ist.LLSC.end==Iend_LE ? "le" : "be"); 1214 ppIRExpr(s->Ist.LLSC.addr); 1215 vex_printf(") = "); 1216 ppIRExpr(s->Ist.LLSC.storedata); 1217 vex_printf(" )"); 1218 } 1219 break; 1220 case Ist_Dirty: 1221 ppIRDirty(s->Ist.Dirty.details); 1222 break; 1223 case Ist_MBE: 1224 vex_printf("IR-"); 1225 ppIRMBusEvent(s->Ist.MBE.event); 1226 break; 1227 case Ist_Exit: 1228 vex_printf( "if (" ); 1229 ppIRExpr(s->Ist.Exit.guard); 1230 vex_printf( ") goto {"); 1231 ppIRJumpKind(s->Ist.Exit.jk); 1232 vex_printf("} "); 1233 ppIRConst(s->Ist.Exit.dst); 1234 break; 1235 default: 1236 vpanic("ppIRStmt"); 1237 } 1238} 1239 1240void ppIRTypeEnv ( IRTypeEnv* env ) { 1241 UInt i; 1242 for (i = 0; i < env->types_used; i++) { 1243 if (i % 8 == 0) 1244 vex_printf( " "); 1245 ppIRTemp(i); 1246 vex_printf( ":"); 1247 ppIRType(env->types[i]); 1248 if (i % 8 == 7) 1249 vex_printf( "\n"); 1250 else 1251 vex_printf( " "); 1252 } 1253 if (env->types_used > 0 && env->types_used % 8 != 7) 1254 vex_printf( "\n"); 1255} 1256 1257void ppIRSB ( IRSB* bb ) 1258{ 1259 Int i; 1260 vex_printf("IRSB {\n"); 1261 ppIRTypeEnv(bb->tyenv); 1262 vex_printf("\n"); 1263 for (i = 0; i < bb->stmts_used; i++) { 1264 vex_printf( " "); 1265 ppIRStmt(bb->stmts[i]); 1266 vex_printf( "\n"); 1267 } 1268 vex_printf( " goto {"); 1269 ppIRJumpKind(bb->jumpkind); 1270 vex_printf( "} "); 1271 ppIRExpr( bb->next ); 1272 vex_printf( "\n}\n"); 1273} 1274 1275 1276/*---------------------------------------------------------------*/ 1277/*--- Constructors ---*/ 1278/*---------------------------------------------------------------*/ 1279 1280 1281/* Constructors -- IRConst */ 1282 1283IRConst* IRConst_U1 ( Bool bit ) 1284{ 1285 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1286 c->tag = Ico_U1; 1287 c->Ico.U1 = bit; 1288 /* call me paranoid; I don't care :-) */ 1289 vassert(bit == False || bit == True); 1290 return c; 1291} 1292IRConst* IRConst_U8 ( UChar u8 ) 1293{ 1294 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1295 c->tag = Ico_U8; 1296 c->Ico.U8 = u8; 1297 return c; 1298} 1299IRConst* IRConst_U16 ( UShort u16 ) 1300{ 1301 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1302 c->tag = Ico_U16; 1303 c->Ico.U16 = u16; 1304 return c; 1305} 1306IRConst* IRConst_U32 ( UInt u32 ) 1307{ 1308 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1309 c->tag = Ico_U32; 1310 c->Ico.U32 = u32; 1311 return c; 1312} 1313IRConst* IRConst_U64 ( ULong u64 ) 1314{ 1315 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1316 c->tag = Ico_U64; 1317 c->Ico.U64 = u64; 1318 return c; 1319} 1320IRConst* IRConst_F32 ( Float f32 ) 1321{ 1322 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1323 c->tag = Ico_F32; 1324 c->Ico.F32 = f32; 1325 return c; 1326} 1327IRConst* IRConst_F32i ( UInt f32i ) 1328{ 1329 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1330 c->tag = Ico_F32i; 1331 c->Ico.F32i = f32i; 1332 return c; 1333} 1334IRConst* IRConst_F64 ( Double f64 ) 1335{ 1336 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1337 c->tag = Ico_F64; 1338 c->Ico.F64 = f64; 1339 return c; 1340} 1341IRConst* IRConst_F64i ( ULong f64i ) 1342{ 1343 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1344 c->tag = Ico_F64i; 1345 c->Ico.F64i = f64i; 1346 return c; 1347} 1348IRConst* IRConst_V128 ( UShort con ) 1349{ 1350 IRConst* c = LibVEX_Alloc(sizeof(IRConst)); 1351 c->tag = Ico_V128; 1352 c->Ico.V128 = con; 1353 return c; 1354} 1355 1356/* Constructors -- IRCallee */ 1357 1358IRCallee* mkIRCallee ( Int regparms, HChar* name, void* addr ) 1359{ 1360 IRCallee* ce = LibVEX_Alloc(sizeof(IRCallee)); 1361 ce->regparms = regparms; 1362 ce->name = name; 1363 ce->addr = addr; 1364 ce->mcx_mask = 0; 1365 vassert(regparms >= 0 && regparms <= 3); 1366 vassert(name != NULL); 1367 vassert(addr != 0); 1368 return ce; 1369} 1370 1371 1372/* Constructors -- IRRegArray */ 1373 1374IRRegArray* mkIRRegArray ( Int base, IRType elemTy, Int nElems ) 1375{ 1376 IRRegArray* arr = LibVEX_Alloc(sizeof(IRRegArray)); 1377 arr->base = base; 1378 arr->elemTy = elemTy; 1379 arr->nElems = nElems; 1380 vassert(!(arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */)); 1381 vassert(!(arr->elemTy == Ity_I1)); 1382 vassert(!(arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */)); 1383 return arr; 1384} 1385 1386 1387/* Constructors -- IRExpr */ 1388 1389IRExpr* IRExpr_Binder ( Int binder ) { 1390 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1391 e->tag = Iex_Binder; 1392 e->Iex.Binder.binder = binder; 1393 return e; 1394} 1395IRExpr* IRExpr_Get ( Int off, IRType ty ) { 1396 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1397 e->tag = Iex_Get; 1398 e->Iex.Get.offset = off; 1399 e->Iex.Get.ty = ty; 1400 return e; 1401} 1402IRExpr* IRExpr_GetI ( IRRegArray* descr, IRExpr* ix, Int bias ) { 1403 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1404 e->tag = Iex_GetI; 1405 e->Iex.GetI.descr = descr; 1406 e->Iex.GetI.ix = ix; 1407 e->Iex.GetI.bias = bias; 1408 return e; 1409} 1410IRExpr* IRExpr_RdTmp ( IRTemp tmp ) { 1411 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1412 e->tag = Iex_RdTmp; 1413 e->Iex.RdTmp.tmp = tmp; 1414 return e; 1415} 1416IRExpr* IRExpr_Qop ( IROp op, IRExpr* arg1, IRExpr* arg2, 1417 IRExpr* arg3, IRExpr* arg4 ) { 1418 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1419 e->tag = Iex_Qop; 1420 e->Iex.Qop.op = op; 1421 e->Iex.Qop.arg1 = arg1; 1422 e->Iex.Qop.arg2 = arg2; 1423 e->Iex.Qop.arg3 = arg3; 1424 e->Iex.Qop.arg4 = arg4; 1425 return e; 1426} 1427IRExpr* IRExpr_Triop ( IROp op, IRExpr* arg1, 1428 IRExpr* arg2, IRExpr* arg3 ) { 1429 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1430 e->tag = Iex_Triop; 1431 e->Iex.Triop.op = op; 1432 e->Iex.Triop.arg1 = arg1; 1433 e->Iex.Triop.arg2 = arg2; 1434 e->Iex.Triop.arg3 = arg3; 1435 return e; 1436} 1437IRExpr* IRExpr_Binop ( IROp op, IRExpr* arg1, IRExpr* arg2 ) { 1438 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1439 e->tag = Iex_Binop; 1440 e->Iex.Binop.op = op; 1441 e->Iex.Binop.arg1 = arg1; 1442 e->Iex.Binop.arg2 = arg2; 1443 return e; 1444} 1445IRExpr* IRExpr_Unop ( IROp op, IRExpr* arg ) { 1446 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1447 e->tag = Iex_Unop; 1448 e->Iex.Unop.op = op; 1449 e->Iex.Unop.arg = arg; 1450 return e; 1451} 1452IRExpr* IRExpr_Load ( IREndness end, IRType ty, IRExpr* addr ) { 1453 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1454 e->tag = Iex_Load; 1455 e->Iex.Load.end = end; 1456 e->Iex.Load.ty = ty; 1457 e->Iex.Load.addr = addr; 1458 vassert(end == Iend_LE || end == Iend_BE); 1459 return e; 1460} 1461IRExpr* IRExpr_Const ( IRConst* con ) { 1462 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1463 e->tag = Iex_Const; 1464 e->Iex.Const.con = con; 1465 return e; 1466} 1467IRExpr* IRExpr_CCall ( IRCallee* cee, IRType retty, IRExpr** args ) { 1468 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1469 e->tag = Iex_CCall; 1470 e->Iex.CCall.cee = cee; 1471 e->Iex.CCall.retty = retty; 1472 e->Iex.CCall.args = args; 1473 return e; 1474} 1475IRExpr* IRExpr_Mux0X ( IRExpr* cond, IRExpr* expr0, IRExpr* exprX ) { 1476 IRExpr* e = LibVEX_Alloc(sizeof(IRExpr)); 1477 e->tag = Iex_Mux0X; 1478 e->Iex.Mux0X.cond = cond; 1479 e->Iex.Mux0X.expr0 = expr0; 1480 e->Iex.Mux0X.exprX = exprX; 1481 return e; 1482} 1483 1484 1485/* Constructors for NULL-terminated IRExpr expression vectors, 1486 suitable for use as arg lists in clean/dirty helper calls. */ 1487 1488IRExpr** mkIRExprVec_0 ( void ) { 1489 IRExpr** vec = LibVEX_Alloc(1 * sizeof(IRExpr*)); 1490 vec[0] = NULL; 1491 return vec; 1492} 1493IRExpr** mkIRExprVec_1 ( IRExpr* arg1 ) { 1494 IRExpr** vec = LibVEX_Alloc(2 * sizeof(IRExpr*)); 1495 vec[0] = arg1; 1496 vec[1] = NULL; 1497 return vec; 1498} 1499IRExpr** mkIRExprVec_2 ( IRExpr* arg1, IRExpr* arg2 ) { 1500 IRExpr** vec = LibVEX_Alloc(3 * sizeof(IRExpr*)); 1501 vec[0] = arg1; 1502 vec[1] = arg2; 1503 vec[2] = NULL; 1504 return vec; 1505} 1506IRExpr** mkIRExprVec_3 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3 ) { 1507 IRExpr** vec = LibVEX_Alloc(4 * sizeof(IRExpr*)); 1508 vec[0] = arg1; 1509 vec[1] = arg2; 1510 vec[2] = arg3; 1511 vec[3] = NULL; 1512 return vec; 1513} 1514IRExpr** mkIRExprVec_4 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1515 IRExpr* arg4 ) { 1516 IRExpr** vec = LibVEX_Alloc(5 * sizeof(IRExpr*)); 1517 vec[0] = arg1; 1518 vec[1] = arg2; 1519 vec[2] = arg3; 1520 vec[3] = arg4; 1521 vec[4] = NULL; 1522 return vec; 1523} 1524IRExpr** mkIRExprVec_5 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1525 IRExpr* arg4, IRExpr* arg5 ) { 1526 IRExpr** vec = LibVEX_Alloc(6 * sizeof(IRExpr*)); 1527 vec[0] = arg1; 1528 vec[1] = arg2; 1529 vec[2] = arg3; 1530 vec[3] = arg4; 1531 vec[4] = arg5; 1532 vec[5] = NULL; 1533 return vec; 1534} 1535IRExpr** mkIRExprVec_6 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1536 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6 ) { 1537 IRExpr** vec = LibVEX_Alloc(7 * sizeof(IRExpr*)); 1538 vec[0] = arg1; 1539 vec[1] = arg2; 1540 vec[2] = arg3; 1541 vec[3] = arg4; 1542 vec[4] = arg5; 1543 vec[5] = arg6; 1544 vec[6] = NULL; 1545 return vec; 1546} 1547IRExpr** mkIRExprVec_7 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1548 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6, 1549 IRExpr* arg7 ) { 1550 IRExpr** vec = LibVEX_Alloc(8 * sizeof(IRExpr*)); 1551 vec[0] = arg1; 1552 vec[1] = arg2; 1553 vec[2] = arg3; 1554 vec[3] = arg4; 1555 vec[4] = arg5; 1556 vec[5] = arg6; 1557 vec[6] = arg7; 1558 vec[7] = NULL; 1559 return vec; 1560} 1561IRExpr** mkIRExprVec_8 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1562 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6, 1563 IRExpr* arg7, IRExpr* arg8 ) { 1564 IRExpr** vec = LibVEX_Alloc(9 * sizeof(IRExpr*)); 1565 vec[0] = arg1; 1566 vec[1] = arg2; 1567 vec[2] = arg3; 1568 vec[3] = arg4; 1569 vec[4] = arg5; 1570 vec[5] = arg6; 1571 vec[6] = arg7; 1572 vec[7] = arg8; 1573 vec[8] = NULL; 1574 return vec; 1575} 1576 1577 1578/* Constructors -- IRDirty */ 1579 1580IRDirty* emptyIRDirty ( void ) { 1581 IRDirty* d = LibVEX_Alloc(sizeof(IRDirty)); 1582 d->cee = NULL; 1583 d->guard = NULL; 1584 d->args = NULL; 1585 d->tmp = IRTemp_INVALID; 1586 d->mFx = Ifx_None; 1587 d->mAddr = NULL; 1588 d->mSize = 0; 1589 d->needsBBP = False; 1590 d->nFxState = 0; 1591 return d; 1592} 1593 1594 1595/* Constructors -- IRCAS */ 1596 1597IRCAS* mkIRCAS ( IRTemp oldHi, IRTemp oldLo, 1598 IREndness end, IRExpr* addr, 1599 IRExpr* expdHi, IRExpr* expdLo, 1600 IRExpr* dataHi, IRExpr* dataLo ) { 1601 IRCAS* cas = LibVEX_Alloc(sizeof(IRCAS)); 1602 cas->oldHi = oldHi; 1603 cas->oldLo = oldLo; 1604 cas->end = end; 1605 cas->addr = addr; 1606 cas->expdHi = expdHi; 1607 cas->expdLo = expdLo; 1608 cas->dataHi = dataHi; 1609 cas->dataLo = dataLo; 1610 return cas; 1611} 1612 1613 1614/* Constructors -- IRStmt */ 1615 1616IRStmt* IRStmt_NoOp ( void ) 1617{ 1618 /* Just use a single static closure. */ 1619 static IRStmt static_closure; 1620 static_closure.tag = Ist_NoOp; 1621 return &static_closure; 1622} 1623IRStmt* IRStmt_IMark ( Addr64 addr, Int len, UChar delta ) { 1624 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 1625 s->tag = Ist_IMark; 1626 s->Ist.IMark.addr = addr; 1627 s->Ist.IMark.len = len; 1628 s->Ist.IMark.delta = delta; 1629 return s; 1630} 1631IRStmt* IRStmt_AbiHint ( IRExpr* base, Int len, IRExpr* nia ) { 1632 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 1633 s->tag = Ist_AbiHint; 1634 s->Ist.AbiHint.base = base; 1635 s->Ist.AbiHint.len = len; 1636 s->Ist.AbiHint.nia = nia; 1637 return s; 1638} 1639IRStmt* IRStmt_Put ( Int off, IRExpr* data ) { 1640 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 1641 s->tag = Ist_Put; 1642 s->Ist.Put.offset = off; 1643 s->Ist.Put.data = data; 1644 return s; 1645} 1646IRStmt* IRStmt_PutI ( IRRegArray* descr, IRExpr* ix, 1647 Int bias, IRExpr* data ) { 1648 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 1649 s->tag = Ist_PutI; 1650 s->Ist.PutI.descr = descr; 1651 s->Ist.PutI.ix = ix; 1652 s->Ist.PutI.bias = bias; 1653 s->Ist.PutI.data = data; 1654 return s; 1655} 1656IRStmt* IRStmt_WrTmp ( IRTemp tmp, IRExpr* data ) { 1657 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 1658 s->tag = Ist_WrTmp; 1659 s->Ist.WrTmp.tmp = tmp; 1660 s->Ist.WrTmp.data = data; 1661 return s; 1662} 1663IRStmt* IRStmt_Store ( IREndness end, IRExpr* addr, IRExpr* data ) { 1664 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 1665 s->tag = Ist_Store; 1666 s->Ist.Store.end = end; 1667 s->Ist.Store.addr = addr; 1668 s->Ist.Store.data = data; 1669 vassert(end == Iend_LE || end == Iend_BE); 1670 return s; 1671} 1672IRStmt* IRStmt_CAS ( IRCAS* cas ) { 1673 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 1674 s->tag = Ist_CAS; 1675 s->Ist.CAS.details = cas; 1676 return s; 1677} 1678IRStmt* IRStmt_LLSC ( IREndness end, 1679 IRTemp result, IRExpr* addr, IRExpr* storedata ) { 1680 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 1681 s->tag = Ist_LLSC; 1682 s->Ist.LLSC.end = end; 1683 s->Ist.LLSC.result = result; 1684 s->Ist.LLSC.addr = addr; 1685 s->Ist.LLSC.storedata = storedata; 1686 return s; 1687} 1688IRStmt* IRStmt_Dirty ( IRDirty* d ) 1689{ 1690 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 1691 s->tag = Ist_Dirty; 1692 s->Ist.Dirty.details = d; 1693 return s; 1694} 1695IRStmt* IRStmt_MBE ( IRMBusEvent event ) 1696{ 1697 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 1698 s->tag = Ist_MBE; 1699 s->Ist.MBE.event = event; 1700 return s; 1701} 1702IRStmt* IRStmt_Exit ( IRExpr* guard, IRJumpKind jk, IRConst* dst ) { 1703 IRStmt* s = LibVEX_Alloc(sizeof(IRStmt)); 1704 s->tag = Ist_Exit; 1705 s->Ist.Exit.guard = guard; 1706 s->Ist.Exit.jk = jk; 1707 s->Ist.Exit.dst = dst; 1708 return s; 1709} 1710 1711 1712/* Constructors -- IRTypeEnv */ 1713 1714IRTypeEnv* emptyIRTypeEnv ( void ) 1715{ 1716 IRTypeEnv* env = LibVEX_Alloc(sizeof(IRTypeEnv)); 1717 env->types = LibVEX_Alloc(8 * sizeof(IRType)); 1718 env->types_size = 8; 1719 env->types_used = 0; 1720 return env; 1721} 1722 1723 1724/* Constructors -- IRSB */ 1725 1726IRSB* emptyIRSB ( void ) 1727{ 1728 IRSB* bb = LibVEX_Alloc(sizeof(IRSB)); 1729 bb->tyenv = emptyIRTypeEnv(); 1730 bb->stmts_used = 0; 1731 bb->stmts_size = 8; 1732 bb->stmts = LibVEX_Alloc(bb->stmts_size * sizeof(IRStmt*)); 1733 bb->next = NULL; 1734 bb->jumpkind = Ijk_Boring; 1735 return bb; 1736} 1737 1738 1739/*---------------------------------------------------------------*/ 1740/*--- (Deep) copy constructors. These make complete copies ---*/ 1741/*--- the original, which can be modified without affecting ---*/ 1742/*--- the original. ---*/ 1743/*---------------------------------------------------------------*/ 1744 1745/* Copying IR Expr vectors (for call args). */ 1746 1747/* Shallow copy of an IRExpr vector */ 1748 1749IRExpr** shallowCopyIRExprVec ( IRExpr** vec ) 1750{ 1751 Int i; 1752 IRExpr** newvec; 1753 for (i = 0; vec[i]; i++) 1754 ; 1755 newvec = LibVEX_Alloc((i+1)*sizeof(IRExpr*)); 1756 for (i = 0; vec[i]; i++) 1757 newvec[i] = vec[i]; 1758 newvec[i] = NULL; 1759 return newvec; 1760} 1761 1762/* Deep copy of an IRExpr vector */ 1763 1764IRExpr** deepCopyIRExprVec ( IRExpr** vec ) 1765{ 1766 Int i; 1767 IRExpr** newvec = shallowCopyIRExprVec( vec ); 1768 for (i = 0; newvec[i]; i++) 1769 newvec[i] = deepCopyIRExpr(newvec[i]); 1770 return newvec; 1771} 1772 1773/* Deep copy constructors for all heap-allocated IR types follow. */ 1774 1775IRConst* deepCopyIRConst ( IRConst* c ) 1776{ 1777 switch (c->tag) { 1778 case Ico_U1: return IRConst_U1(c->Ico.U1); 1779 case Ico_U8: return IRConst_U8(c->Ico.U8); 1780 case Ico_U16: return IRConst_U16(c->Ico.U16); 1781 case Ico_U32: return IRConst_U32(c->Ico.U32); 1782 case Ico_U64: return IRConst_U64(c->Ico.U64); 1783 case Ico_F32: return IRConst_F32(c->Ico.F32); 1784 case Ico_F32i: return IRConst_F32i(c->Ico.F32i); 1785 case Ico_F64: return IRConst_F64(c->Ico.F64); 1786 case Ico_F64i: return IRConst_F64i(c->Ico.F64i); 1787 case Ico_V128: return IRConst_V128(c->Ico.V128); 1788 default: vpanic("deepCopyIRConst"); 1789 } 1790} 1791 1792IRCallee* deepCopyIRCallee ( IRCallee* ce ) 1793{ 1794 IRCallee* ce2 = mkIRCallee(ce->regparms, ce->name, ce->addr); 1795 ce2->mcx_mask = ce->mcx_mask; 1796 return ce2; 1797} 1798 1799IRRegArray* deepCopyIRRegArray ( IRRegArray* d ) 1800{ 1801 return mkIRRegArray(d->base, d->elemTy, d->nElems); 1802} 1803 1804IRExpr* deepCopyIRExpr ( IRExpr* e ) 1805{ 1806 switch (e->tag) { 1807 case Iex_Get: 1808 return IRExpr_Get(e->Iex.Get.offset, e->Iex.Get.ty); 1809 case Iex_GetI: 1810 return IRExpr_GetI(deepCopyIRRegArray(e->Iex.GetI.descr), 1811 deepCopyIRExpr(e->Iex.GetI.ix), 1812 e->Iex.GetI.bias); 1813 case Iex_RdTmp: 1814 return IRExpr_RdTmp(e->Iex.RdTmp.tmp); 1815 case Iex_Qop: 1816 return IRExpr_Qop(e->Iex.Qop.op, 1817 deepCopyIRExpr(e->Iex.Qop.arg1), 1818 deepCopyIRExpr(e->Iex.Qop.arg2), 1819 deepCopyIRExpr(e->Iex.Qop.arg3), 1820 deepCopyIRExpr(e->Iex.Qop.arg4)); 1821 case Iex_Triop: 1822 return IRExpr_Triop(e->Iex.Triop.op, 1823 deepCopyIRExpr(e->Iex.Triop.arg1), 1824 deepCopyIRExpr(e->Iex.Triop.arg2), 1825 deepCopyIRExpr(e->Iex.Triop.arg3)); 1826 case Iex_Binop: 1827 return IRExpr_Binop(e->Iex.Binop.op, 1828 deepCopyIRExpr(e->Iex.Binop.arg1), 1829 deepCopyIRExpr(e->Iex.Binop.arg2)); 1830 case Iex_Unop: 1831 return IRExpr_Unop(e->Iex.Unop.op, 1832 deepCopyIRExpr(e->Iex.Unop.arg)); 1833 case Iex_Load: 1834 return IRExpr_Load(e->Iex.Load.end, 1835 e->Iex.Load.ty, 1836 deepCopyIRExpr(e->Iex.Load.addr)); 1837 case Iex_Const: 1838 return IRExpr_Const(deepCopyIRConst(e->Iex.Const.con)); 1839 case Iex_CCall: 1840 return IRExpr_CCall(deepCopyIRCallee(e->Iex.CCall.cee), 1841 e->Iex.CCall.retty, 1842 deepCopyIRExprVec(e->Iex.CCall.args)); 1843 1844 case Iex_Mux0X: 1845 return IRExpr_Mux0X(deepCopyIRExpr(e->Iex.Mux0X.cond), 1846 deepCopyIRExpr(e->Iex.Mux0X.expr0), 1847 deepCopyIRExpr(e->Iex.Mux0X.exprX)); 1848 default: 1849 vpanic("deepCopyIRExpr"); 1850 } 1851} 1852 1853IRDirty* deepCopyIRDirty ( IRDirty* d ) 1854{ 1855 Int i; 1856 IRDirty* d2 = emptyIRDirty(); 1857 d2->cee = deepCopyIRCallee(d->cee); 1858 d2->guard = deepCopyIRExpr(d->guard); 1859 d2->args = deepCopyIRExprVec(d->args); 1860 d2->tmp = d->tmp; 1861 d2->mFx = d->mFx; 1862 d2->mAddr = d->mAddr==NULL ? NULL : deepCopyIRExpr(d->mAddr); 1863 d2->mSize = d->mSize; 1864 d2->needsBBP = d->needsBBP; 1865 d2->nFxState = d->nFxState; 1866 for (i = 0; i < d2->nFxState; i++) 1867 d2->fxState[i] = d->fxState[i]; 1868 return d2; 1869} 1870 1871IRCAS* deepCopyIRCAS ( IRCAS* cas ) 1872{ 1873 return mkIRCAS( cas->oldHi, cas->oldLo, cas->end, 1874 deepCopyIRExpr(cas->addr), 1875 cas->expdHi==NULL ? NULL : deepCopyIRExpr(cas->expdHi), 1876 deepCopyIRExpr(cas->expdLo), 1877 cas->dataHi==NULL ? NULL : deepCopyIRExpr(cas->dataHi), 1878 deepCopyIRExpr(cas->dataLo) ); 1879} 1880 1881IRStmt* deepCopyIRStmt ( IRStmt* s ) 1882{ 1883 switch (s->tag) { 1884 case Ist_NoOp: 1885 return IRStmt_NoOp(); 1886 case Ist_AbiHint: 1887 return IRStmt_AbiHint(deepCopyIRExpr(s->Ist.AbiHint.base), 1888 s->Ist.AbiHint.len, 1889 deepCopyIRExpr(s->Ist.AbiHint.nia)); 1890 case Ist_IMark: 1891 return IRStmt_IMark(s->Ist.IMark.addr, 1892 s->Ist.IMark.len, 1893 s->Ist.IMark.delta); 1894 case Ist_Put: 1895 return IRStmt_Put(s->Ist.Put.offset, 1896 deepCopyIRExpr(s->Ist.Put.data)); 1897 case Ist_PutI: 1898 return IRStmt_PutI(deepCopyIRRegArray(s->Ist.PutI.descr), 1899 deepCopyIRExpr(s->Ist.PutI.ix), 1900 s->Ist.PutI.bias, 1901 deepCopyIRExpr(s->Ist.PutI.data)); 1902 case Ist_WrTmp: 1903 return IRStmt_WrTmp(s->Ist.WrTmp.tmp, 1904 deepCopyIRExpr(s->Ist.WrTmp.data)); 1905 case Ist_Store: 1906 return IRStmt_Store(s->Ist.Store.end, 1907 deepCopyIRExpr(s->Ist.Store.addr), 1908 deepCopyIRExpr(s->Ist.Store.data)); 1909 case Ist_CAS: 1910 return IRStmt_CAS(deepCopyIRCAS(s->Ist.CAS.details)); 1911 case Ist_LLSC: 1912 return IRStmt_LLSC(s->Ist.LLSC.end, 1913 s->Ist.LLSC.result, 1914 deepCopyIRExpr(s->Ist.LLSC.addr), 1915 s->Ist.LLSC.storedata 1916 ? deepCopyIRExpr(s->Ist.LLSC.storedata) 1917 : NULL); 1918 case Ist_Dirty: 1919 return IRStmt_Dirty(deepCopyIRDirty(s->Ist.Dirty.details)); 1920 case Ist_MBE: 1921 return IRStmt_MBE(s->Ist.MBE.event); 1922 case Ist_Exit: 1923 return IRStmt_Exit(deepCopyIRExpr(s->Ist.Exit.guard), 1924 s->Ist.Exit.jk, 1925 deepCopyIRConst(s->Ist.Exit.dst)); 1926 default: 1927 vpanic("deepCopyIRStmt"); 1928 } 1929} 1930 1931IRTypeEnv* deepCopyIRTypeEnv ( IRTypeEnv* src ) 1932{ 1933 Int i; 1934 IRTypeEnv* dst = LibVEX_Alloc(sizeof(IRTypeEnv)); 1935 dst->types_size = src->types_size; 1936 dst->types_used = src->types_used; 1937 dst->types = LibVEX_Alloc(dst->types_size * sizeof(IRType)); 1938 for (i = 0; i < src->types_used; i++) 1939 dst->types[i] = src->types[i]; 1940 return dst; 1941} 1942 1943IRSB* deepCopyIRSB ( IRSB* bb ) 1944{ 1945 Int i; 1946 IRStmt** sts2; 1947 IRSB* bb2 = deepCopyIRSBExceptStmts(bb); 1948 bb2->stmts_used = bb2->stmts_size = bb->stmts_used; 1949 sts2 = LibVEX_Alloc(bb2->stmts_used * sizeof(IRStmt*)); 1950 for (i = 0; i < bb2->stmts_used; i++) 1951 sts2[i] = deepCopyIRStmt(bb->stmts[i]); 1952 bb2->stmts = sts2; 1953 return bb2; 1954} 1955 1956IRSB* deepCopyIRSBExceptStmts ( IRSB* bb ) 1957{ 1958 IRSB* bb2 = emptyIRSB(); 1959 bb2->tyenv = deepCopyIRTypeEnv(bb->tyenv); 1960 bb2->next = deepCopyIRExpr(bb->next); 1961 bb2->jumpkind = bb->jumpkind; 1962 return bb2; 1963} 1964 1965 1966/*---------------------------------------------------------------*/ 1967/*--- Primop types ---*/ 1968/*---------------------------------------------------------------*/ 1969 1970static 1971void typeOfPrimop ( IROp op, 1972 /*OUTs*/ 1973 IRType* t_dst, 1974 IRType* t_arg1, IRType* t_arg2, 1975 IRType* t_arg3, IRType* t_arg4 ) 1976{ 1977# define UNARY(_ta1,_td) \ 1978 *t_dst = (_td); *t_arg1 = (_ta1); break 1979# define BINARY(_ta1,_ta2,_td) \ 1980 *t_dst = (_td); *t_arg1 = (_ta1); *t_arg2 = (_ta2); break 1981# define TERNARY(_ta1,_ta2,_ta3,_td) \ 1982 *t_dst = (_td); *t_arg1 = (_ta1); \ 1983 *t_arg2 = (_ta2); *t_arg3 = (_ta3); break 1984# define QUATERNARY(_ta1,_ta2,_ta3,_ta4,_td) \ 1985 *t_dst = (_td); *t_arg1 = (_ta1); \ 1986 *t_arg2 = (_ta2); *t_arg3 = (_ta3); \ 1987 *t_arg4 = (_ta4); break 1988# define COMPARISON(_ta) \ 1989 *t_dst = Ity_I1; *t_arg1 = *t_arg2 = (_ta); break; 1990# define UNARY_COMPARISON(_ta) \ 1991 *t_dst = Ity_I1; *t_arg1 = (_ta); break; 1992 1993 /* Rounding mode values are always Ity_I32, encoded as per 1994 IRRoundingMode */ 1995 const IRType ity_RMode = Ity_I32; 1996 1997 *t_dst = Ity_INVALID; 1998 *t_arg1 = Ity_INVALID; 1999 *t_arg2 = Ity_INVALID; 2000 *t_arg3 = Ity_INVALID; 2001 *t_arg4 = Ity_INVALID; 2002 switch (op) { 2003 case Iop_Add8: case Iop_Sub8: case Iop_Mul8: 2004 case Iop_Or8: case Iop_And8: case Iop_Xor8: 2005 BINARY(Ity_I8,Ity_I8, Ity_I8); 2006 2007 case Iop_Add16: case Iop_Sub16: case Iop_Mul16: 2008 case Iop_Or16: case Iop_And16: case Iop_Xor16: 2009 BINARY(Ity_I16,Ity_I16, Ity_I16); 2010 2011 case Iop_CmpORD32U: 2012 case Iop_CmpORD32S: 2013 case Iop_Add32: case Iop_Sub32: case Iop_Mul32: 2014 case Iop_Or32: case Iop_And32: case Iop_Xor32: 2015 case Iop_Max32U: 2016 case Iop_Add16x2: case Iop_Sub16x2: 2017 case Iop_QAdd16Sx2: case Iop_QAdd16Ux2: 2018 case Iop_QSub16Sx2: case Iop_QSub16Ux2: 2019 case Iop_HAdd16Ux2: case Iop_HAdd16Sx2: 2020 case Iop_HSub16Ux2: case Iop_HSub16Sx2: 2021 case Iop_Add8x4: case Iop_Sub8x4: 2022 case Iop_QAdd8Sx4: case Iop_QAdd8Ux4: 2023 case Iop_QSub8Sx4: case Iop_QSub8Ux4: 2024 case Iop_HAdd8Ux4: case Iop_HAdd8Sx4: 2025 case Iop_HSub8Ux4: case Iop_HSub8Sx4: 2026 case Iop_Sad8Ux4: 2027 BINARY(Ity_I32,Ity_I32, Ity_I32); 2028 2029 case Iop_Add64: case Iop_Sub64: case Iop_Mul64: 2030 case Iop_Or64: case Iop_And64: case Iop_Xor64: 2031 case Iop_CmpORD64U: 2032 case Iop_CmpORD64S: 2033 case Iop_Avg8Ux8: case Iop_Avg16Ux4: 2034 case Iop_Add8x8: case Iop_Add16x4: case Iop_Add32x2: 2035 case Iop_Add32Fx2: case Iop_Sub32Fx2: 2036 case Iop_CmpEQ8x8: case Iop_CmpEQ16x4: case Iop_CmpEQ32x2: 2037 case Iop_CmpGT8Sx8: case Iop_CmpGT16Sx4: case Iop_CmpGT32Sx2: 2038 case Iop_CmpGT8Ux8: case Iop_CmpGT16Ux4: case Iop_CmpGT32Ux2: 2039 case Iop_CmpGT32Fx2: case Iop_CmpEQ32Fx2: case Iop_CmpGE32Fx2: 2040 case Iop_InterleaveHI8x8: case Iop_InterleaveLO8x8: 2041 case Iop_InterleaveHI16x4: case Iop_InterleaveLO16x4: 2042 case Iop_InterleaveHI32x2: case Iop_InterleaveLO32x2: 2043 case Iop_CatOddLanes8x8: case Iop_CatEvenLanes8x8: 2044 case Iop_CatOddLanes16x4: case Iop_CatEvenLanes16x4: 2045 case Iop_InterleaveOddLanes8x8: case Iop_InterleaveEvenLanes8x8: 2046 case Iop_InterleaveOddLanes16x4: case Iop_InterleaveEvenLanes16x4: 2047 case Iop_Perm8x8: 2048 case Iop_Max8Ux8: case Iop_Max16Ux4: case Iop_Max32Ux2: 2049 case Iop_Max8Sx8: case Iop_Max16Sx4: case Iop_Max32Sx2: 2050 case Iop_Max32Fx2: case Iop_Min32Fx2: 2051 case Iop_PwMax32Fx2: case Iop_PwMin32Fx2: 2052 case Iop_Min8Ux8: case Iop_Min16Ux4: case Iop_Min32Ux2: 2053 case Iop_Min8Sx8: case Iop_Min16Sx4: case Iop_Min32Sx2: 2054 case Iop_PwMax8Ux8: case Iop_PwMax16Ux4: case Iop_PwMax32Ux2: 2055 case Iop_PwMax8Sx8: case Iop_PwMax16Sx4: case Iop_PwMax32Sx2: 2056 case Iop_PwMin8Ux8: case Iop_PwMin16Ux4: case Iop_PwMin32Ux2: 2057 case Iop_PwMin8Sx8: case Iop_PwMin16Sx4: case Iop_PwMin32Sx2: 2058 case Iop_Mul8x8: case Iop_Mul16x4: case Iop_Mul32x2: 2059 case Iop_Mul32Fx2: 2060 case Iop_PolynomialMul8x8: 2061 case Iop_MulHi16Sx4: case Iop_MulHi16Ux4: 2062 case Iop_QDMulHi16Sx4: case Iop_QDMulHi32Sx2: 2063 case Iop_QRDMulHi16Sx4: case Iop_QRDMulHi32Sx2: 2064 case Iop_QAdd8Sx8: case Iop_QAdd16Sx4: 2065 case Iop_QAdd32Sx2: case Iop_QAdd64Sx1: 2066 case Iop_QAdd8Ux8: case Iop_QAdd16Ux4: 2067 case Iop_QAdd32Ux2: case Iop_QAdd64Ux1: 2068 case Iop_PwAdd8x8: case Iop_PwAdd16x4: case Iop_PwAdd32x2: 2069 case Iop_PwAdd32Fx2: 2070 case Iop_QNarrowBin32Sto16Sx4: 2071 case Iop_QNarrowBin16Sto8Sx8: case Iop_QNarrowBin16Sto8Ux8: 2072 case Iop_NarrowBin16to8x8: case Iop_NarrowBin32to16x4: 2073 case Iop_Sub8x8: case Iop_Sub16x4: case Iop_Sub32x2: 2074 case Iop_QSub8Sx8: case Iop_QSub16Sx4: 2075 case Iop_QSub32Sx2: case Iop_QSub64Sx1: 2076 case Iop_QSub8Ux8: case Iop_QSub16Ux4: 2077 case Iop_QSub32Ux2: case Iop_QSub64Ux1: 2078 case Iop_Shl8x8: case Iop_Shl16x4: case Iop_Shl32x2: 2079 case Iop_Shr8x8: case Iop_Shr16x4: case Iop_Shr32x2: 2080 case Iop_Sar8x8: case Iop_Sar16x4: case Iop_Sar32x2: 2081 case Iop_Sal8x8: case Iop_Sal16x4: case Iop_Sal32x2: case Iop_Sal64x1: 2082 case Iop_QShl8x8: case Iop_QShl16x4: case Iop_QShl32x2: case Iop_QShl64x1: 2083 case Iop_QSal8x8: case Iop_QSal16x4: case Iop_QSal32x2: case Iop_QSal64x1: 2084 case Iop_Recps32Fx2: 2085 case Iop_Rsqrts32Fx2: 2086 BINARY(Ity_I64,Ity_I64, Ity_I64); 2087 2088 case Iop_ShlN32x2: case Iop_ShlN16x4: case Iop_ShlN8x8: 2089 case Iop_ShrN32x2: case Iop_ShrN16x4: case Iop_ShrN8x8: 2090 case Iop_SarN32x2: case Iop_SarN16x4: case Iop_SarN8x8: 2091 case Iop_QShlN8x8: case Iop_QShlN16x4: 2092 case Iop_QShlN32x2: case Iop_QShlN64x1: 2093 case Iop_QShlN8Sx8: case Iop_QShlN16Sx4: 2094 case Iop_QShlN32Sx2: case Iop_QShlN64Sx1: 2095 case Iop_QSalN8x8: case Iop_QSalN16x4: 2096 case Iop_QSalN32x2: case Iop_QSalN64x1: 2097 BINARY(Ity_I64,Ity_I8, Ity_I64); 2098 2099 case Iop_Shl8: case Iop_Shr8: case Iop_Sar8: 2100 BINARY(Ity_I8,Ity_I8, Ity_I8); 2101 case Iop_Shl16: case Iop_Shr16: case Iop_Sar16: 2102 BINARY(Ity_I16,Ity_I8, Ity_I16); 2103 case Iop_Shl32: case Iop_Shr32: case Iop_Sar32: 2104 BINARY(Ity_I32,Ity_I8, Ity_I32); 2105 case Iop_Shl64: case Iop_Shr64: case Iop_Sar64: 2106 BINARY(Ity_I64,Ity_I8, Ity_I64); 2107 2108 case Iop_Not8: 2109 UNARY(Ity_I8, Ity_I8); 2110 case Iop_Not16: 2111 UNARY(Ity_I16, Ity_I16); 2112 case Iop_Not32: 2113 case Iop_CmpNEZ16x2: case Iop_CmpNEZ8x4: 2114 UNARY(Ity_I32, Ity_I32); 2115 2116 case Iop_Not64: 2117 case Iop_CmpNEZ32x2: case Iop_CmpNEZ16x4: case Iop_CmpNEZ8x8: 2118 case Iop_Cnt8x8: 2119 case Iop_Clz8Sx8: case Iop_Clz16Sx4: case Iop_Clz32Sx2: 2120 case Iop_Cls8Sx8: case Iop_Cls16Sx4: case Iop_Cls32Sx2: 2121 case Iop_PwAddL8Ux8: case Iop_PwAddL16Ux4: case Iop_PwAddL32Ux2: 2122 case Iop_PwAddL8Sx8: case Iop_PwAddL16Sx4: case Iop_PwAddL32Sx2: 2123 case Iop_Reverse64_8x8: case Iop_Reverse64_16x4: case Iop_Reverse64_32x2: 2124 case Iop_Reverse32_8x8: case Iop_Reverse32_16x4: 2125 case Iop_Reverse16_8x8: 2126 case Iop_FtoI32Sx2_RZ: case Iop_FtoI32Ux2_RZ: 2127 case Iop_I32StoFx2: case Iop_I32UtoFx2: 2128 case Iop_Recip32x2: case Iop_Recip32Fx2: 2129 case Iop_Abs32Fx2: 2130 case Iop_Rsqrte32Fx2: 2131 case Iop_Rsqrte32x2: 2132 case Iop_Neg32Fx2: 2133 case Iop_Abs8x8: case Iop_Abs16x4: case Iop_Abs32x2: 2134 UNARY(Ity_I64, Ity_I64); 2135 2136 case Iop_CmpEQ8: case Iop_CmpNE8: 2137 case Iop_CasCmpEQ8: case Iop_CasCmpNE8: 2138 COMPARISON(Ity_I8); 2139 case Iop_CmpEQ16: case Iop_CmpNE16: 2140 case Iop_CasCmpEQ16: case Iop_CasCmpNE16: 2141 COMPARISON(Ity_I16); 2142 case Iop_CmpEQ32: case Iop_CmpNE32: 2143 case Iop_CasCmpEQ32: case Iop_CasCmpNE32: 2144 case Iop_CmpLT32S: case Iop_CmpLE32S: 2145 case Iop_CmpLT32U: case Iop_CmpLE32U: 2146 COMPARISON(Ity_I32); 2147 case Iop_CmpEQ64: case Iop_CmpNE64: 2148 case Iop_CasCmpEQ64: case Iop_CasCmpNE64: 2149 case Iop_CmpLT64S: case Iop_CmpLE64S: 2150 case Iop_CmpLT64U: case Iop_CmpLE64U: 2151 COMPARISON(Ity_I64); 2152 2153 case Iop_CmpNEZ8: UNARY_COMPARISON(Ity_I8); 2154 case Iop_CmpNEZ16: UNARY_COMPARISON(Ity_I16); 2155 case Iop_CmpNEZ32: UNARY_COMPARISON(Ity_I32); 2156 case Iop_CmpNEZ64: UNARY_COMPARISON(Ity_I64); 2157 2158 case Iop_Left8: UNARY(Ity_I8, Ity_I8); 2159 case Iop_Left16: UNARY(Ity_I16,Ity_I16); 2160 case Iop_CmpwNEZ32: case Iop_Left32: UNARY(Ity_I32,Ity_I32); 2161 case Iop_CmpwNEZ64: case Iop_Left64: UNARY(Ity_I64,Ity_I64); 2162 2163 case Iop_MullU8: case Iop_MullS8: 2164 BINARY(Ity_I8,Ity_I8, Ity_I16); 2165 case Iop_MullU16: case Iop_MullS16: 2166 BINARY(Ity_I16,Ity_I16, Ity_I32); 2167 case Iop_MullU32: case Iop_MullS32: 2168 BINARY(Ity_I32,Ity_I32, Ity_I64); 2169 case Iop_MullU64: case Iop_MullS64: 2170 BINARY(Ity_I64,Ity_I64, Ity_I128); 2171 2172 case Iop_Clz32: case Iop_Ctz32: 2173 UNARY(Ity_I32, Ity_I32); 2174 2175 case Iop_Clz64: case Iop_Ctz64: 2176 UNARY(Ity_I64, Ity_I64); 2177 2178 case Iop_DivU32: case Iop_DivS32: case Iop_DivU32E: case Iop_DivS32E: 2179 BINARY(Ity_I32,Ity_I32, Ity_I32); 2180 2181 case Iop_DivU64: case Iop_DivS64: case Iop_DivS64E: case Iop_DivU64E: 2182 BINARY(Ity_I64,Ity_I64, Ity_I64); 2183 2184 case Iop_DivModU64to32: case Iop_DivModS64to32: 2185 BINARY(Ity_I64,Ity_I32, Ity_I64); 2186 2187 case Iop_DivModU128to64: case Iop_DivModS128to64: 2188 BINARY(Ity_I128,Ity_I64, Ity_I128); 2189 2190 case Iop_DivModS64to64: 2191 BINARY(Ity_I64,Ity_I64, Ity_I128); 2192 2193 case Iop_16HIto8: case Iop_16to8: 2194 UNARY(Ity_I16, Ity_I8); 2195 case Iop_8HLto16: 2196 BINARY(Ity_I8,Ity_I8, Ity_I16); 2197 2198 case Iop_32HIto16: case Iop_32to16: 2199 UNARY(Ity_I32, Ity_I16); 2200 case Iop_16HLto32: 2201 BINARY(Ity_I16,Ity_I16, Ity_I32); 2202 2203 case Iop_64HIto32: case Iop_64to32: 2204 UNARY(Ity_I64, Ity_I32); 2205 case Iop_32HLto64: 2206 BINARY(Ity_I32,Ity_I32, Ity_I64); 2207 2208 case Iop_128HIto64: case Iop_128to64: 2209 UNARY(Ity_I128, Ity_I64); 2210 case Iop_64HLto128: 2211 BINARY(Ity_I64,Ity_I64, Ity_I128); 2212 2213 case Iop_Not1: UNARY(Ity_I1, Ity_I1); 2214 case Iop_1Uto8: UNARY(Ity_I1, Ity_I8); 2215 case Iop_1Sto8: UNARY(Ity_I1, Ity_I8); 2216 case Iop_1Sto16: UNARY(Ity_I1, Ity_I16); 2217 case Iop_1Uto32: case Iop_1Sto32: UNARY(Ity_I1, Ity_I32); 2218 case Iop_1Sto64: case Iop_1Uto64: UNARY(Ity_I1, Ity_I64); 2219 case Iop_32to1: UNARY(Ity_I32, Ity_I1); 2220 case Iop_64to1: UNARY(Ity_I64, Ity_I1); 2221 2222 case Iop_8Uto32: case Iop_8Sto32: 2223 UNARY(Ity_I8, Ity_I32); 2224 2225 case Iop_8Uto16: case Iop_8Sto16: 2226 UNARY(Ity_I8, Ity_I16); 2227 2228 case Iop_16Uto32: case Iop_16Sto32: 2229 UNARY(Ity_I16, Ity_I32); 2230 2231 case Iop_32Sto64: case Iop_32Uto64: 2232 UNARY(Ity_I32, Ity_I64); 2233 2234 case Iop_8Uto64: case Iop_8Sto64: 2235 UNARY(Ity_I8, Ity_I64); 2236 2237 case Iop_16Uto64: case Iop_16Sto64: 2238 UNARY(Ity_I16, Ity_I64); 2239 case Iop_64to16: 2240 UNARY(Ity_I64, Ity_I16); 2241 2242 case Iop_32to8: UNARY(Ity_I32, Ity_I8); 2243 case Iop_64to8: UNARY(Ity_I64, Ity_I8); 2244 2245 case Iop_AddF64: case Iop_SubF64: 2246 case Iop_MulF64: case Iop_DivF64: 2247 case Iop_AddF64r32: case Iop_SubF64r32: 2248 case Iop_MulF64r32: case Iop_DivF64r32: 2249 TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64); 2250 2251 case Iop_AddF32: case Iop_SubF32: 2252 case Iop_MulF32: case Iop_DivF32: 2253 TERNARY(ity_RMode,Ity_F32,Ity_F32, Ity_F32); 2254 2255 case Iop_NegF64: case Iop_AbsF64: 2256 UNARY(Ity_F64, Ity_F64); 2257 2258 case Iop_NegF32: case Iop_AbsF32: 2259 UNARY(Ity_F32, Ity_F32); 2260 2261 case Iop_SqrtF64: 2262 case Iop_SqrtF64r32: 2263 BINARY(ity_RMode,Ity_F64, Ity_F64); 2264 2265 case Iop_SqrtF32: 2266 case Iop_RoundF32toInt: 2267 BINARY(ity_RMode,Ity_F32, Ity_F32); 2268 2269 case Iop_CmpF32: 2270 BINARY(Ity_F32,Ity_F32, Ity_I32); 2271 2272 case Iop_CmpF64: 2273 BINARY(Ity_F64,Ity_F64, Ity_I32); 2274 2275 case Iop_CmpF128: 2276 BINARY(Ity_F128,Ity_F128, Ity_I32); 2277 2278 case Iop_F64toI16S: BINARY(ity_RMode,Ity_F64, Ity_I16); 2279 case Iop_F64toI32S: BINARY(ity_RMode,Ity_F64, Ity_I32); 2280 case Iop_F64toI64S: case Iop_F64toI64U: 2281 BINARY(ity_RMode,Ity_F64, Ity_I64); 2282 2283 case Iop_F64toI32U: BINARY(ity_RMode,Ity_F64, Ity_I32); 2284 2285 case Iop_I16StoF64: UNARY(Ity_I16, Ity_F64); 2286 case Iop_I32StoF64: UNARY(Ity_I32, Ity_F64); 2287 case Iop_I64StoF64: BINARY(ity_RMode,Ity_I64, Ity_F64); 2288 case Iop_I64UtoF64: BINARY(ity_RMode,Ity_I64, Ity_F64); 2289 case Iop_I64UtoF32: BINARY(ity_RMode,Ity_I64, Ity_F32); 2290 2291 case Iop_I32UtoF64: UNARY(Ity_I32, Ity_F64); 2292 2293 case Iop_F32toI16S: BINARY(ity_RMode,Ity_F32, Ity_I16); 2294 case Iop_F32toI32S: BINARY(ity_RMode,Ity_F32, Ity_I32); 2295 case Iop_F32toI64S: BINARY(ity_RMode,Ity_F32, Ity_I64); 2296 2297 case Iop_I16StoF32: UNARY(Ity_I16, Ity_F32); 2298 case Iop_I32StoF32: BINARY(ity_RMode,Ity_I32, Ity_F32); 2299 case Iop_I64StoF32: BINARY(ity_RMode,Ity_I64, Ity_F32); 2300 2301 case Iop_F32toF64: UNARY(Ity_F32, Ity_F64); 2302 case Iop_F64toF32: BINARY(ity_RMode,Ity_F64, Ity_F32); 2303 2304 case Iop_ReinterpI64asF64: UNARY(Ity_I64, Ity_F64); 2305 case Iop_ReinterpF64asI64: UNARY(Ity_F64, Ity_I64); 2306 case Iop_ReinterpI32asF32: UNARY(Ity_I32, Ity_F32); 2307 case Iop_ReinterpF32asI32: UNARY(Ity_F32, Ity_I32); 2308 2309 case Iop_AtanF64: case Iop_Yl2xF64: case Iop_Yl2xp1F64: 2310 case Iop_ScaleF64: case Iop_PRemF64: case Iop_PRem1F64: 2311 TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64); 2312 2313 case Iop_PRemC3210F64: case Iop_PRem1C3210F64: 2314 TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_I32); 2315 2316 case Iop_SinF64: case Iop_CosF64: case Iop_TanF64: 2317 case Iop_2xm1F64: 2318 case Iop_RoundF64toInt: BINARY(ity_RMode,Ity_F64, Ity_F64); 2319 2320 case Iop_MAddF64: case Iop_MSubF64: 2321 case Iop_MAddF64r32: case Iop_MSubF64r32: 2322 QUATERNARY(ity_RMode,Ity_F64,Ity_F64,Ity_F64, Ity_F64); 2323 2324 case Iop_Est5FRSqrt: 2325 case Iop_RoundF64toF64_NEAREST: case Iop_RoundF64toF64_NegINF: 2326 case Iop_RoundF64toF64_PosINF: case Iop_RoundF64toF64_ZERO: 2327 UNARY(Ity_F64, Ity_F64); 2328 case Iop_RoundF64toF32: 2329 BINARY(ity_RMode,Ity_F64, Ity_F64); 2330 case Iop_CalcFPRF: 2331 UNARY(Ity_F64, Ity_I32); 2332 case Iop_TruncF64asF32: 2333 UNARY(Ity_F64, Ity_F32); 2334 2335 case Iop_I32UtoFx4: 2336 case Iop_I32StoFx4: 2337 case Iop_QFtoI32Ux4_RZ: 2338 case Iop_QFtoI32Sx4_RZ: 2339 case Iop_FtoI32Ux4_RZ: 2340 case Iop_FtoI32Sx4_RZ: 2341 case Iop_RoundF32x4_RM: 2342 case Iop_RoundF32x4_RP: 2343 case Iop_RoundF32x4_RN: 2344 case Iop_RoundF32x4_RZ: 2345 case Iop_Abs32Fx4: 2346 case Iop_Rsqrte32Fx4: 2347 case Iop_Rsqrte32x4: 2348 UNARY(Ity_V128, Ity_V128); 2349 2350 case Iop_64HLtoV128: 2351 BINARY(Ity_I64,Ity_I64, Ity_V128); 2352 2353 case Iop_V128to64: case Iop_V128HIto64: 2354 case Iop_NarrowUn16to8x8: 2355 case Iop_NarrowUn32to16x4: 2356 case Iop_NarrowUn64to32x2: 2357 case Iop_QNarrowUn16Uto8Ux8: 2358 case Iop_QNarrowUn32Uto16Ux4: 2359 case Iop_QNarrowUn64Uto32Ux2: 2360 case Iop_QNarrowUn16Sto8Sx8: 2361 case Iop_QNarrowUn32Sto16Sx4: 2362 case Iop_QNarrowUn64Sto32Sx2: 2363 case Iop_QNarrowUn16Sto8Ux8: 2364 case Iop_QNarrowUn32Sto16Ux4: 2365 case Iop_QNarrowUn64Sto32Ux2: 2366 case Iop_F32toF16x4: 2367 UNARY(Ity_V128, Ity_I64); 2368 2369 case Iop_Widen8Uto16x8: 2370 case Iop_Widen16Uto32x4: 2371 case Iop_Widen32Uto64x2: 2372 case Iop_Widen8Sto16x8: 2373 case Iop_Widen16Sto32x4: 2374 case Iop_Widen32Sto64x2: 2375 case Iop_F16toF32x4: 2376 UNARY(Ity_I64, Ity_V128); 2377 2378 case Iop_V128to32: UNARY(Ity_V128, Ity_I32); 2379 case Iop_32UtoV128: UNARY(Ity_I32, Ity_V128); 2380 case Iop_64UtoV128: UNARY(Ity_I64, Ity_V128); 2381 case Iop_SetV128lo32: BINARY(Ity_V128,Ity_I32, Ity_V128); 2382 case Iop_SetV128lo64: BINARY(Ity_V128,Ity_I64, Ity_V128); 2383 2384 case Iop_Dup8x16: UNARY(Ity_I8, Ity_V128); 2385 case Iop_Dup16x8: UNARY(Ity_I16, Ity_V128); 2386 case Iop_Dup32x4: UNARY(Ity_I32, Ity_V128); 2387 case Iop_Dup8x8: UNARY(Ity_I8, Ity_I64); 2388 case Iop_Dup16x4: UNARY(Ity_I16, Ity_I64); 2389 case Iop_Dup32x2: UNARY(Ity_I32, Ity_I64); 2390 2391 case Iop_CmpEQ32Fx4: case Iop_CmpLT32Fx4: 2392 case Iop_CmpEQ64Fx2: case Iop_CmpLT64Fx2: 2393 case Iop_CmpLE32Fx4: case Iop_CmpUN32Fx4: 2394 case Iop_CmpLE64Fx2: case Iop_CmpUN64Fx2: 2395 case Iop_CmpGT32Fx4: case Iop_CmpGE32Fx4: 2396 case Iop_CmpEQ32F0x4: case Iop_CmpLT32F0x4: 2397 case Iop_CmpEQ64F0x2: case Iop_CmpLT64F0x2: 2398 case Iop_CmpLE32F0x4: case Iop_CmpUN32F0x4: 2399 case Iop_CmpLE64F0x2: case Iop_CmpUN64F0x2: 2400 case Iop_Add32Fx4: case Iop_Add32F0x4: 2401 case Iop_Add64Fx2: case Iop_Add64F0x2: 2402 case Iop_Div32Fx4: case Iop_Div32F0x4: 2403 case Iop_Div64Fx2: case Iop_Div64F0x2: 2404 case Iop_Max32Fx4: case Iop_Max32F0x4: 2405 case Iop_PwMax32Fx4: case Iop_PwMin32Fx4: 2406 case Iop_Max64Fx2: case Iop_Max64F0x2: 2407 case Iop_Min32Fx4: case Iop_Min32F0x4: 2408 case Iop_Min64Fx2: case Iop_Min64F0x2: 2409 case Iop_Mul32Fx4: case Iop_Mul32F0x4: 2410 case Iop_Mul64Fx2: case Iop_Mul64F0x2: 2411 case Iop_Sub32Fx4: case Iop_Sub32F0x4: 2412 case Iop_Sub64Fx2: case Iop_Sub64F0x2: 2413 case Iop_AndV128: case Iop_OrV128: case Iop_XorV128: 2414 case Iop_Add8x16: case Iop_Add16x8: 2415 case Iop_Add32x4: case Iop_Add64x2: 2416 case Iop_QAdd8Ux16: case Iop_QAdd16Ux8: 2417 case Iop_QAdd32Ux4: //case Iop_QAdd64Ux2: 2418 case Iop_QAdd8Sx16: case Iop_QAdd16Sx8: 2419 case Iop_QAdd32Sx4: case Iop_QAdd64Sx2: 2420 case Iop_PwAdd8x16: case Iop_PwAdd16x8: case Iop_PwAdd32x4: 2421 case Iop_Sub8x16: case Iop_Sub16x8: 2422 case Iop_Sub32x4: case Iop_Sub64x2: 2423 case Iop_QSub8Ux16: case Iop_QSub16Ux8: 2424 case Iop_QSub32Ux4: //case Iop_QSub64Ux2: 2425 case Iop_QSub8Sx16: case Iop_QSub16Sx8: 2426 case Iop_QSub32Sx4: case Iop_QSub64Sx2: 2427 case Iop_Mul8x16: case Iop_Mul16x8: case Iop_Mul32x4: 2428 case Iop_PolynomialMul8x16: 2429 case Iop_MulHi16Ux8: case Iop_MulHi32Ux4: 2430 case Iop_MulHi16Sx8: case Iop_MulHi32Sx4: 2431 case Iop_QDMulHi16Sx8: case Iop_QDMulHi32Sx4: 2432 case Iop_QRDMulHi16Sx8: case Iop_QRDMulHi32Sx4: 2433 case Iop_MullEven8Ux16: case Iop_MullEven16Ux8: 2434 case Iop_MullEven8Sx16: case Iop_MullEven16Sx8: 2435 case Iop_Avg8Ux16: case Iop_Avg16Ux8: case Iop_Avg32Ux4: 2436 case Iop_Avg8Sx16: case Iop_Avg16Sx8: case Iop_Avg32Sx4: 2437 case Iop_Max8Sx16: case Iop_Max16Sx8: case Iop_Max32Sx4: 2438 case Iop_Max8Ux16: case Iop_Max16Ux8: case Iop_Max32Ux4: 2439 case Iop_Min8Sx16: case Iop_Min16Sx8: case Iop_Min32Sx4: 2440 case Iop_Min8Ux16: case Iop_Min16Ux8: case Iop_Min32Ux4: 2441 case Iop_CmpEQ8x16: case Iop_CmpEQ16x8: case Iop_CmpEQ32x4: 2442 case Iop_CmpEQ64x2: 2443 case Iop_CmpGT8Sx16: case Iop_CmpGT16Sx8: case Iop_CmpGT32Sx4: 2444 case Iop_CmpGT64Sx2: 2445 case Iop_CmpGT8Ux16: case Iop_CmpGT16Ux8: case Iop_CmpGT32Ux4: 2446 case Iop_Shl8x16: case Iop_Shl16x8: case Iop_Shl32x4: case Iop_Shl64x2: 2447 case Iop_QShl8x16: case Iop_QShl16x8: 2448 case Iop_QShl32x4: case Iop_QShl64x2: 2449 case Iop_QSal8x16: case Iop_QSal16x8: 2450 case Iop_QSal32x4: case Iop_QSal64x2: 2451 case Iop_Shr8x16: case Iop_Shr16x8: case Iop_Shr32x4: case Iop_Shr64x2: 2452 case Iop_Sar8x16: case Iop_Sar16x8: case Iop_Sar32x4: case Iop_Sar64x2: 2453 case Iop_Sal8x16: case Iop_Sal16x8: case Iop_Sal32x4: case Iop_Sal64x2: 2454 case Iop_Rol8x16: case Iop_Rol16x8: case Iop_Rol32x4: 2455 case Iop_QNarrowBin16Sto8Ux16: case Iop_QNarrowBin32Sto16Ux8: 2456 case Iop_QNarrowBin16Sto8Sx16: case Iop_QNarrowBin32Sto16Sx8: 2457 case Iop_QNarrowBin16Uto8Ux16: case Iop_QNarrowBin32Uto16Ux8: 2458 case Iop_NarrowBin16to8x16: case Iop_NarrowBin32to16x8: 2459 case Iop_InterleaveHI8x16: case Iop_InterleaveHI16x8: 2460 case Iop_InterleaveHI32x4: case Iop_InterleaveHI64x2: 2461 case Iop_InterleaveLO8x16: case Iop_InterleaveLO16x8: 2462 case Iop_InterleaveLO32x4: case Iop_InterleaveLO64x2: 2463 case Iop_CatOddLanes8x16: case Iop_CatEvenLanes8x16: 2464 case Iop_CatOddLanes16x8: case Iop_CatEvenLanes16x8: 2465 case Iop_CatOddLanes32x4: case Iop_CatEvenLanes32x4: 2466 case Iop_InterleaveOddLanes8x16: case Iop_InterleaveEvenLanes8x16: 2467 case Iop_InterleaveOddLanes16x8: case Iop_InterleaveEvenLanes16x8: 2468 case Iop_InterleaveOddLanes32x4: case Iop_InterleaveEvenLanes32x4: 2469 case Iop_Perm8x16: 2470 case Iop_Recps32Fx4: 2471 case Iop_Rsqrts32Fx4: 2472 BINARY(Ity_V128,Ity_V128, Ity_V128); 2473 2474 case Iop_PolynomialMull8x8: 2475 case Iop_Mull8Ux8: case Iop_Mull8Sx8: 2476 case Iop_Mull16Ux4: case Iop_Mull16Sx4: 2477 case Iop_Mull32Ux2: case Iop_Mull32Sx2: 2478 BINARY(Ity_I64, Ity_I64, Ity_V128); 2479 2480 case Iop_NotV128: 2481 case Iop_Recip32Fx4: case Iop_Recip32F0x4: 2482 case Iop_Recip32x4: 2483 case Iop_Recip64Fx2: case Iop_Recip64F0x2: 2484 case Iop_RSqrt32Fx4: case Iop_RSqrt32F0x4: 2485 case Iop_RSqrt64Fx2: case Iop_RSqrt64F0x2: 2486 case Iop_Sqrt32Fx4: case Iop_Sqrt32F0x4: 2487 case Iop_Sqrt64Fx2: case Iop_Sqrt64F0x2: 2488 case Iop_CmpNEZ8x16: case Iop_CmpNEZ16x8: 2489 case Iop_CmpNEZ32x4: case Iop_CmpNEZ64x2: 2490 case Iop_Cnt8x16: 2491 case Iop_Clz8Sx16: case Iop_Clz16Sx8: case Iop_Clz32Sx4: 2492 case Iop_Cls8Sx16: case Iop_Cls16Sx8: case Iop_Cls32Sx4: 2493 case Iop_PwAddL8Ux16: case Iop_PwAddL16Ux8: case Iop_PwAddL32Ux4: 2494 case Iop_PwAddL8Sx16: case Iop_PwAddL16Sx8: case Iop_PwAddL32Sx4: 2495 case Iop_Reverse64_8x16: case Iop_Reverse64_16x8: case Iop_Reverse64_32x4: 2496 case Iop_Reverse32_8x16: case Iop_Reverse32_16x8: 2497 case Iop_Reverse16_8x16: 2498 case Iop_Neg32Fx4: 2499 case Iop_Abs8x16: case Iop_Abs16x8: case Iop_Abs32x4: 2500 UNARY(Ity_V128, Ity_V128); 2501 2502 case Iop_ShlV128: case Iop_ShrV128: 2503 case Iop_ShlN8x16: case Iop_ShlN16x8: 2504 case Iop_ShlN32x4: case Iop_ShlN64x2: 2505 case Iop_ShrN8x16: case Iop_ShrN16x8: 2506 case Iop_ShrN32x4: case Iop_ShrN64x2: 2507 case Iop_SarN8x16: case Iop_SarN16x8: 2508 case Iop_SarN32x4: case Iop_SarN64x2: 2509 case Iop_QShlN8x16: case Iop_QShlN16x8: 2510 case Iop_QShlN32x4: case Iop_QShlN64x2: 2511 case Iop_QShlN8Sx16: case Iop_QShlN16Sx8: 2512 case Iop_QShlN32Sx4: case Iop_QShlN64Sx2: 2513 case Iop_QSalN8x16: case Iop_QSalN16x8: 2514 case Iop_QSalN32x4: case Iop_QSalN64x2: 2515 BINARY(Ity_V128,Ity_I8, Ity_V128); 2516 2517 case Iop_F32ToFixed32Ux4_RZ: 2518 case Iop_F32ToFixed32Sx4_RZ: 2519 case Iop_Fixed32UToF32x4_RN: 2520 case Iop_Fixed32SToF32x4_RN: 2521 BINARY(Ity_V128, Ity_I8, Ity_V128); 2522 2523 case Iop_F32ToFixed32Ux2_RZ: 2524 case Iop_F32ToFixed32Sx2_RZ: 2525 case Iop_Fixed32UToF32x2_RN: 2526 case Iop_Fixed32SToF32x2_RN: 2527 BINARY(Ity_I64, Ity_I8, Ity_I64); 2528 2529 case Iop_GetElem8x16: 2530 BINARY(Ity_V128, Ity_I8, Ity_I8); 2531 case Iop_GetElem16x8: 2532 BINARY(Ity_V128, Ity_I8, Ity_I16); 2533 case Iop_GetElem32x4: 2534 BINARY(Ity_V128, Ity_I8, Ity_I32); 2535 case Iop_GetElem64x2: 2536 BINARY(Ity_V128, Ity_I8, Ity_I64); 2537 case Iop_GetElem8x8: 2538 BINARY(Ity_I64, Ity_I8, Ity_I8); 2539 case Iop_GetElem16x4: 2540 BINARY(Ity_I64, Ity_I8, Ity_I16); 2541 case Iop_GetElem32x2: 2542 BINARY(Ity_I64, Ity_I8, Ity_I32); 2543 case Iop_SetElem8x8: 2544 TERNARY(Ity_I64, Ity_I8, Ity_I8, Ity_I64); 2545 case Iop_SetElem16x4: 2546 TERNARY(Ity_I64, Ity_I8, Ity_I16, Ity_I64); 2547 case Iop_SetElem32x2: 2548 TERNARY(Ity_I64, Ity_I8, Ity_I32, Ity_I64); 2549 2550 case Iop_Extract64: 2551 TERNARY(Ity_I64, Ity_I64, Ity_I8, Ity_I64); 2552 case Iop_ExtractV128: 2553 TERNARY(Ity_V128, Ity_V128, Ity_I8, Ity_V128); 2554 2555 case Iop_QDMulLong16Sx4: case Iop_QDMulLong32Sx2: 2556 BINARY(Ity_I64, Ity_I64, Ity_V128); 2557 2558 /* s390 specific */ 2559 case Iop_MAddF32: 2560 case Iop_MSubF32: 2561 QUATERNARY(ity_RMode,Ity_F32,Ity_F32,Ity_F32, Ity_F32); 2562 2563 case Iop_F64HLtoF128: 2564 BINARY(Ity_F64,Ity_F64, Ity_F128); 2565 2566 case Iop_F128HItoF64: 2567 case Iop_F128LOtoF64: 2568 UNARY(Ity_F128, Ity_F64); 2569 2570 case Iop_AddF128: 2571 case Iop_SubF128: 2572 case Iop_MulF128: 2573 case Iop_DivF128: 2574 TERNARY(ity_RMode,Ity_F128,Ity_F128, Ity_F128); 2575 2576 case Iop_NegF128: 2577 case Iop_AbsF128: 2578 UNARY(Ity_F128, Ity_F128); 2579 2580 case Iop_SqrtF128: 2581 BINARY(ity_RMode,Ity_F128, Ity_F128); 2582 2583 case Iop_I32StoF128: UNARY(Ity_I32, Ity_F128); 2584 case Iop_I64StoF128: UNARY(Ity_I64, Ity_F128); 2585 2586 case Iop_F128toI32S: BINARY(ity_RMode,Ity_F128, Ity_I32); 2587 case Iop_F128toI64S: BINARY(ity_RMode,Ity_F128, Ity_I64); 2588 2589 case Iop_F32toF128: UNARY(Ity_F32, Ity_F128); 2590 case Iop_F64toF128: UNARY(Ity_F64, Ity_F128); 2591 2592 case Iop_F128toF32: BINARY(ity_RMode,Ity_F128, Ity_F32); 2593 case Iop_F128toF64: BINARY(ity_RMode,Ity_F128, Ity_F64); 2594 2595 default: 2596 ppIROp(op); 2597 vpanic("typeOfPrimop"); 2598 } 2599# undef UNARY 2600# undef BINARY 2601# undef TERNARY 2602# undef COMPARISON 2603# undef UNARY_COMPARISON 2604} 2605 2606 2607/*---------------------------------------------------------------*/ 2608/*--- Helper functions for the IR -- IR Basic Blocks ---*/ 2609/*---------------------------------------------------------------*/ 2610 2611void addStmtToIRSB ( IRSB* bb, IRStmt* st ) 2612{ 2613 Int i; 2614 if (bb->stmts_used == bb->stmts_size) { 2615 IRStmt** stmts2 = LibVEX_Alloc(2 * bb->stmts_size * sizeof(IRStmt*)); 2616 for (i = 0; i < bb->stmts_size; i++) 2617 stmts2[i] = bb->stmts[i]; 2618 bb->stmts = stmts2; 2619 bb->stmts_size *= 2; 2620 } 2621 vassert(bb->stmts_used < bb->stmts_size); 2622 bb->stmts[bb->stmts_used] = st; 2623 bb->stmts_used++; 2624} 2625 2626 2627/*---------------------------------------------------------------*/ 2628/*--- Helper functions for the IR -- IR Type Environments ---*/ 2629/*---------------------------------------------------------------*/ 2630 2631/* Allocate a new IRTemp, given its type. */ 2632 2633IRTemp newIRTemp ( IRTypeEnv* env, IRType ty ) 2634{ 2635 vassert(env); 2636 vassert(env->types_used >= 0); 2637 vassert(env->types_size >= 0); 2638 vassert(env->types_used <= env->types_size); 2639 if (env->types_used < env->types_size) { 2640 env->types[env->types_used] = ty; 2641 return env->types_used++; 2642 } else { 2643 Int i; 2644 Int new_size = env->types_size==0 ? 8 : 2*env->types_size; 2645 IRType* new_types 2646 = LibVEX_Alloc(new_size * sizeof(IRType)); 2647 for (i = 0; i < env->types_used; i++) 2648 new_types[i] = env->types[i]; 2649 env->types = new_types; 2650 env->types_size = new_size; 2651 return newIRTemp(env, ty); 2652 } 2653} 2654 2655 2656/*---------------------------------------------------------------*/ 2657/*--- Helper functions for the IR -- finding types of exprs ---*/ 2658/*---------------------------------------------------------------*/ 2659 2660inline 2661IRType typeOfIRTemp ( IRTypeEnv* env, IRTemp tmp ) 2662{ 2663 vassert(tmp >= 0); 2664 vassert(tmp < env->types_used); 2665 return env->types[tmp]; 2666} 2667 2668 2669IRType typeOfIRConst ( IRConst* con ) 2670{ 2671 switch (con->tag) { 2672 case Ico_U1: return Ity_I1; 2673 case Ico_U8: return Ity_I8; 2674 case Ico_U16: return Ity_I16; 2675 case Ico_U32: return Ity_I32; 2676 case Ico_U64: return Ity_I64; 2677 case Ico_F32: return Ity_F32; 2678 case Ico_F32i: return Ity_F32; 2679 case Ico_F64: return Ity_F64; 2680 case Ico_F64i: return Ity_F64; 2681 case Ico_V128: return Ity_V128; 2682 default: vpanic("typeOfIRConst"); 2683 } 2684} 2685 2686IRType typeOfIRExpr ( IRTypeEnv* tyenv, IRExpr* e ) 2687{ 2688 IRType t_dst, t_arg1, t_arg2, t_arg3, t_arg4; 2689 start: 2690 switch (e->tag) { 2691 case Iex_Load: 2692 return e->Iex.Load.ty; 2693 case Iex_Get: 2694 return e->Iex.Get.ty; 2695 case Iex_GetI: 2696 return e->Iex.GetI.descr->elemTy; 2697 case Iex_RdTmp: 2698 return typeOfIRTemp(tyenv, e->Iex.RdTmp.tmp); 2699 case Iex_Const: 2700 return typeOfIRConst(e->Iex.Const.con); 2701 case Iex_Qop: 2702 typeOfPrimop(e->Iex.Qop.op, 2703 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 2704 return t_dst; 2705 case Iex_Triop: 2706 typeOfPrimop(e->Iex.Triop.op, 2707 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 2708 return t_dst; 2709 case Iex_Binop: 2710 typeOfPrimop(e->Iex.Binop.op, 2711 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 2712 return t_dst; 2713 case Iex_Unop: 2714 typeOfPrimop(e->Iex.Unop.op, 2715 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 2716 return t_dst; 2717 case Iex_CCall: 2718 return e->Iex.CCall.retty; 2719 case Iex_Mux0X: 2720 e = e->Iex.Mux0X.expr0; 2721 goto start; 2722 /* return typeOfIRExpr(tyenv, e->Iex.Mux0X.expr0); */ 2723 case Iex_Binder: 2724 vpanic("typeOfIRExpr: Binder is not a valid expression"); 2725 default: 2726 ppIRExpr(e); 2727 vpanic("typeOfIRExpr"); 2728 } 2729} 2730 2731/* Is this any value actually in the enumeration 'IRType' ? */ 2732Bool isPlausibleIRType ( IRType ty ) 2733{ 2734 switch (ty) { 2735 case Ity_INVALID: case Ity_I1: 2736 case Ity_I8: case Ity_I16: case Ity_I32: 2737 case Ity_I64: case Ity_I128: 2738 case Ity_F32: case Ity_F64: case Ity_F128: 2739 case Ity_V128: 2740 return True; 2741 default: 2742 return False; 2743 } 2744} 2745 2746 2747/*---------------------------------------------------------------*/ 2748/*--- Sanity checking -- FLATNESS ---*/ 2749/*---------------------------------------------------------------*/ 2750 2751/* Check that the canonical flatness constraints hold on an 2752 IRStmt. The only place where any expression is allowed to be 2753 non-atomic is the RHS of IRStmt_Tmp. */ 2754 2755/* Relies on: 2756 inline static Bool isAtom ( IRExpr* e ) { 2757 return e->tag == Iex_RdTmp || e->tag == Iex_Const; 2758 } 2759*/ 2760 2761Bool isFlatIRStmt ( IRStmt* st ) 2762{ 2763 Int i; 2764 IRExpr* e; 2765 IRDirty* di; 2766 IRCAS* cas; 2767 2768 switch (st->tag) { 2769 case Ist_AbiHint: 2770 return isIRAtom(st->Ist.AbiHint.base) 2771 && isIRAtom(st->Ist.AbiHint.nia); 2772 case Ist_Put: 2773 return isIRAtom(st->Ist.Put.data); 2774 case Ist_PutI: 2775 return toBool( isIRAtom(st->Ist.PutI.ix) 2776 && isIRAtom(st->Ist.PutI.data) ); 2777 case Ist_WrTmp: 2778 /* This is the only interesting case. The RHS can be any 2779 expression, *but* all its subexpressions *must* be 2780 atoms. */ 2781 e = st->Ist.WrTmp.data; 2782 switch (e->tag) { 2783 case Iex_Binder: return True; 2784 case Iex_Get: return True; 2785 case Iex_GetI: return isIRAtom(e->Iex.GetI.ix); 2786 case Iex_RdTmp: return True; 2787 case Iex_Qop: return toBool( 2788 isIRAtom(e->Iex.Qop.arg1) 2789 && isIRAtom(e->Iex.Qop.arg2) 2790 && isIRAtom(e->Iex.Qop.arg3) 2791 && isIRAtom(e->Iex.Qop.arg4)); 2792 case Iex_Triop: return toBool( 2793 isIRAtom(e->Iex.Triop.arg1) 2794 && isIRAtom(e->Iex.Triop.arg2) 2795 && isIRAtom(e->Iex.Triop.arg3)); 2796 case Iex_Binop: return toBool( 2797 isIRAtom(e->Iex.Binop.arg1) 2798 && isIRAtom(e->Iex.Binop.arg2)); 2799 case Iex_Unop: return isIRAtom(e->Iex.Unop.arg); 2800 case Iex_Load: return isIRAtom(e->Iex.Load.addr); 2801 case Iex_Const: return True; 2802 case Iex_CCall: for (i = 0; e->Iex.CCall.args[i]; i++) 2803 if (!isIRAtom(e->Iex.CCall.args[i])) 2804 return False; 2805 return True; 2806 case Iex_Mux0X: return toBool ( 2807 isIRAtom(e->Iex.Mux0X.cond) 2808 && isIRAtom(e->Iex.Mux0X.expr0) 2809 && isIRAtom(e->Iex.Mux0X.exprX)); 2810 default: vpanic("isFlatIRStmt(e)"); 2811 } 2812 /*notreached*/ 2813 vassert(0); 2814 case Ist_Store: 2815 return toBool( isIRAtom(st->Ist.Store.addr) 2816 && isIRAtom(st->Ist.Store.data) ); 2817 case Ist_CAS: 2818 cas = st->Ist.CAS.details; 2819 return toBool( isIRAtom(cas->addr) 2820 && (cas->expdHi ? isIRAtom(cas->expdHi) : True) 2821 && isIRAtom(cas->expdLo) 2822 && (cas->dataHi ? isIRAtom(cas->dataHi) : True) 2823 && isIRAtom(cas->dataLo) ); 2824 case Ist_LLSC: 2825 return toBool( isIRAtom(st->Ist.LLSC.addr) 2826 && (st->Ist.LLSC.storedata 2827 ? isIRAtom(st->Ist.LLSC.storedata) : True) ); 2828 case Ist_Dirty: 2829 di = st->Ist.Dirty.details; 2830 if (!isIRAtom(di->guard)) 2831 return False; 2832 for (i = 0; di->args[i]; i++) 2833 if (!isIRAtom(di->args[i])) 2834 return False; 2835 if (di->mAddr && !isIRAtom(di->mAddr)) 2836 return False; 2837 return True; 2838 case Ist_NoOp: 2839 case Ist_IMark: 2840 case Ist_MBE: 2841 return True; 2842 case Ist_Exit: 2843 return isIRAtom(st->Ist.Exit.guard); 2844 default: 2845 vpanic("isFlatIRStmt(st)"); 2846 } 2847} 2848 2849 2850/*---------------------------------------------------------------*/ 2851/*--- Sanity checking ---*/ 2852/*---------------------------------------------------------------*/ 2853 2854/* Checks: 2855 2856 Everything is type-consistent. No ill-typed anything. 2857 The target address at the end of the BB is a 32- or 64- 2858 bit expression, depending on the guest's word size. 2859 2860 Each temp is assigned only once, before its uses. 2861*/ 2862 2863static inline Int countArgs ( IRExpr** args ) 2864{ 2865 Int i; 2866 for (i = 0; args[i]; i++) 2867 ; 2868 return i; 2869} 2870 2871static 2872__attribute((noreturn)) 2873void sanityCheckFail ( IRSB* bb, IRStmt* stmt, HChar* what ) 2874{ 2875 vex_printf("\nIR SANITY CHECK FAILURE\n\n"); 2876 ppIRSB(bb); 2877 if (stmt) { 2878 vex_printf("\nIN STATEMENT:\n\n"); 2879 ppIRStmt(stmt); 2880 } 2881 vex_printf("\n\nERROR = %s\n\n", what ); 2882 vpanic("sanityCheckFail: exiting due to bad IR"); 2883} 2884 2885static Bool saneIRRegArray ( IRRegArray* arr ) 2886{ 2887 if (arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */) 2888 return False; 2889 if (arr->elemTy == Ity_I1) 2890 return False; 2891 if (arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */) 2892 return False; 2893 return True; 2894} 2895 2896static Bool saneIRCallee ( IRCallee* cee ) 2897{ 2898 if (cee->name == NULL) 2899 return False; 2900 if (cee->addr == 0) 2901 return False; 2902 if (cee->regparms < 0 || cee->regparms > 3) 2903 return False; 2904 return True; 2905} 2906 2907static Bool saneIRConst ( IRConst* con ) 2908{ 2909 switch (con->tag) { 2910 case Ico_U1: 2911 return toBool( con->Ico.U1 == True || con->Ico.U1 == False ); 2912 default: 2913 /* Is there anything we can meaningfully check? I don't 2914 think so. */ 2915 return True; 2916 } 2917} 2918 2919/* Traverse a Stmt/Expr, inspecting IRTemp uses. Report any out of 2920 range ones. Report any which are read and for which the current 2921 def_count is zero. */ 2922 2923static 2924void useBeforeDef_Temp ( IRSB* bb, IRStmt* stmt, IRTemp tmp, Int* def_counts ) 2925{ 2926 if (tmp < 0 || tmp >= bb->tyenv->types_used) 2927 sanityCheckFail(bb,stmt, "out of range Temp in IRExpr"); 2928 if (def_counts[tmp] < 1) 2929 sanityCheckFail(bb,stmt, "IRTemp use before def in IRExpr"); 2930} 2931 2932static 2933void useBeforeDef_Expr ( IRSB* bb, IRStmt* stmt, IRExpr* expr, Int* def_counts ) 2934{ 2935 Int i; 2936 switch (expr->tag) { 2937 case Iex_Get: 2938 break; 2939 case Iex_GetI: 2940 useBeforeDef_Expr(bb,stmt,expr->Iex.GetI.ix,def_counts); 2941 break; 2942 case Iex_RdTmp: 2943 useBeforeDef_Temp(bb,stmt,expr->Iex.RdTmp.tmp,def_counts); 2944 break; 2945 case Iex_Qop: 2946 useBeforeDef_Expr(bb,stmt,expr->Iex.Qop.arg1,def_counts); 2947 useBeforeDef_Expr(bb,stmt,expr->Iex.Qop.arg2,def_counts); 2948 useBeforeDef_Expr(bb,stmt,expr->Iex.Qop.arg3,def_counts); 2949 useBeforeDef_Expr(bb,stmt,expr->Iex.Qop.arg4,def_counts); 2950 break; 2951 case Iex_Triop: 2952 useBeforeDef_Expr(bb,stmt,expr->Iex.Triop.arg1,def_counts); 2953 useBeforeDef_Expr(bb,stmt,expr->Iex.Triop.arg2,def_counts); 2954 useBeforeDef_Expr(bb,stmt,expr->Iex.Triop.arg3,def_counts); 2955 break; 2956 case Iex_Binop: 2957 useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg1,def_counts); 2958 useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg2,def_counts); 2959 break; 2960 case Iex_Unop: 2961 useBeforeDef_Expr(bb,stmt,expr->Iex.Unop.arg,def_counts); 2962 break; 2963 case Iex_Load: 2964 useBeforeDef_Expr(bb,stmt,expr->Iex.Load.addr,def_counts); 2965 break; 2966 case Iex_Const: 2967 break; 2968 case Iex_CCall: 2969 for (i = 0; expr->Iex.CCall.args[i]; i++) 2970 useBeforeDef_Expr(bb,stmt,expr->Iex.CCall.args[i],def_counts); 2971 break; 2972 case Iex_Mux0X: 2973 useBeforeDef_Expr(bb,stmt,expr->Iex.Mux0X.cond,def_counts); 2974 useBeforeDef_Expr(bb,stmt,expr->Iex.Mux0X.expr0,def_counts); 2975 useBeforeDef_Expr(bb,stmt,expr->Iex.Mux0X.exprX,def_counts); 2976 break; 2977 default: 2978 vpanic("useBeforeDef_Expr"); 2979 } 2980} 2981 2982static 2983void useBeforeDef_Stmt ( IRSB* bb, IRStmt* stmt, Int* def_counts ) 2984{ 2985 Int i; 2986 IRDirty* d; 2987 IRCAS* cas; 2988 switch (stmt->tag) { 2989 case Ist_IMark: 2990 break; 2991 case Ist_AbiHint: 2992 useBeforeDef_Expr(bb,stmt,stmt->Ist.AbiHint.base,def_counts); 2993 useBeforeDef_Expr(bb,stmt,stmt->Ist.AbiHint.nia,def_counts); 2994 break; 2995 case Ist_Put: 2996 useBeforeDef_Expr(bb,stmt,stmt->Ist.Put.data,def_counts); 2997 break; 2998 case Ist_PutI: 2999 useBeforeDef_Expr(bb,stmt,stmt->Ist.PutI.ix,def_counts); 3000 useBeforeDef_Expr(bb,stmt,stmt->Ist.PutI.data,def_counts); 3001 break; 3002 case Ist_WrTmp: 3003 useBeforeDef_Expr(bb,stmt,stmt->Ist.WrTmp.data,def_counts); 3004 break; 3005 case Ist_Store: 3006 useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.addr,def_counts); 3007 useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.data,def_counts); 3008 break; 3009 case Ist_CAS: 3010 cas = stmt->Ist.CAS.details; 3011 useBeforeDef_Expr(bb,stmt,cas->addr,def_counts); 3012 if (cas->expdHi) 3013 useBeforeDef_Expr(bb,stmt,cas->expdHi,def_counts); 3014 useBeforeDef_Expr(bb,stmt,cas->expdLo,def_counts); 3015 if (cas->dataHi) 3016 useBeforeDef_Expr(bb,stmt,cas->dataHi,def_counts); 3017 useBeforeDef_Expr(bb,stmt,cas->dataLo,def_counts); 3018 break; 3019 case Ist_LLSC: 3020 useBeforeDef_Expr(bb,stmt,stmt->Ist.LLSC.addr,def_counts); 3021 if (stmt->Ist.LLSC.storedata != NULL) 3022 useBeforeDef_Expr(bb,stmt,stmt->Ist.LLSC.storedata,def_counts); 3023 break; 3024 case Ist_Dirty: 3025 d = stmt->Ist.Dirty.details; 3026 for (i = 0; d->args[i] != NULL; i++) 3027 useBeforeDef_Expr(bb,stmt,d->args[i],def_counts); 3028 if (d->mFx != Ifx_None) 3029 useBeforeDef_Expr(bb,stmt,d->mAddr,def_counts); 3030 break; 3031 case Ist_NoOp: 3032 case Ist_MBE: 3033 break; 3034 case Ist_Exit: 3035 useBeforeDef_Expr(bb,stmt,stmt->Ist.Exit.guard,def_counts); 3036 break; 3037 default: 3038 vpanic("useBeforeDef_Stmt"); 3039 } 3040} 3041 3042static 3043void tcExpr ( IRSB* bb, IRStmt* stmt, IRExpr* expr, IRType gWordTy ) 3044{ 3045 Int i; 3046 IRType t_dst, t_arg1, t_arg2, t_arg3, t_arg4; 3047 IRTypeEnv* tyenv = bb->tyenv; 3048 switch (expr->tag) { 3049 case Iex_Get: 3050 case Iex_RdTmp: 3051 break; 3052 case Iex_GetI: 3053 tcExpr(bb,stmt, expr->Iex.GetI.ix, gWordTy ); 3054 if (typeOfIRExpr(tyenv,expr->Iex.GetI.ix) != Ity_I32) 3055 sanityCheckFail(bb,stmt,"IRExpr.GetI.ix: not :: Ity_I32"); 3056 if (!saneIRRegArray(expr->Iex.GetI.descr)) 3057 sanityCheckFail(bb,stmt,"IRExpr.GetI.descr: invalid descr"); 3058 break; 3059 case Iex_Qop: { 3060 IRType ttarg1, ttarg2, ttarg3, ttarg4; 3061 tcExpr(bb,stmt, expr->Iex.Qop.arg1, gWordTy ); 3062 tcExpr(bb,stmt, expr->Iex.Qop.arg2, gWordTy ); 3063 tcExpr(bb,stmt, expr->Iex.Qop.arg3, gWordTy ); 3064 tcExpr(bb,stmt, expr->Iex.Qop.arg4, gWordTy ); 3065 typeOfPrimop(expr->Iex.Qop.op, 3066 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3067 if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID 3068 || t_arg3 == Ity_INVALID || t_arg4 == Ity_INVALID) { 3069 vex_printf(" op name: " ); 3070 ppIROp(expr->Iex.Qop.op); 3071 vex_printf("\n"); 3072 sanityCheckFail(bb,stmt, 3073 "Iex.Qop: wrong arity op\n" 3074 "... name of op precedes BB printout\n"); 3075 } 3076 ttarg1 = typeOfIRExpr(tyenv, expr->Iex.Qop.arg1); 3077 ttarg2 = typeOfIRExpr(tyenv, expr->Iex.Qop.arg2); 3078 ttarg3 = typeOfIRExpr(tyenv, expr->Iex.Qop.arg3); 3079 ttarg4 = typeOfIRExpr(tyenv, expr->Iex.Qop.arg4); 3080 if (t_arg1 != ttarg1 || t_arg2 != ttarg2 3081 || t_arg3 != ttarg3 || t_arg4 != ttarg4) { 3082 vex_printf(" op name: "); 3083 ppIROp(expr->Iex.Qop.op); 3084 vex_printf("\n"); 3085 vex_printf(" op type is ("); 3086 ppIRType(t_arg1); 3087 vex_printf(","); 3088 ppIRType(t_arg2); 3089 vex_printf(","); 3090 ppIRType(t_arg3); 3091 vex_printf(","); 3092 ppIRType(t_arg4); 3093 vex_printf(") -> "); 3094 ppIRType (t_dst); 3095 vex_printf("\narg tys are ("); 3096 ppIRType(ttarg1); 3097 vex_printf(","); 3098 ppIRType(ttarg2); 3099 vex_printf(","); 3100 ppIRType(ttarg3); 3101 vex_printf(","); 3102 ppIRType(ttarg4); 3103 vex_printf(")\n"); 3104 sanityCheckFail(bb,stmt, 3105 "Iex.Qop: arg tys don't match op tys\n" 3106 "... additional details precede BB printout\n"); 3107 } 3108 break; 3109 } 3110 case Iex_Triop: { 3111 IRType ttarg1, ttarg2, ttarg3; 3112 tcExpr(bb,stmt, expr->Iex.Triop.arg1, gWordTy ); 3113 tcExpr(bb,stmt, expr->Iex.Triop.arg2, gWordTy ); 3114 tcExpr(bb,stmt, expr->Iex.Triop.arg3, gWordTy ); 3115 typeOfPrimop(expr->Iex.Triop.op, 3116 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3117 if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID 3118 || t_arg3 == Ity_INVALID || t_arg4 != Ity_INVALID) { 3119 vex_printf(" op name: " ); 3120 ppIROp(expr->Iex.Triop.op); 3121 vex_printf("\n"); 3122 sanityCheckFail(bb,stmt, 3123 "Iex.Triop: wrong arity op\n" 3124 "... name of op precedes BB printout\n"); 3125 } 3126 ttarg1 = typeOfIRExpr(tyenv, expr->Iex.Triop.arg1); 3127 ttarg2 = typeOfIRExpr(tyenv, expr->Iex.Triop.arg2); 3128 ttarg3 = typeOfIRExpr(tyenv, expr->Iex.Triop.arg3); 3129 if (t_arg1 != ttarg1 || t_arg2 != ttarg2 || t_arg3 != ttarg3) { 3130 vex_printf(" op name: "); 3131 ppIROp(expr->Iex.Triop.op); 3132 vex_printf("\n"); 3133 vex_printf(" op type is ("); 3134 ppIRType(t_arg1); 3135 vex_printf(","); 3136 ppIRType(t_arg2); 3137 vex_printf(","); 3138 ppIRType(t_arg3); 3139 vex_printf(") -> "); 3140 ppIRType (t_dst); 3141 vex_printf("\narg tys are ("); 3142 ppIRType(ttarg1); 3143 vex_printf(","); 3144 ppIRType(ttarg2); 3145 vex_printf(","); 3146 ppIRType(ttarg3); 3147 vex_printf(")\n"); 3148 sanityCheckFail(bb,stmt, 3149 "Iex.Triop: arg tys don't match op tys\n" 3150 "... additional details precede BB printout\n"); 3151 } 3152 break; 3153 } 3154 case Iex_Binop: { 3155 IRType ttarg1, ttarg2; 3156 tcExpr(bb,stmt, expr->Iex.Binop.arg1, gWordTy ); 3157 tcExpr(bb,stmt, expr->Iex.Binop.arg2, gWordTy ); 3158 typeOfPrimop(expr->Iex.Binop.op, 3159 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3160 if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID 3161 || t_arg3 != Ity_INVALID || t_arg4 != Ity_INVALID) { 3162 vex_printf(" op name: " ); 3163 ppIROp(expr->Iex.Binop.op); 3164 vex_printf("\n"); 3165 sanityCheckFail(bb,stmt, 3166 "Iex.Binop: wrong arity op\n" 3167 "... name of op precedes BB printout\n"); 3168 } 3169 ttarg1 = typeOfIRExpr(tyenv, expr->Iex.Binop.arg1); 3170 ttarg2 = typeOfIRExpr(tyenv, expr->Iex.Binop.arg2); 3171 if (t_arg1 != ttarg1 || t_arg2 != ttarg2) { 3172 vex_printf(" op name: "); 3173 ppIROp(expr->Iex.Binop.op); 3174 vex_printf("\n"); 3175 vex_printf(" op type is ("); 3176 ppIRType(t_arg1); 3177 vex_printf(","); 3178 ppIRType(t_arg2); 3179 vex_printf(") -> "); 3180 ppIRType (t_dst); 3181 vex_printf("\narg tys are ("); 3182 ppIRType(ttarg1); 3183 vex_printf(","); 3184 ppIRType(ttarg2); 3185 vex_printf(")\n"); 3186 sanityCheckFail(bb,stmt, 3187 "Iex.Binop: arg tys don't match op tys\n" 3188 "... additional details precede BB printout\n"); 3189 } 3190 break; 3191 } 3192 case Iex_Unop: 3193 tcExpr(bb,stmt, expr->Iex.Unop.arg, gWordTy ); 3194 typeOfPrimop(expr->Iex.Binop.op, 3195 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3196 if (t_arg1 == Ity_INVALID || t_arg2 != Ity_INVALID 3197 || t_arg3 != Ity_INVALID || t_arg4 != Ity_INVALID) 3198 sanityCheckFail(bb,stmt,"Iex.Unop: wrong arity op"); 3199 if (t_arg1 != typeOfIRExpr(tyenv, expr->Iex.Unop.arg)) 3200 sanityCheckFail(bb,stmt,"Iex.Unop: arg ty doesn't match op ty"); 3201 break; 3202 case Iex_Load: 3203 tcExpr(bb,stmt, expr->Iex.Load.addr, gWordTy); 3204 if (typeOfIRExpr(tyenv, expr->Iex.Load.addr) != gWordTy) 3205 sanityCheckFail(bb,stmt,"Iex.Load.addr: not :: guest word type"); 3206 if (expr->Iex.Load.end != Iend_LE && expr->Iex.Load.end != Iend_BE) 3207 sanityCheckFail(bb,stmt,"Iex.Load.end: bogus endianness"); 3208 break; 3209 case Iex_CCall: 3210 if (!saneIRCallee(expr->Iex.CCall.cee)) 3211 sanityCheckFail(bb,stmt,"Iex.CCall.cee: bad IRCallee"); 3212 if (expr->Iex.CCall.cee->regparms > countArgs(expr->Iex.CCall.args)) 3213 sanityCheckFail(bb,stmt,"Iex.CCall.cee: #regparms > #args"); 3214 for (i = 0; expr->Iex.CCall.args[i]; i++) { 3215 if (i >= 32) 3216 sanityCheckFail(bb,stmt,"Iex.CCall: > 32 args"); 3217 tcExpr(bb,stmt, expr->Iex.CCall.args[i], gWordTy); 3218 } 3219 if (expr->Iex.CCall.retty == Ity_I1) 3220 sanityCheckFail(bb,stmt,"Iex.CCall.retty: cannot return :: Ity_I1"); 3221 for (i = 0; expr->Iex.CCall.args[i]; i++) 3222 if (typeOfIRExpr(tyenv, expr->Iex.CCall.args[i]) == Ity_I1) 3223 sanityCheckFail(bb,stmt,"Iex.CCall.arg: arg :: Ity_I1"); 3224 break; 3225 case Iex_Const: 3226 if (!saneIRConst(expr->Iex.Const.con)) 3227 sanityCheckFail(bb,stmt,"Iex.Const.con: invalid const"); 3228 break; 3229 case Iex_Mux0X: 3230 tcExpr(bb,stmt, expr->Iex.Mux0X.cond, gWordTy); 3231 tcExpr(bb,stmt, expr->Iex.Mux0X.expr0, gWordTy); 3232 tcExpr(bb,stmt, expr->Iex.Mux0X.exprX, gWordTy); 3233 if (typeOfIRExpr(tyenv, expr->Iex.Mux0X.cond) != Ity_I8) 3234 sanityCheckFail(bb,stmt,"Iex.Mux0X.cond: cond :: Ity_I8"); 3235 if (typeOfIRExpr(tyenv, expr->Iex.Mux0X.expr0) 3236 != typeOfIRExpr(tyenv, expr->Iex.Mux0X.exprX)) 3237 sanityCheckFail(bb,stmt,"Iex.Mux0X: expr0/exprX mismatch"); 3238 break; 3239 default: 3240 vpanic("tcExpr"); 3241 } 3242} 3243 3244 3245static 3246void tcStmt ( IRSB* bb, IRStmt* stmt, IRType gWordTy ) 3247{ 3248 Int i; 3249 IRDirty* d; 3250 IRCAS* cas; 3251 IRType tyExpd, tyData; 3252 IRTypeEnv* tyenv = bb->tyenv; 3253 switch (stmt->tag) { 3254 case Ist_IMark: 3255 /* Somewhat heuristic, but rule out totally implausible 3256 instruction sizes and deltas. */ 3257 if (stmt->Ist.IMark.len < 0 || stmt->Ist.IMark.len > 20) 3258 sanityCheckFail(bb,stmt,"IRStmt.IMark.len: implausible"); 3259 if (stmt->Ist.IMark.delta > 1) 3260 sanityCheckFail(bb,stmt,"IRStmt.IMark.delta: implausible"); 3261 break; 3262 case Ist_AbiHint: 3263 if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.base) != gWordTy) 3264 sanityCheckFail(bb,stmt,"IRStmt.AbiHint.base: " 3265 "not :: guest word type"); 3266 if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.nia) != gWordTy) 3267 sanityCheckFail(bb,stmt,"IRStmt.AbiHint.nia: " 3268 "not :: guest word type"); 3269 break; 3270 case Ist_Put: 3271 tcExpr( bb, stmt, stmt->Ist.Put.data, gWordTy ); 3272 if (typeOfIRExpr(tyenv,stmt->Ist.Put.data) == Ity_I1) 3273 sanityCheckFail(bb,stmt,"IRStmt.Put.data: cannot Put :: Ity_I1"); 3274 break; 3275 case Ist_PutI: 3276 tcExpr( bb, stmt, stmt->Ist.PutI.data, gWordTy ); 3277 tcExpr( bb, stmt, stmt->Ist.PutI.ix, gWordTy ); 3278 if (typeOfIRExpr(tyenv,stmt->Ist.PutI.data) == Ity_I1) 3279 sanityCheckFail(bb,stmt,"IRStmt.PutI.data: cannot PutI :: Ity_I1"); 3280 if (typeOfIRExpr(tyenv,stmt->Ist.PutI.data) 3281 != stmt->Ist.PutI.descr->elemTy) 3282 sanityCheckFail(bb,stmt,"IRStmt.PutI.data: data ty != elem ty"); 3283 if (typeOfIRExpr(tyenv,stmt->Ist.PutI.ix) != Ity_I32) 3284 sanityCheckFail(bb,stmt,"IRStmt.PutI.ix: not :: Ity_I32"); 3285 if (!saneIRRegArray(stmt->Ist.PutI.descr)) 3286 sanityCheckFail(bb,stmt,"IRStmt.PutI.descr: invalid descr"); 3287 break; 3288 case Ist_WrTmp: 3289 tcExpr( bb, stmt, stmt->Ist.WrTmp.data, gWordTy ); 3290 if (typeOfIRTemp(tyenv, stmt->Ist.WrTmp.tmp) 3291 != typeOfIRExpr(tyenv, stmt->Ist.WrTmp.data)) 3292 sanityCheckFail(bb,stmt,"IRStmt.Put.Tmp: tmp and expr do not match"); 3293 break; 3294 case Ist_Store: 3295 tcExpr( bb, stmt, stmt->Ist.Store.addr, gWordTy ); 3296 tcExpr( bb, stmt, stmt->Ist.Store.data, gWordTy ); 3297 if (typeOfIRExpr(tyenv, stmt->Ist.Store.addr) != gWordTy) 3298 sanityCheckFail(bb,stmt,"IRStmt.Store.addr: not :: guest word type"); 3299 if (typeOfIRExpr(tyenv, stmt->Ist.Store.data) == Ity_I1) 3300 sanityCheckFail(bb,stmt,"IRStmt.Store.data: cannot Store :: Ity_I1"); 3301 if (stmt->Ist.Store.end != Iend_LE && stmt->Ist.Store.end != Iend_BE) 3302 sanityCheckFail(bb,stmt,"Ist.Store.end: bogus endianness"); 3303 break; 3304 case Ist_CAS: 3305 cas = stmt->Ist.CAS.details; 3306 /* make sure it's definitely either a CAS or a DCAS */ 3307 if (cas->oldHi == IRTemp_INVALID 3308 && cas->expdHi == NULL && cas->dataHi == NULL) { 3309 /* fine; it's a single cas */ 3310 } 3311 else 3312 if (cas->oldHi != IRTemp_INVALID 3313 && cas->expdHi != NULL && cas->dataHi != NULL) { 3314 /* fine; it's a double cas */ 3315 } 3316 else { 3317 /* it's some el-mutanto hybrid */ 3318 goto bad_cas; 3319 } 3320 /* check the address type */ 3321 tcExpr( bb, stmt, cas->addr, gWordTy ); 3322 if (typeOfIRExpr(tyenv, cas->addr) != gWordTy) goto bad_cas; 3323 /* check types on the {old,expd,data}Lo components agree */ 3324 tyExpd = typeOfIRExpr(tyenv, cas->expdLo); 3325 tyData = typeOfIRExpr(tyenv, cas->dataLo); 3326 if (tyExpd != tyData) goto bad_cas; 3327 if (tyExpd != typeOfIRTemp(tyenv, cas->oldLo)) 3328 goto bad_cas; 3329 /* check the base element type is sane */ 3330 if (tyExpd == Ity_I8 || tyExpd == Ity_I16 || tyExpd == Ity_I32 3331 || (gWordTy == Ity_I64 && tyExpd == Ity_I64)) { 3332 /* fine */ 3333 } else { 3334 goto bad_cas; 3335 } 3336 /* If it's a DCAS, check types on the {old,expd,data}Hi 3337 components too */ 3338 if (cas->oldHi != IRTemp_INVALID) { 3339 tyExpd = typeOfIRExpr(tyenv, cas->expdHi); 3340 tyData = typeOfIRExpr(tyenv, cas->dataHi); 3341 if (tyExpd != tyData) goto bad_cas; 3342 if (tyExpd != typeOfIRTemp(tyenv, cas->oldHi)) 3343 goto bad_cas; 3344 /* and finally check that oldLo and oldHi have the same 3345 type. This forces equivalence amongst all 6 types. */ 3346 if (typeOfIRTemp(tyenv, cas->oldHi) 3347 != typeOfIRTemp(tyenv, cas->oldLo)) 3348 goto bad_cas; 3349 } 3350 break; 3351 bad_cas: 3352 sanityCheckFail(bb,stmt,"IRStmt.CAS: ill-formed"); 3353 break; 3354 case Ist_LLSC: { 3355 IRType tyRes; 3356 if (typeOfIRExpr(tyenv, stmt->Ist.LLSC.addr) != gWordTy) 3357 sanityCheckFail(bb,stmt,"IRStmt.LLSC.addr: not :: guest word type"); 3358 if (stmt->Ist.LLSC.end != Iend_LE && stmt->Ist.LLSC.end != Iend_BE) 3359 sanityCheckFail(bb,stmt,"Ist.LLSC.end: bogus endianness"); 3360 tyRes = typeOfIRTemp(tyenv, stmt->Ist.LLSC.result); 3361 if (stmt->Ist.LLSC.storedata == NULL) { 3362 /* it's a LL */ 3363 if (tyRes != Ity_I64 && tyRes != Ity_I32 3364 && tyRes != Ity_I16 && tyRes != Ity_I8) 3365 sanityCheckFail(bb,stmt,"Ist.LLSC(LL).result :: bogus"); 3366 } else { 3367 /* it's a SC */ 3368 if (tyRes != Ity_I1) 3369 sanityCheckFail(bb,stmt,"Ist.LLSC(SC).result: not :: Ity_I1"); 3370 tyData = typeOfIRExpr(tyenv, stmt->Ist.LLSC.storedata); 3371 if (tyData != Ity_I64 && tyData != Ity_I32 3372 && tyData != Ity_I16 && tyData != Ity_I8) 3373 sanityCheckFail(bb,stmt, 3374 "Ist.LLSC(SC).result :: storedata bogus"); 3375 } 3376 break; 3377 } 3378 case Ist_Dirty: 3379 /* Mostly check for various kinds of ill-formed dirty calls. */ 3380 d = stmt->Ist.Dirty.details; 3381 if (d->cee == NULL) goto bad_dirty; 3382 if (!saneIRCallee(d->cee)) goto bad_dirty; 3383 if (d->cee->regparms > countArgs(d->args)) goto bad_dirty; 3384 if (d->mFx == Ifx_None) { 3385 if (d->mAddr != NULL || d->mSize != 0) 3386 goto bad_dirty; 3387 } else { 3388 if (d->mAddr == NULL || d->mSize == 0) 3389 goto bad_dirty; 3390 } 3391 if (d->nFxState < 0 || d->nFxState > VEX_N_FXSTATE) 3392 goto bad_dirty; 3393 if (d->nFxState == 0 && d->needsBBP) 3394 goto bad_dirty; 3395 for (i = 0; i < d->nFxState; i++) { 3396 if (d->fxState[i].fx == Ifx_None) goto bad_dirty; 3397 if (d->fxState[i].size <= 0) goto bad_dirty; 3398 } 3399 /* check types, minimally */ 3400 if (d->guard == NULL) goto bad_dirty; 3401 tcExpr( bb, stmt, d->guard, gWordTy ); 3402 if (typeOfIRExpr(tyenv, d->guard) != Ity_I1) 3403 sanityCheckFail(bb,stmt,"IRStmt.Dirty.guard not :: Ity_I1"); 3404 if (d->tmp != IRTemp_INVALID 3405 && typeOfIRTemp(tyenv, d->tmp) == Ity_I1) 3406 sanityCheckFail(bb,stmt,"IRStmt.Dirty.dst :: Ity_I1"); 3407 for (i = 0; d->args[i] != NULL; i++) { 3408 if (i >= 32) 3409 sanityCheckFail(bb,stmt,"IRStmt.Dirty: > 32 args"); 3410 if (typeOfIRExpr(tyenv, d->args[i]) == Ity_I1) 3411 sanityCheckFail(bb,stmt,"IRStmt.Dirty.arg[i] :: Ity_I1"); 3412 } 3413 break; 3414 bad_dirty: 3415 sanityCheckFail(bb,stmt,"IRStmt.Dirty: ill-formed"); 3416 break; 3417 case Ist_NoOp: 3418 break; 3419 case Ist_MBE: 3420 switch (stmt->Ist.MBE.event) { 3421 case Imbe_Fence: case Imbe_CancelReservation: 3422 break; 3423 default: sanityCheckFail(bb,stmt,"IRStmt.MBE.event: unknown"); 3424 break; 3425 } 3426 break; 3427 case Ist_Exit: 3428 tcExpr( bb, stmt, stmt->Ist.Exit.guard, gWordTy ); 3429 if (typeOfIRExpr(tyenv,stmt->Ist.Exit.guard) != Ity_I1) 3430 sanityCheckFail(bb,stmt,"IRStmt.Exit.guard: not :: Ity_I1"); 3431 if (!saneIRConst(stmt->Ist.Exit.dst)) 3432 sanityCheckFail(bb,stmt,"IRStmt.Exit.dst: bad dst"); 3433 if (typeOfIRConst(stmt->Ist.Exit.dst) != gWordTy) 3434 sanityCheckFail(bb,stmt,"IRStmt.Exit.dst: not :: guest word type"); 3435 break; 3436 default: 3437 vpanic("tcStmt"); 3438 } 3439} 3440 3441void sanityCheckIRSB ( IRSB* bb, HChar* caller, 3442 Bool require_flat, IRType guest_word_size ) 3443{ 3444 Int i; 3445 IRStmt* stmt; 3446 Int n_temps = bb->tyenv->types_used; 3447 Int* def_counts = LibVEX_Alloc(n_temps * sizeof(Int)); 3448 3449 if (0) 3450 vex_printf("sanityCheck: %s\n", caller); 3451 3452 vassert(guest_word_size == Ity_I32 3453 || guest_word_size == Ity_I64); 3454 3455 if (bb->stmts_used < 0 || bb->stmts_size < 8 3456 || bb->stmts_used > bb->stmts_size) 3457 /* this BB is so strange we can't even print it */ 3458 vpanic("sanityCheckIRSB: stmts array limits wierd"); 3459 3460 /* Ensure each temp has a plausible type. */ 3461 for (i = 0; i < n_temps; i++) { 3462 IRType ty = typeOfIRTemp(bb->tyenv,(IRTemp)i); 3463 if (!isPlausibleIRType(ty)) { 3464 vex_printf("Temp t%d declared with implausible type 0x%x\n", 3465 i, (UInt)ty); 3466 sanityCheckFail(bb,NULL,"Temp declared with implausible type"); 3467 } 3468 } 3469 3470 /* Check for flatness, if required. */ 3471 if (require_flat) { 3472 for (i = 0; i < bb->stmts_used; i++) { 3473 stmt = bb->stmts[i]; 3474 if (!stmt) 3475 sanityCheckFail(bb, stmt, "IRStmt: is NULL"); 3476 if (!isFlatIRStmt(stmt)) 3477 sanityCheckFail(bb, stmt, "IRStmt: is not flat"); 3478 } 3479 if (!isIRAtom(bb->next)) 3480 sanityCheckFail(bb, NULL, "bb->next is not an atom"); 3481 } 3482 3483 /* Count the defs of each temp. Only one def is allowed. 3484 Also, check that each used temp has already been defd. */ 3485 3486 for (i = 0; i < n_temps; i++) 3487 def_counts[i] = 0; 3488 3489 for (i = 0; i < bb->stmts_used; i++) { 3490 IRDirty* d; 3491 IRCAS* cas; 3492 stmt = bb->stmts[i]; 3493 /* Check any temps used by this statement. */ 3494 useBeforeDef_Stmt(bb,stmt,def_counts); 3495 3496 /* Now make note of any temps defd by this statement. */ 3497 switch (stmt->tag) { 3498 case Ist_WrTmp: 3499 if (stmt->Ist.WrTmp.tmp < 0 || stmt->Ist.WrTmp.tmp >= n_temps) 3500 sanityCheckFail(bb, stmt, 3501 "IRStmt.Tmp: destination tmp is out of range"); 3502 def_counts[stmt->Ist.WrTmp.tmp]++; 3503 if (def_counts[stmt->Ist.WrTmp.tmp] > 1) 3504 sanityCheckFail(bb, stmt, 3505 "IRStmt.Tmp: destination tmp is assigned more than once"); 3506 break; 3507 case Ist_Store: 3508 break; 3509 case Ist_Dirty: 3510 if (stmt->Ist.Dirty.details->tmp != IRTemp_INVALID) { 3511 d = stmt->Ist.Dirty.details; 3512 if (d->tmp < 0 || d->tmp >= n_temps) 3513 sanityCheckFail(bb, stmt, 3514 "IRStmt.Dirty: destination tmp is out of range"); 3515 def_counts[d->tmp]++; 3516 if (def_counts[d->tmp] > 1) 3517 sanityCheckFail(bb, stmt, 3518 "IRStmt.Dirty: destination tmp is assigned more than once"); 3519 } 3520 break; 3521 case Ist_CAS: 3522 cas = stmt->Ist.CAS.details; 3523 if (cas->oldHi != IRTemp_INVALID) { 3524 if (cas->oldHi < 0 || cas->oldHi >= n_temps) 3525 sanityCheckFail(bb, stmt, 3526 "IRStmt.CAS: destination tmpHi is out of range"); 3527 def_counts[cas->oldHi]++; 3528 if (def_counts[cas->oldHi] > 1) 3529 sanityCheckFail(bb, stmt, 3530 "IRStmt.CAS: destination tmpHi is assigned more than once"); 3531 } 3532 if (cas->oldLo < 0 || cas->oldLo >= n_temps) 3533 sanityCheckFail(bb, stmt, 3534 "IRStmt.CAS: destination tmpLo is out of range"); 3535 def_counts[cas->oldLo]++; 3536 if (def_counts[cas->oldLo] > 1) 3537 sanityCheckFail(bb, stmt, 3538 "IRStmt.CAS: destination tmpLo is assigned more than once"); 3539 break; 3540 case Ist_LLSC: 3541 if (stmt->Ist.LLSC.result < 0 || stmt->Ist.LLSC.result >= n_temps) 3542 sanityCheckFail(bb, stmt, 3543 "IRStmt.LLSC: destination tmp is out of range"); 3544 def_counts[stmt->Ist.LLSC.result]++; 3545 if (def_counts[stmt->Ist.LLSC.result] > 1) 3546 sanityCheckFail(bb, stmt, 3547 "IRStmt.LLSC: destination tmp is assigned more than once"); 3548 break; 3549 default: 3550 /* explicitly handle the rest, so as to keep gcc quiet */ 3551 break; 3552 } 3553 } 3554 3555 /* Typecheck everything. */ 3556 for (i = 0; i < bb->stmts_used; i++) 3557 if (bb->stmts[i]) 3558 tcStmt( bb, bb->stmts[i], guest_word_size ); 3559 if (typeOfIRExpr(bb->tyenv,bb->next) != guest_word_size) 3560 sanityCheckFail(bb, NULL, "bb->next field has wrong type"); 3561} 3562 3563/*---------------------------------------------------------------*/ 3564/*--- Misc helper functions ---*/ 3565/*---------------------------------------------------------------*/ 3566 3567Bool eqIRConst ( IRConst* c1, IRConst* c2 ) 3568{ 3569 if (c1->tag != c2->tag) 3570 return False; 3571 3572 switch (c1->tag) { 3573 case Ico_U1: return toBool( (1 & c1->Ico.U1) == (1 & c2->Ico.U1) ); 3574 case Ico_U8: return toBool( c1->Ico.U8 == c2->Ico.U8 ); 3575 case Ico_U16: return toBool( c1->Ico.U16 == c2->Ico.U16 ); 3576 case Ico_U32: return toBool( c1->Ico.U32 == c2->Ico.U32 ); 3577 case Ico_U64: return toBool( c1->Ico.U64 == c2->Ico.U64 ); 3578 case Ico_F32: return toBool( c1->Ico.F32 == c2->Ico.F32 ); 3579 case Ico_F32i: return toBool( c1->Ico.F32i == c2->Ico.F32i ); 3580 case Ico_F64: return toBool( c1->Ico.F64 == c2->Ico.F64 ); 3581 case Ico_F64i: return toBool( c1->Ico.F64i == c2->Ico.F64i ); 3582 case Ico_V128: return toBool( c1->Ico.V128 == c2->Ico.V128 ); 3583 default: vpanic("eqIRConst"); 3584 } 3585} 3586 3587Bool eqIRRegArray ( IRRegArray* descr1, IRRegArray* descr2 ) 3588{ 3589 return toBool( descr1->base == descr2->base 3590 && descr1->elemTy == descr2->elemTy 3591 && descr1->nElems == descr2->nElems ); 3592} 3593 3594Int sizeofIRType ( IRType ty ) 3595{ 3596 switch (ty) { 3597 case Ity_I8: return 1; 3598 case Ity_I16: return 2; 3599 case Ity_I32: return 4; 3600 case Ity_I64: return 8; 3601 case Ity_I128: return 16; 3602 case Ity_F32: return 4; 3603 case Ity_F64: return 8; 3604 case Ity_F128: return 16; 3605 case Ity_V128: return 16; 3606 default: vex_printf("\n"); ppIRType(ty); vex_printf("\n"); 3607 vpanic("sizeofIRType"); 3608 } 3609} 3610 3611IRExpr* mkIRExpr_HWord ( HWord hw ) 3612{ 3613 vassert(sizeof(void*) == sizeof(HWord)); 3614 if (sizeof(HWord) == 4) 3615 return IRExpr_Const(IRConst_U32((UInt)hw)); 3616 if (sizeof(HWord) == 8) 3617 return IRExpr_Const(IRConst_U64((ULong)hw)); 3618 vpanic("mkIRExpr_HWord"); 3619} 3620 3621IRDirty* unsafeIRDirty_0_N ( Int regparms, HChar* name, void* addr, 3622 IRExpr** args ) 3623{ 3624 IRDirty* d = emptyIRDirty(); 3625 d->cee = mkIRCallee ( regparms, name, addr ); 3626 d->guard = IRExpr_Const(IRConst_U1(True)); 3627 d->args = args; 3628 return d; 3629} 3630 3631IRDirty* unsafeIRDirty_1_N ( IRTemp dst, 3632 Int regparms, HChar* name, void* addr, 3633 IRExpr** args ) 3634{ 3635 IRDirty* d = emptyIRDirty(); 3636 d->cee = mkIRCallee ( regparms, name, addr ); 3637 d->guard = IRExpr_Const(IRConst_U1(True)); 3638 d->args = args; 3639 d->tmp = dst; 3640 return d; 3641} 3642 3643IRExpr* mkIRExprCCall ( IRType retty, 3644 Int regparms, HChar* name, void* addr, 3645 IRExpr** args ) 3646{ 3647 return IRExpr_CCall ( mkIRCallee ( regparms, name, addr ), 3648 retty, args ); 3649} 3650 3651Bool eqIRAtom ( IRExpr* a1, IRExpr* a2 ) 3652{ 3653 vassert(isIRAtom(a1)); 3654 vassert(isIRAtom(a2)); 3655 if (a1->tag == Iex_RdTmp && a2->tag == Iex_RdTmp) 3656 return toBool(a1->Iex.RdTmp.tmp == a2->Iex.RdTmp.tmp); 3657 if (a1->tag == Iex_Const && a2->tag == Iex_Const) 3658 return eqIRConst(a1->Iex.Const.con, a2->Iex.Const.con); 3659 return False; 3660} 3661 3662/*---------------------------------------------------------------*/ 3663/*--- end ir_defs.c ---*/ 3664/*---------------------------------------------------------------*/ 3665