Cross Reference: /dalvik/vm/compiler/codegen/arm/CodegenDriver.cpp

Lines Matching defs:rlSrc
54     RegLocation rlSrc;
58         rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
59         loadValueDirectFixed(cUnit, rlSrc, r0);
61         rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
62         loadValueDirectWideFixed(cUnit, rlSrc, r0, r1);
327     RegLocation rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
331     rlSrc = loadValueWide(cUnit, rlSrc, kAnyReg);
338     storePair(cUnit, regPtr, rlSrc.lowReg, rlSrc.highReg);
379     RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
382     rlSrc = loadValue(cUnit, rlSrc, regClass);
390     storeBaseDisp(cUnit, rlObj.lowReg, fieldOffset, rlSrc.lowReg, size);
397         markCard(cUnit, rlSrc.lowReg, rlObj.lowReg);
476                         RegLocation rlSrc, int scale)
527         rlSrc = loadValueWide(cUnit, rlSrc, regClass);
530         storePair(cUnit, regPtr, rlSrc.lowReg, rlSrc.highReg);
535         rlSrc = loadValue(cUnit, rlSrc, regClass);
538         storeBaseIndexed(cUnit, regPtr, rlIndex.lowReg, rlSrc.lowReg,
551                               RegLocation rlSrc, int scale)
587     loadValueDirectFixed(cUnit, rlSrc, r0);
613     loadValueDirectFixed(cUnit, rlSrc, r0);
1410     RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
1411     loadValueDirectFixed(cUnit, rlSrc, r1);
1413     genNullCheck(cUnit, rlSrc.sRegLow, r1, mir->offset, NULL);
1587     RegLocation rlSrc;
1737             rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
1738             rlSrc = loadValue(cUnit, rlSrc, kAnyReg);
1748             storeWordDisp(cUnit, tReg, valOffset ,rlSrc.lowReg);
1756                 markCard(cUnit, rlSrc.lowReg, objHead);
1776             rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
1777             rlSrc = loadValueWide(cUnit, rlSrc, kAnyReg);
1781             storePair(cUnit, tReg, rlSrc.lowReg, rlSrc.highReg);
1852             rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
1853             rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
1856                                               rlSrc.lowReg, 0);
1858              *  rlSrc.lowReg now contains object->clazz.  Note that
1864             loadWordDisp(cUnit, rlSrc.lowReg, offsetof(Object, clazz), r0);
1930             RegLocation rlSrc = LOC_DALVIK_RETURN_VAL;
1931             rlSrc.fp = rlDest.fp;
1932             storeValue(cUnit, rlDest, rlSrc);
1940             RegLocation rlSrc = LOC_DALVIK_RETURN_VAL_WIDE;
1941             rlSrc.fp = rlDest.fp;
1942             storeValueWide(cUnit, rlDest, rlSrc);
1946             RegLocation rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
1948             rlDest.fp = rlSrc.fp;
1949             storeValueWide(cUnit, rlDest, rlSrc);
1955             RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
1957             rlDest.fp = rlSrc.fp;
1958             storeValue(cUnit, rlDest, rlSrc);
1979     RegLocation rlSrc;
1987         rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
1989         rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
2009             return genArithOpInt(cUnit, mir, rlDest, rlSrc, rlSrc);
2012             return genArithOpLong(cUnit, mir, rlDest, rlSrc, rlSrc);
2014             return genArithOpFloat(cUnit, mir, rlDest, rlSrc, rlSrc);
2016             return genArithOpDouble(cUnit, mir, rlDest, rlSrc, rlSrc);
2018             storeValueWide(cUnit, rlDest, rlSrc);
2021             rlSrc = dvmCompilerUpdateLoc(cUnit, rlSrc);
2024             if (rlSrc.location == kLocPhysReg) {
2025                 genRegCopy(cUnit, rlResult.lowReg, rlSrc.lowReg);
2027                 loadValueDirect(cUnit, rlSrc, rlResult.lowReg);
2034             rlSrc = dvmCompilerUpdateLocWide(cUnit, rlSrc);
2035             rlSrc = dvmCompilerWideToNarrow(cUnit, rlSrc);
2039             storeValue(cUnit, rlDest, rlSrc);
2042             rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
2044             opRegReg(cUnit, kOp2Byte, rlResult.lowReg, rlSrc.lowReg);
2048             rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
2050             opRegReg(cUnit, kOp2Short, rlResult.lowReg, rlSrc.lowReg);
2054             rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
2056             opRegReg(cUnit, kOp2Char, rlResult.lowReg, rlSrc.lowReg);
2061             rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
2062             genNullCheck(cUnit, rlSrc.sRegLow, rlSrc.lowReg,
2065             loadWordDisp(cUnit, rlSrc.lowReg, lenOffset,
2113     RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
2114     rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
2116     opRegImm(cUnit, kOpCmp, rlSrc.lowReg, 0);
2175 // Returns true if it added instructions to 'cUnit' to divide 'rlSrc' by 'lit'
2178                              RegLocation rlSrc, RegLocation rlDest, int lit)
2189     rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
2195             opRegRegImm(cUnit, kOpLsr, tReg, rlSrc.lowReg, 32 - k);
2196             opRegRegReg(cUnit, kOpAdd, tReg, tReg, rlSrc.lowReg);
2199             opRegRegImm(cUnit, kOpAsr, tReg, rlSrc.lowReg, 31);
2201             opRegRegReg(cUnit, kOpAdd, tReg, tReg, rlSrc.lowReg);
2210             opRegRegImm(cUnit, kOpLsr, tReg1, rlSrc.lowReg, 32 - k);
2211             opRegRegReg(cUnit, kOpAdd, tReg2, tReg1, rlSrc.lowReg);
2215             opRegRegImm(cUnit, kOpAsr, tReg1, rlSrc.lowReg, 31);
2217             opRegRegReg(cUnit, kOpAdd, tReg2, tReg1, rlSrc.lowReg);
2226 // Returns true if it added instructions to 'cUnit' to multiply 'rlSrc' by 'lit'
2229                                RegLocation rlSrc, RegLocation rlDest, int lit)
2247     rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
2251         opRegRegImm(cUnit, kOpLsl, rlResult.lowReg, rlSrc.lowReg,
2257         genMultiplyByTwoBitMultiplier(cUnit, rlSrc, rlResult, lit,
2264         opRegRegImm(cUnit, kOpLsl, tReg, rlSrc.lowReg, lowestSetBit(lit + 1));
2265         opRegRegReg(cUnit, kOpSub, rlResult.lowReg, tReg, rlSrc.lowReg);
2274     RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
2287             rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
2292                         tReg, rlSrc.lowReg);
2304             if (handleEasyMultiply(cUnit, rlSrc, rlDest, lit)) {
2347             if (handleEasyDivide(cUnit, dalvikOpcode, rlSrc, rlDest, lit)) {
2351             loadValueDirectFixed(cUnit, rlSrc, r0);
2374     rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
2378         genRegCopy(cUnit, rlResult.lowReg, rlSrc.lowReg);
2380         opRegRegImm(cUnit, op, rlResult.lowReg, rlSrc.lowReg, lit);
2446             RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
2460             loadValueDirectFixed(cUnit, rlSrc, r1);   /* Len */
2490             RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
2510             loadValueDirectFixed(cUnit, rlSrc, r0);  /* Ref */
2905             RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
2909             loadValueDirectFixed(cUnit, rlSrc, r0);
2932             RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
2934             loadValueDirectFixed(cUnit, rlSrc, r1);
3538     RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
3539     rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
3548     opRegRegImm(cUnit, kOpAsr, signReg, rlSrc.lowReg, 31);
3549     opRegRegReg(cUnit, kOpAdd, rlResult.lowReg, rlSrc.lowReg, signReg);
3557     RegLocation rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
3559     rlSrc = loadValueWide(cUnit, rlSrc, kCoreReg);
3568     opRegRegImm(cUnit, kOpAsr, signReg, rlSrc.highReg, 31);
3569     opRegRegReg(cUnit, kOpAdd, rlResult.lowReg, rlSrc.lowReg, signReg);
3570     opRegRegReg(cUnit, kOpAdc, rlResult.highReg, rlSrc.highReg, signReg);
3580     RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
3582     storeValue(cUnit, rlDest, rlSrc);
3589     RegLocation rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
3591     storeValueWide(cUnit, rlDest, rlSrc);