/external/clang/lib/Analysis/ |
H A D | ScanfFormatString.cpp | 122 const OptionalAmount &Amt = clang::analyze_format_string::ParseAmount(I, E); local 123 if (Amt.getHowSpecified() != OptionalAmount::NotSpecified) { 124 assert(Amt.getHowSpecified() == OptionalAmount::Constant); 125 FS.setFieldWidth(Amt);
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H A D | FormatString.cpp | 82 const OptionalAmount &Amt = ParseAmount(I, E); local 84 if (Amt.getHowSpecified() == OptionalAmount::NotSpecified) { 95 assert(Amt.getHowSpecified() == OptionalAmount::Constant); 101 if (Amt.getConstantAmount() == 0) { 109 return OptionalAmount(OptionalAmount::Arg, Amt.getConstantAmount() - 1, 132 const OptionalAmount Amt = local 136 if (Amt.isInvalid()) 138 CS.setFieldWidth(Amt); 151 const OptionalAmount &Amt = ParseAmount(I, E); local 159 if (Amt [all...] |
H A D | PrintfFormatString.cpp | 42 const OptionalAmount Amt = ParsePositionAmount(H, Start, Beg, E, local 44 if (Amt.isInvalid()) 46 FS.setPrecision(Amt);
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/external/llvm/include/llvm/ADT/ |
H A D | APSInt.h | 114 APSInt operator>>(unsigned Amt) const { 115 return IsUnsigned ? APSInt(lshr(Amt), true) : APSInt(ashr(Amt), false); 117 APSInt& operator>>=(unsigned Amt) { argument 118 *this = *this >> Amt; 158 APSInt& operator<<=(unsigned Amt) { argument 159 *this = *this << Amt;
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/external/llvm/include/llvm/ |
H A D | BasicBlock.h | 277 void AdjustBlockAddressRefCount(int Amt) { argument 278 setValueSubclassData(getSubclassDataFromValue()+Amt);
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMAddressingModes.h | 86 static inline unsigned rotr32(unsigned Val, unsigned Amt) { argument 87 assert(Amt < 32 && "Invalid rotate amount"); 88 return (Val >> Amt) | (Val << ((32-Amt)&31)); 93 static inline unsigned rotl32(unsigned Val, unsigned Amt) { argument 94 assert(Amt < 32 && "Invalid rotate amount"); 95 return (Val << Amt) | (Val >> ((32-Amt)&31));
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/external/llvm/lib/Target/ARM/InstPrinter/ |
H A D | ARMInstPrinter.cpp | 601 unsigned Amt = ShiftOp & 0x1f; local 603 O << ", asr #" << (Amt == 0 ? 32 : Amt); 604 else if (Amt) 605 O << ", lsl #" << Amt; local
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/external/llvm/lib/VMCore/ |
H A D | ConstantFold.cpp | 248 ConstantInt *Amt = dyn_cast<ConstantInt>(CE->getOperand(1)); local 249 if (Amt == 0) 251 unsigned ShAmt = Amt->getZExtValue(); 270 ConstantInt *Amt = dyn_cast<ConstantInt>(CE->getOperand(1)); local 271 if (Amt == 0) 273 unsigned ShAmt = Amt->getZExtValue();
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H A D | Instructions.cpp | 800 static Value *getAISize(LLVMContext &Context, Value *Amt) { argument 801 if (!Amt) 802 Amt = ConstantInt::get(Type::getInt32Ty(Context), 1); 804 assert(!isa<BasicBlock>(Amt) && 806 assert(Amt->getType()->isIntegerTy() && 809 return Amt;
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/external/clang/include/clang/Analysis/Analyses/ |
H A D | FormatString.h | 349 void setFieldWidth(const OptionalAmount &Amt) { argument 350 FieldWidth = Amt; 457 void setPrecision(const OptionalAmount &Amt) { argument 458 Precision = Amt;
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/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCasts.cpp | 120 Value *Amt = 0; local 122 Amt = NumElements; 124 Amt = ConstantInt::get(AI.getArraySize()->getType(), Scale); 126 Amt = AllocaBuilder.CreateMul(Amt, NumElements); 132 Amt = AllocaBuilder.CreateAdd(Amt, Off); 135 AllocaInst *New = AllocaBuilder.CreateAlloca(CastElTy, Amt); 698 if (ConstantInt *Amt = dyn_cast<ConstantInt>(I->getOperand(1))) { 701 BitsToClear += Amt [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 1256 /// and the shift amount is a constant 'Amt'. Expand the operation. 1257 void DAGTypeLegalizer::ExpandShiftByConstant(SDNode *N, unsigned Amt, argument 1270 if (Amt > VTBits) { 1272 } else if (Amt > NVTBits) { 1275 NVT, InL, DAG.getConstant(Amt-NVTBits, ShTy)); 1276 } else if (Amt == NVTBits) { 1279 } else if (Amt == 1 && 1289 Lo = DAG.getNode(ISD::SHL, DL, NVT, InL, DAG.getConstant(Amt, ShTy)); 1292 DAG.getConstant(Amt, ShTy)), 1294 DAG.getConstant(NVTBits-Amt, ShT 1350 SDValue Amt = N->getOperand(1); local 1438 SDValue Amt = N->getOperand(1); local [all...] |
H A D | TargetLowering.cpp | 3302 SDValue Amt = DAG.getConstant(ShAmt, getShiftAmountTy(Op1.getValueType())); local 3303 Op1 = DAG.getNode(ISD::SRA, dl, Op1.getValueType(), Op1, Amt);
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H A D | DAGCombiner.cpp | 249 SDValue visitShiftByConstant(SDNode *N, unsigned Amt); 3447 SDValue DAGCombiner::visitShiftByConstant(SDNode *N, unsigned Amt) { argument 3717 SDValue Amt = DAG.getConstant(ShiftAmt, local 3720 N0.getOperand(0), Amt); 3763 SDValue Amt = local 3767 N0.getOperand(0).getOperand(0), Amt); 4962 unsigned Amt = RHSC->getZExtValue(); local 4965 if (Amt >= Mask.getBitWidth()) break; 4966 APInt NewMask = Mask << Amt;
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H A D | SelectionDAGBuilder.cpp | 3162 unsigned Amt = ElementSize.logBase2(); local 3165 DAG.getConstant(Amt, IdxN.getValueType()));
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/external/llvm/lib/Target/ARM/ |
H A D | ARMBaseInstrInfo.cpp | 162 unsigned Amt = ARM_AM::getAM2Offset(OffImm); local 164 if (ARM_AM::getSOImmVal(Amt) == -1) 170 .addReg(BaseReg).addImm(Amt) 172 } else if (Amt != 0) { 174 unsigned SOOpc = ARM_AM::getSORegOpc(ShOpc, Amt); 188 unsigned Amt = ARM_AM::getAM3Offset(OffImm); local 193 .addReg(BaseReg).addImm(Amt)
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/external/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.cpp | 2132 unsigned Amt = MI->getOperand(3).getImm(); local 2139 MI->getOperand(3).setImm(Size-Amt);
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H A D | X86ISelLowering.cpp | 10691 SDValue Amt = Op.getOperand(1); local 10698 if (isSplatVector(Amt.getNode())) { 10699 SDValue SclrAmt = Amt->getOperand(0); 10750 SDValue Res = DAG.getNode(ISD::SRL, dl, VT, R, Amt); 10794 SDValue Res = DAG.getNode(ISD::SRL, dl, VT, R, Amt); 10882 if (Amt.getOpcode() == ISD::BUILD_VECTOR) { 10887 Amt1Csts.push_back(Amt->getOperand(i)); 10889 Amt2Csts.push_back(Amt->getOperand(i)); 10897 Amt1 = Extract128BitVector(Amt, 0, DAG, dl); 10898 Amt2 = Extract128BitVector(Amt, NumElem [all...] |
/external/clang/lib/Sema/ |
H A D | SemaChecking.cpp | 2326 bool HandleAmount(const analyze_format_string::OptionalAmount &Amt, unsigned k, 2329 const analyze_printf::OptionalAmount &Amt, 2359 const analyze_format_string::OptionalAmount &Amt, 2363 if (Amt.hasDataArgument()) { 2365 unsigned argIndex = Amt.getArgIndex(); 2369 getLocationOfByte(Amt.getStart()), 2388 const analyze_printf::ArgType &AT = Amt.getArgType(S.Context); 2395 getLocationOfByte(Amt.getStart()), 2409 const analyze_printf::OptionalAmount &Amt, 2417 Amt 2358 HandleAmount( const analyze_format_string::OptionalAmount &Amt, unsigned k, const char *startSpecifier, unsigned specifierLen) argument 2407 HandleInvalidAmount( const analyze_printf::PrintfSpecifier &FS, const analyze_printf::OptionalAmount &Amt, unsigned type, const char *startSpecifier, unsigned specifierLen) argument 2897 const OptionalAmount &Amt = FS.getFieldWidth(); local [all...] |
/external/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 6895 unsigned Amt = Inst.getOperand(2).getImm(); local 6896 unsigned Opc = Amt == 0 ? ARM::MOVr : ARM::MOVsi; 6898 if (Amt == 32 && (ShiftTy == ARM_AM::lsr || ShiftTy == ARM_AM::asr)) 6899 Amt = 0; 6900 unsigned Shifter = ARM_AM::getSORegOpc(ShiftTy, Amt);
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 3942 SDValue Amt = Op.getOperand(2); local 3943 EVT AmtVT = Amt.getValueType(); 3946 DAG.getConstant(BitWidth, AmtVT), Amt); 3947 SDValue Tmp2 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Amt); 3950 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, 3954 SDValue OutLo = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Amt); 3971 SDValue Amt = Op.getOperand(2); local 3972 EVT AmtVT = Amt.getValueType(); 3975 DAG.getConstant(BitWidth, AmtVT), Amt); 3976 SDValue Tmp2 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Amt); 3999 SDValue Amt = Op.getOperand(2); local 4071 BuildVSLDOI(SDValue LHS, SDValue RHS, unsigned Amt, EVT VT, SelectionDAG &DAG, DebugLoc dl) argument [all...] |