/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeTypesGeneric.cpp | 177 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); local 190 NewVT, 2*OldElts), 201 Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); 205 Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); 312 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); local 334 NewVT, NewElts.size()),
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H A D | LegalizeVectorTypes.cpp | 150 EVT NewVT = N->getValueType(0).getVectorElementType(); local 152 NewVT, N->getOperand(0)); 166 EVT NewVT = N->getValueType(0).getVectorElementType(); local 168 return DAG.getConvertRndSat(NewVT, N->getDebugLoc(), 169 Op0, DAG.getValueType(NewVT), 183 EVT NewVT = N->getValueType(0).getVectorElementType(); local 186 NewVT, Op, N->getOperand(1)); 897 EVT NewVT = Inputs[0].getValueType(); local 898 unsigned NewElts = NewVT.getVectorNumElements(); 955 EVT EltVT = NewVT 2172 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts); local 2383 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff); local 2584 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT); local [all...] |
H A D | TargetLowering.cpp | 674 MVT NewVT = MVT::getVectorVT(EltTy, NumElts); local 675 if (!TLI->isTypeLegal(NewVT)) 676 NewVT = EltTy; 677 IntermediateVT = NewVT; 679 unsigned NewVTSize = NewVT.getSizeInBits(); 685 EVT DestVT = TLI->getRegisterType(NewVT); 687 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. 962 EVT NewVT = EVT::getVectorVT(Context, EltTy, NumElts); local 963 if (!isTypeLegal(NewVT)) 964 NewVT [all...] |
H A D | DAGCombiner.cpp | 2088 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), SimpleSize*2); local 2089 if (TLI.isOperationLegal(ISD::MUL, NewVT)) { 2090 N0 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N0); 2091 N1 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N1); 2092 N1 = DAG.getNode(ISD::MUL, DL, NewVT, N0, N1); 2093 N1 = DAG.getNode(ISD::SRL, DL, NewVT, N1, 2124 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), SimpleSize*2); local 2125 if (TLI.isOperationLegal(ISD::MUL, NewVT)) { 2126 N0 = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N0); 2127 N1 = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N 2206 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), SimpleSize*2); local 2236 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), SimpleSize*2); local 7333 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), NewBW); local [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCalls.cpp | 637 VectorType *NewVT = cast<VectorType>(II->getType()); local 638 unsigned NewWidth = NewVT->getElementType()->getIntegerBitWidth(); 651 ConstantInt::get(NewVT->getElementType(), CV0E * CV1E));
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 6083 MVT NewVT; local 6087 case MVT::v4f32: NewVT = MVT::v2f64; Scale = 2; break; 6088 case MVT::v4i32: NewVT = MVT::v2i64; Scale = 2; break; 6089 case MVT::v8i16: NewVT = MVT::v4i32; Scale = 2; break; 6090 case MVT::v16i8: NewVT = MVT::v4i32; Scale = 4; break; 6091 case MVT::v16i16: NewVT = MVT::v8i32; Scale = 2; break; 6092 case MVT::v32i8: NewVT = MVT::v8i32; Scale = 4; break; 6110 SDValue V1 = DAG.getNode(ISD::BITCAST, dl, NewVT, SVOp->getOperand(0)); 6111 SDValue V2 = DAG.getNode(ISD::BITCAST, dl, NewVT, SVOp->getOperand(1)); 6112 return DAG.getVectorShuffle(NewVT, d 8748 EVT NewVT = MVT::getVectorVT(EltVT, NumElems/2); local 10616 EVT NewVT = MVT::getVectorVT(EltVT, NumElems/2); local 10874 EVT NewVT = MVT::getVectorVT(EltVT, NumElems/2); local 11016 EVT NewVT = MVT::getVectorVT(EltVT, NumElems/2); local [all...] |