/dalvik/vm/compiler/codegen/arm/armv5te/ |
H A D | MethodCodegenDriver.cpp | 17 void dvmCompilerMethodMIR2LIR(CompilationUnit *cUnit) argument
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H A D | ArchVariant.cpp | 107 void dvmCompilerGenMemBarrier(CompilationUnit *cUnit, int barrierKind) argument
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/dalvik/vm/compiler/codegen/arm/armv7-a-neon/ |
H A D | MethodCodegenDriver.cpp | 40 static void genMethodInflateAndPunt(CompilationUnit *cUnit, MIR *mir, 58 dvmCompilerFlushAllRegs(cUnit); 61 opRegRegImm(cUnit, kOpAdd, oldStackSave, r5FP, 62 cUnit->method->registersSize * 4); 64 opRegRegImm(cUnit, kOpAdd, oldFP, oldStackSave, sizeof(StackSaveArea)); 66 opRegRegImm(cUnit, kOpSub, newStackSave, r5FP, sizeof(StackSaveArea)); 68 loadWordDisp(cUnit, r13sp, 0, savedPC); 69 loadConstant(cUnit, currentPC, (int) (cUnit->method->insns + mir->offset)); 70 loadConstant(cUnit, metho 453 dvmCompilerMethodMIR2LIR(CompilationUnit *cUnit) argument [all...] |
H A D | ArchVariant.cpp | 102 void dvmCompilerGenMemBarrier(CompilationUnit *cUnit, int barrierKind) argument 105 ArmLIR *dmb = newLIR1(cUnit, kThumb2Dmb, barrierKind);
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/dalvik/vm/compiler/codegen/mips/mips/ |
H A D | MethodCodegenDriver.cpp | 17 void dvmCompilerMethodMIR2LIR(CompilationUnit *cUnit) argument
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H A D | ArchVariant.cpp | 104 void dvmCompilerGenMemBarrier(CompilationUnit *cUnit, int barrierKind) argument
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/dalvik/vm/compiler/codegen/arm/ |
H A D | GlobalOptimizations.cpp | 25 static void applyRedundantBranchElimination(CompilationUnit *cUnit) argument 29 for (thisLIR = (ArmLIR *) cUnit->firstLIRInsn; 30 thisLIR != (ArmLIR *) cUnit->lastLIRInsn; 55 (nextLIR = (ArmLIR *) cUnit->lastLIRInsn)) 62 void dvmCompilerApplyGlobalOptimizations(CompilationUnit *cUnit) argument 64 applyRedundantBranchElimination(cUnit);
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H A D | ArmRallocUtil.cpp | 52 extern void dvmCompilerClobberCallRegs(CompilationUnit *cUnit) argument 54 dvmCompilerClobber(cUnit, r0); 55 dvmCompilerClobber(cUnit, r1); 56 dvmCompilerClobber(cUnit, r2); 57 dvmCompilerClobber(cUnit, r3); 58 dvmCompilerClobber(cUnit, r9); // Need to do this?, be conservative 59 dvmCompilerClobber(cUnit, r11); 60 dvmCompilerClobber(cUnit, r12); 61 dvmCompilerClobber(cUnit, r14lr); 65 extern void dvmCompilerClobberHandlerRegs(CompilationUnit *cUnit) argument 76 dvmCompilerGetReturnWide(CompilationUnit *cUnit) argument 87 dvmCompilerGetReturnWideAlt(CompilationUnit *cUnit) argument 100 dvmCompilerGetReturn(CompilationUnit *cUnit) argument 108 dvmCompilerGetReturnAlt(CompilationUnit *cUnit) argument [all...] |
H A D | ArchFactory.cpp | 29 static TGT_LIR *genRegImmCheck(CompilationUnit *cUnit, argument 34 TGT_LIR *branch = genCmpImmBranch(cUnit, cond, reg, checkValue); 35 if (cUnit->jitMode == kJitMethod) { 36 BasicBlock *bb = cUnit->curBlock; 38 ArmLIR *exceptionLabel = (ArmLIR *) cUnit->blockLabelList; 48 return genCheckCommon(cUnit, dOffset, branch, pcrLabel); 57 static TGT_LIR *genNullCheck(CompilationUnit *cUnit, int sReg, int mReg, argument 61 if (dvmIsBitSet(cUnit->regPool->nullCheckedRegs, sReg)) { 64 dvmSetBit(cUnit->regPool->nullCheckedRegs, sReg); 65 return genRegImmCheck(cUnit, kArmCondE 72 genRegRegCheck(CompilationUnit *cUnit, ArmConditionCode cond, int reg1, int reg2, int dOffset, TGT_LIR *pcrLabel) argument 88 genZeroCheck(CompilationUnit *cUnit, int mReg, int dOffset, TGT_LIR *pcrLabel) argument 95 genBoundsCheck(CompilationUnit *cUnit, int rIndex, int rBound, int dOffset, TGT_LIR *pcrLabel) argument 106 genDispatchToHandler(CompilationUnit *cUnit, TemplateOpcode opcode) argument [all...] |
/dalvik/vm/compiler/ |
H A D | Ralloc.cpp | 27 static void inferTypes(CompilationUnit *cUnit, BasicBlock *bb) argument 39 cUnit->regLocation[ssaRep->uses[i]].fp = true; 43 cUnit->regLocation[ssaRep->defs[i]].fp = true; 57 void dvmCompilerLocalRegAlloc(CompilationUnit *cUnit) argument 63 loc = (RegLocation*)dvmCompilerNew(cUnit->numSSARegs * sizeof(*loc), true); 64 for (i=0; i< cUnit->numSSARegs; i++) { 68 cUnit->regLocation = loc; 72 dvmGrowableListIteratorInit(&cUnit->blockList, &iterator); 77 inferTypes(cUnit, bb); 81 for (i=0; i < cUnit [all...] |
H A D | IntermediateRep.cpp | 81 void dvmCompilerAppendLIR(CompilationUnit *cUnit, LIR *lir) argument 83 if (cUnit->firstLIRInsn == NULL) { 84 assert(cUnit->lastLIRInsn == NULL); 85 cUnit->lastLIRInsn = cUnit->firstLIRInsn = lir; 88 cUnit->lastLIRInsn->next = lir; 89 lir->prev = cUnit->lastLIRInsn; 91 cUnit->lastLIRInsn = lir;
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H A D | InlineTransformation.cpp | 37 static bool inlineGetter(CompilationUnit *cUnit, argument 137 static bool inlineSetter(CompilationUnit *cUnit, argument 225 static bool tryInlineSingletonCallsite(CompilationUnit *cUnit, argument 250 return inlineGetter(cUnit, calleeMethod, invokeMIR, invokeBB, false, 253 return inlineSetter(cUnit, calleeMethod, invokeMIR, invokeBB, false, 259 static bool inlineEmptyVirtualCallee(CompilationUnit *cUnit, argument 273 static bool tryInlineVirtualCallsite(CompilationUnit *cUnit, argument 287 return inlineEmptyVirtualCallee(cUnit, calleeMethod, invokeMIR, 292 return inlineGetter(cUnit, calleeMethod, invokeMIR, invokeBB, true, 295 return inlineSetter(cUnit, calleeMetho 302 dvmCompilerInlineMIR(CompilationUnit *cUnit, JitTranslationInfo *info) argument [all...] |
/dalvik/vm/compiler/codegen/arm/Thumb/ |
H A D | Ralloc.cpp | 29 int dvmCompilerAllocTypedTempPair(CompilationUnit *cUnit, bool fpHint, argument 35 lowReg = dvmCompilerAllocTemp(cUnit); 36 highReg = dvmCompilerAllocTemp(cUnit); 41 int dvmCompilerAllocTypedTemp(CompilationUnit *cUnit, bool fpHint, int regClass) argument 43 return dvmCompilerAllocTemp(cUnit);
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/dalvik/vm/compiler/codegen/arm/Thumb2/ |
H A D | Ralloc.cpp | 32 int dvmCompilerAllocTypedTempPair(CompilationUnit *cUnit, argument 44 lowReg = dvmCompilerAllocTempDouble(cUnit); 47 lowReg = dvmCompilerAllocTemp(cUnit); 48 highReg = dvmCompilerAllocTemp(cUnit); 54 int dvmCompilerAllocTypedTemp(CompilationUnit *cUnit, bool fpHint, argument 61 return dvmCompilerAllocTempFloat(cUnit); 62 return dvmCompilerAllocTemp(cUnit);
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/dalvik/vm/compiler/codegen/arm/armv5te-vfp/ |
H A D | ArchVariant.cpp | 107 void dvmCompilerGenMemBarrier(CompilationUnit *cUnit, int barrierKind) argument
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/dalvik/vm/compiler/codegen/mips/Mips32/ |
H A D | Ralloc.cpp | 29 int dvmCompilerAllocTypedTempPair(CompilationUnit *cUnit, bool fpHint, argument 38 lowReg = dvmCompilerAllocTempDouble(cUnit); 45 lowReg = dvmCompilerAllocTemp(cUnit); 46 highReg = dvmCompilerAllocTemp(cUnit); 51 int dvmCompilerAllocTypedTemp(CompilationUnit *cUnit, bool fpHint, int regClass) argument 56 return dvmCompilerAllocTempFloat(cUnit); 59 return dvmCompilerAllocTemp(cUnit);
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/dalvik/vm/compiler/codegen/ |
H A D | Ralloc.h | 40 static inline int dvmCompilerS2VReg(CompilationUnit *cUnit, int sReg) argument 43 return DECODE_REG(dvmConvertSSARegToDalvik(cUnit, sReg)); 47 static inline void dvmCompilerResetNullCheck(CompilationUnit *cUnit) argument 49 dvmClearAllBits(cUnit->regPool->nullCheckedRegs); 55 * dataflow analysis and refer to slot numbers in the cUnit->regLocation 57 * entries in the cUnit->reglocation[] array. Therefore, when location 67 static inline bool dvmCompilerLiveOut(CompilationUnit *cUnit, int sReg) argument 79 extern RegLocation dvmCompilerEvalLoc(CompilationUnit *cUnit, RegLocation loc, 82 extern void dvmCompilerClobber(CompilationUnit *cUnit, int reg); 84 extern RegLocation dvmCompilerUpdateLoc(CompilationUnit *cUnit, [all...] |
H A D | CodegenFactory.cpp | 35 static TGT_LIR *loadWordDisp(CompilationUnit *cUnit, int rBase, argument 38 return loadBaseDisp(cUnit, NULL, rBase, displacement, rDest, kWord, 42 static TGT_LIR *storeWordDisp(CompilationUnit *cUnit, int rBase, argument 45 return storeBaseDisp(cUnit, rBase, displacement, rSrc, kWord); 53 static void loadValueDirect(CompilationUnit *cUnit, RegLocation rlSrc, argument 56 rlSrc = dvmCompilerUpdateLoc(cUnit, rlSrc); 58 genRegCopy(cUnit, reg1, rlSrc.lowReg); 60 loadWordDisp(cUnit, rSELF, offsetof(Thread, interpSave.retval), reg1); 63 loadWordDisp(cUnit, rFP, dvmCompilerS2VReg(cUnit, rlSr 73 loadValueDirectFixed(CompilationUnit *cUnit, RegLocation rlSrc, int reg1) argument 86 loadValueDirectWide(CompilationUnit *cUnit, RegLocation rlSrc, int regLo, int regHi) argument 109 loadValueDirectWideFixed(CompilationUnit *cUnit, RegLocation rlSrc, int regLo, int regHi) argument 119 loadValue(CompilationUnit *cUnit, RegLocation rlSrc, RegisterClass opKind) argument 136 storeValue(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc) argument 185 loadValueWide(CompilationUnit *cUnit, RegLocation rlSrc, RegisterClass opKind) argument 207 storeValueWide(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc) argument [all...] |
/dalvik/vm/compiler/codegen/arm/FP/ |
H A D | ThumbPortableFP.cpp | 18 static bool genArithOpFloatPortable(CompilationUnit *cUnit, MIR *mir, 22 static bool genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir, 26 static bool genConversionPortable(CompilationUnit *cUnit, MIR *mir); 28 static bool handleExecuteInlineC(CompilationUnit *cUnit, MIR *mir); 30 static bool genConversion(CompilationUnit *cUnit, MIR *mir) argument 32 return genConversionPortable(cUnit, mir); 35 static bool genArithOpFloat(CompilationUnit *cUnit, MIR *mir, argument 39 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2); 42 static bool genArithOpDouble(CompilationUnit *cUnit, MIR *mir, argument 46 return genArithOpDoublePortable(cUnit, mi 49 genInlineSqrt(CompilationUnit *cUnit, MIR *mir) argument 54 genCmpFP(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument [all...] |
H A D | ThumbVFP.cpp | 27 static void loadValueAddressDirect(CompilationUnit *cUnit, RegLocation rlSrc, argument 30 rlSrc = rlSrc.wide ? dvmCompilerUpdateLocWide(cUnit, rlSrc) : 31 dvmCompilerUpdateLoc(cUnit, rlSrc); 34 dvmCompilerFlushRegWide(cUnit, rlSrc.lowReg, rlSrc.highReg); 36 dvmCompilerFlushReg(cUnit, rlSrc.lowReg); 39 dvmCompilerClobber(cUnit, rDest); 40 dvmCompilerLockTemp(cUnit, rDest); 41 opRegRegImm(cUnit, kOpAdd, rDest, r5FP, 42 dvmCompilerS2VReg(cUnit, rlSrc.sRegLow) << 2); 45 static bool genInlineSqrt(CompilationUnit *cUnit, MI argument 64 genArithOpFloat(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 110 genArithOpDouble(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 154 genConversion(CompilationUnit *cUnit, MIR *mir) argument 226 genCmpFP(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument [all...] |
H A D | Thumb2VFP.cpp | 17 static bool genArithOpFloat(CompilationUnit *cUnit, MIR *mir, argument 48 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, 54 rlSrc1 = loadValue(cUnit, rlSrc1, kFPReg); 55 rlSrc2 = loadValue(cUnit, rlSrc2, kFPReg); 56 rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kFPReg, true); 57 newLIR3(cUnit, (ArmOpcode)op, rlResult.lowReg, rlSrc1.lowReg, 59 storeValue(cUnit, rlDest, rlResult); 63 static bool genArithOpDouble(CompilationUnit *cUnit, MIR *mir, argument 90 return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1, 97 rlSrc1 = loadValueWide(cUnit, rlSrc 111 genConversion(CompilationUnit *cUnit, MIR *mir) argument 185 genInlineSqrt(CompilationUnit *cUnit, MIR *mir) argument 211 genCmpFP(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument [all...] |
/dalvik/vm/compiler/codegen/arm/armv7-a/ |
H A D | ArchVariant.cpp | 102 void dvmCompilerGenMemBarrier(CompilationUnit *cUnit, int barrierKind) argument 105 ArmLIR *dmb = newLIR1(cUnit, kThumb2Dmb, barrierKind);
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/dalvik/vm/compiler/codegen/mips/ |
H A D | Ralloc.h | 44 static inline int dvmCompilerS2VReg(CompilationUnit *cUnit, int sReg) argument 47 return DECODE_REG(dvmConvertSSARegToDalvik(cUnit, sReg)); 51 static inline void dvmCompilerResetNullCheck(CompilationUnit *cUnit) argument 53 dvmClearAllBits(cUnit->regPool->nullCheckedRegs); 59 * dataflow analysis and refer to slot numbers in the cUnit->regLocation 61 * entries in the cUnit->reglocation[] array. Therefore, when location 71 static inline bool dvmCompilerLiveOut(CompilationUnit *cUnit, int sReg) argument 83 extern RegLocation dvmCompilerEvalLoc(CompilationUnit *cUnit, RegLocation loc, 86 extern void dvmCompilerClobber(CompilationUnit *cUnit, int reg); 88 extern RegLocation dvmCompilerUpdateLoc(CompilationUnit *cUnit, [all...] |
H A D | GlobalOptimizations.cpp | 25 static void applyRedundantBranchElimination(CompilationUnit *cUnit) argument 29 for (thisLIR = (MipsLIR *) cUnit->firstLIRInsn; 30 thisLIR != (MipsLIR *) cUnit->lastLIRInsn; 55 (nextLIR = (MipsLIR *) cUnit->lastLIRInsn)) 65 static void applyCopyPropagation(CompilationUnit *cUnit) argument 70 for (thisLIR = (MipsLIR *) cUnit->firstLIRInsn; 71 thisLIR != (MipsLIR *) cUnit->lastLIRInsn; 85 nextLIR != (MipsLIR *) cUnit->lastLIRInsn; 187 static void mergeMovs(CompilationUnit *cUnit) argument 192 for (thisLIR = (MipsLIR *) cUnit 384 introduceBranchDelaySlot(CompilationUnit *cUnit) argument 414 dvmCompilerApplyGlobalOptimizations(CompilationUnit *cUnit) argument [all...] |
/dalvik/vm/compiler/codegen/mips/FP/ |
H A D | MipsFP.cpp | 22 extern void dvmCompilerFlushRegWideForV5TEVFP(CompilationUnit *cUnit, 24 extern void dvmCompilerFlushRegForV5TEVFP(CompilationUnit *cUnit, int reg); 27 static void loadValueAddress(CompilationUnit *cUnit, RegLocation rlSrc, argument 30 rlSrc = rlSrc.wide ? dvmCompilerUpdateLocWide(cUnit, rlSrc) : 31 dvmCompilerUpdateLoc(cUnit, rlSrc); 34 dvmCompilerFlushRegWideForV5TEVFP(cUnit, rlSrc.lowReg, 37 dvmCompilerFlushRegForV5TEVFP(cUnit, rlSrc.lowReg); 40 opRegRegImm(cUnit, kOpAdd, rDest, rFP, 41 dvmCompilerS2VReg(cUnit, rlSrc.sRegLow) << 2); 44 static bool genInlineSqrt(CompilationUnit *cUnit, MI argument 67 genArithOpFloat(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 157 genArithOpDouble(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 246 genConversion(CompilationUnit *cUnit, MIR *mir) argument 378 genCmpFP(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument [all...] |