/external/llvm/utils/TableGen/ |
H A D | X86RecognizableInstr.cpp | 209 const CodeGenInstruction &insn, 213 Rec = insn.TheDef; 242 Operands = &insn.Operands.OperandList; 280 const CodeGenInstruction &insn, 284 if (insn.TheDef->getValueAsBit("isAsmParserOnly")) 287 RecognizableInstr recogInstr(tables, insn, uid); 208 RecognizableInstr(DisassemblerTables &tables, const CodeGenInstruction &insn, InstrUID uid) argument 279 processInstr(DisassemblerTables &tables, const CodeGenInstruction &insn, InstrUID uid) argument
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/external/qemu/ |
H A D | cpu-exec.c | 1058 uint32_t insn = *pc; local 1062 switch (insn >> 26) { 1087 uint32_t insn; local 1107 insn = *(uint32_t *)pc; 1108 if ((insn >> 30) == 3) { 1109 switch((insn >> 19) & 0x3f) { 1288 uint32_t insn = *(uint32_t *)pc; local 1292 switch (insn >> 26) { 1303 is_write = (insn >> 9) & 1; 1307 switch ((insn >> [all...] |
H A D | arm-dis.c | 87 unsigned long arch; /* Architecture defining this insn. */ 88 unsigned long value, mask; /* Recognise insn if (op&mask)==value. */ 89 const char *assembler; /* How to disassemble this insn. */ 94 unsigned long arch; /* Architecture defining this insn. */ 95 unsigned short value, mask; /* Recognise insn if (op&mask)==value. */ 96 const char *assembler; /* How to disassemble this insn. */ 111 %P print floating point precision in arithmetic insn 112 %Q print floating point precision in ldf/stf insn 1537 /* The address of the insn for which the IT state is valid. */ 1558 arm_decode_bitfield (const char *ptr, unsigned long insn, argument 1634 const struct opcode32 *insn; local 2223 const struct opcode32 *insn; local 2677 const struct opcode32 *insn; local 3037 const struct opcode16 *insn; local 3313 const struct opcode32 *insn; local 3793 unsigned int insn; local [all...] |
H A D | trace.c | 362 char *fname = create_trace_path(filename, ".insn"); 589 void trace_add_insn(uint32_t insn, int is_thumb) argument 591 trace_static.insns[trace_static.next_insn++] = insn; 601 uint32_t insn; local 613 insn = hostToLE32(trace_static.insns[ii]); 614 fwrite(&insn, sizeof(insn), 1, trace_static.fstream); 865 int get_insn_ticks_arm(uint32_t insn) argument 873 if ((insn >> 28) == 0xf) 875 if ((insn >> 2 1181 get_insn_ticks_thumb(uint32_t insn) argument [all...] |
H A D | ppc-dis.c | 182 where the operand goes in the insn. */ 911 insert_bat (unsigned long insn, 916 return insn | (((insn >> 21) & 0x1f) << 16); argument 920 extract_bat (unsigned long insn, 924 if (((insn >> 21) & 0x1f) != ((insn >> 16) & 0x1f)) 936 insert_bba (unsigned long insn, 941 return insn | (((insn >> 1 argument 907 insert_bat(unsigned long insn, long value ATTRIBUTE_UNUSED, int dialect ATTRIBUTE_UNUSED, const char **errmsg ATTRIBUTE_UNUSED) argument 932 insert_bba(unsigned long insn, long value ATTRIBUTE_UNUSED, int dialect ATTRIBUTE_UNUSED, const char **errmsg ATTRIBUTE_UNUSED) argument 968 insert_bdm(unsigned long insn, long value, int dialect, const char **errmsg ATTRIBUTE_UNUSED) argument 989 extract_bdm(unsigned long insn, int dialect, int *invalid) argument 1013 insert_bdp(unsigned long insn, long value, int dialect, const char **errmsg ATTRIBUTE_UNUSED) argument 1034 extract_bdp(unsigned long insn, int dialect, int *invalid) argument 1116 insert_bo(unsigned long insn, long value, int dialect, const char **errmsg) argument 1127 extract_bo(unsigned long insn, int dialect, int *invalid) argument 1144 insert_boe(unsigned long insn, long value, int dialect, const char **errmsg) argument 1158 extract_boe(unsigned long insn, int dialect, int *invalid) argument 1173 insert_fxm(unsigned long insn, long value, int dialect, const char **errmsg) argument 1218 extract_fxm(unsigned long insn, int dialect ATTRIBUTE_UNUSED, int *invalid) argument 1248 insert_mbe(unsigned long insn, long value, int dialect ATTRIBUTE_UNUSED, const char **errmsg) argument 1301 extract_mbe(unsigned long insn, int dialect ATTRIBUTE_UNUSED, int *invalid) argument 1334 insert_mb6(unsigned long insn, long value, int dialect ATTRIBUTE_UNUSED, const char **errmsg ATTRIBUTE_UNUSED) argument 1343 extract_mb6(unsigned long insn, int dialect ATTRIBUTE_UNUSED, int *invalid ATTRIBUTE_UNUSED) argument 1354 extract_nb(unsigned long insn, int dialect ATTRIBUTE_UNUSED, int *invalid ATTRIBUTE_UNUSED) argument 1372 insert_nsi(unsigned long insn, long value, int dialect ATTRIBUTE_UNUSED, const char **errmsg ATTRIBUTE_UNUSED) argument 1381 extract_nsi(unsigned long insn, int dialect ATTRIBUTE_UNUSED, int *invalid) argument 1394 insert_ral(unsigned long insn, long value, int dialect ATTRIBUTE_UNUSED, const char **errmsg) argument 1409 insert_ram(unsigned long insn, long value, int dialect ATTRIBUTE_UNUSED, const char **errmsg) argument 1423 insert_raq(unsigned long insn, long value, int dialect ATTRIBUTE_UNUSED, const char **errmsg) argument 1440 insert_ras(unsigned long insn, long value, int dialect ATTRIBUTE_UNUSED, const char **errmsg) argument 1457 insert_rbs(unsigned long insn, long value ATTRIBUTE_UNUSED, int dialect ATTRIBUTE_UNUSED, const char **errmsg ATTRIBUTE_UNUSED) argument 1466 extract_rbs(unsigned long insn, int dialect ATTRIBUTE_UNUSED, int *invalid) argument 1478 insert_sh6(unsigned long insn, long value, int dialect ATTRIBUTE_UNUSED, const char **errmsg ATTRIBUTE_UNUSED) argument 1487 extract_sh6(unsigned long insn, int dialect ATTRIBUTE_UNUSED, int *invalid ATTRIBUTE_UNUSED) argument 1498 insert_spr(unsigned long insn, long value, int dialect ATTRIBUTE_UNUSED, const char **errmsg ATTRIBUTE_UNUSED) argument 1507 extract_spr(unsigned long insn, int dialect ATTRIBUTE_UNUSED, int *invalid ATTRIBUTE_UNUSED) argument 1517 insert_sprg(unsigned long insn, long value, int dialect, const char **errmsg) argument 1539 extract_sprg(unsigned long insn, int dialect, int *invalid) argument 1566 insert_tbr(unsigned long insn, long value, int dialect ATTRIBUTE_UNUSED, const char **errmsg ATTRIBUTE_UNUSED) argument 1577 extract_tbr(unsigned long insn, int dialect ATTRIBUTE_UNUSED, int *invalid ATTRIBUTE_UNUSED) argument 5192 operand_value_powerpc(const struct powerpc_operand *operand, unsigned long insn, int dialect) argument 5222 skip_optional_operands(const unsigned char *opindex, unsigned long insn, int dialect) argument 5249 unsigned long insn; local [all...] |
H A D | mips-dis.c | 468 /* Conditional branch likely: if branch not taken, insn nullified. */ 620 #define OPCODE_IS_MEMBER(insn, isa, cpu) \ 621 (((insn)->membership & isa) != 0 \ 622 || (cpu == CPU_R4650 && ((insn)->membership & INSN_4650) != 0) \ 623 || (cpu == CPU_RM7000 && ((insn)->membership & INSN_4650) != 0) \ 624 || (cpu == CPU_RM9000 && ((insn)->membership & INSN_4650) != 0) \ 625 || (cpu == CPU_R4010 && ((insn)->membership & INSN_4010) != 0) \ 626 || (cpu == CPU_VR4100 && ((insn)->membership & INSN_4100) != 0) \ 627 || (cpu == CPU_R3900 && ((insn)->membership & INSN_3900) != 0) \ 629 && ((insn) 4104 unsigned long insn; local [all...] |
/external/qemu/target-arm/ |
H A D | op_helper.c | 101 void HELPER(set_cp)(CPUState *env, uint32_t insn, uint32_t val) argument 103 int cp_num = (insn >> 8) & 0xf; 104 int cp_info = (insn >> 5) & 7; 105 int src = (insn >> 16) & 0xf; 106 int operand = insn & 0xf; 113 uint32_t HELPER(get_cp)(CPUState *env, uint32_t insn) argument 115 int cp_num = (insn >> 8) & 0xf; 116 int cp_info = (insn >> 5) & 7; 117 int dest = (insn >> 16) & 0xf; 118 int operand = insn 128 set_cp(CPUState *env, uint32_t insn, uint32_t val) argument 135 get_cp(CPUState *env, uint32_t insn) argument 470 neon_vldst_all(uint32_t insn) argument [all...] |
H A D | helper.c | 594 /* These should probably raise undefined insn exceptions. */ 595 void HELPER(set_cp15)(CPUState *env, uint32_t insn, uint32_t val) argument 597 cpu_abort(env, "cp15 insn %08x\n", insn); 600 uint32_t HELPER(get_cp15)(CPUState *env, uint32_t insn) argument 602 cpu_abort(env, "cp15 insn %08x\n", insn); 606 /* These should probably raise undefined insn exceptions. */ 1399 void HELPER(set_cp15)(CPUState *env, uint32_t insn, uint32_t val) argument 1405 op1 = (insn >> 2 1834 get_cp15(CPUState *env, uint32_t insn) argument [all...] |
H A D | translate.c | 164 /* normaly, since we updated PC, we need only to add one insn */ 852 static inline void gen_add_data_offset(DisasContext *s, unsigned int insn, argument 858 if (!(insn & (1 << 25))) { 860 val = insn & 0xfff; 861 if (!(insn & (1 << 23))) 867 rm = (insn) & 0xf; 868 shift = (insn >> 7) & 0x1f; 869 shiftop = (insn >> 5) & 3; 872 if (!(insn & (1 << 23))) 880 static inline void gen_add_datah_offset(DisasContext *s, unsigned int insn, argument 1320 gen_iwmmxt_address(DisasContext *s, uint32_t insn, TCGv dest) argument 1354 gen_iwmmxt_shift(uint32_t insn, uint32_t mask, TCGv dest) argument 1378 disas_iwmmxt_insn(CPUState *env, DisasContext *s, uint32_t insn) argument 2382 disas_dsp_insn(CPUState *env, DisasContext *s, uint32_t insn) argument 2452 disas_cp_insn(CPUState *env, DisasContext *s, uint32_t insn) argument 2480 cp15_user_ok(uint32_t insn) argument 2500 cp15_tls_load_store(CPUState *env, DisasContext *s, uint32_t insn, uint32_t rd) argument 2551 disas_cp15_insn(CPUState *env, DisasContext *s, uint32_t insn) argument 2725 disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn) argument 3827 disas_neon_ls_insn(CPUState * env, DisasContext *s, uint32_t insn) argument 4416 disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn) argument 6078 disas_cp14_read(CPUState * env, DisasContext *s, uint32_t insn) argument 6138 disas_cp14_write(CPUState * env, DisasContext *s, uint32_t insn) argument 6195 disas_coproc_insn(CPUState * env, DisasContext *s, uint32_t insn) argument 6417 unsigned int cond, insn, val, op1, i, shift, rm, rs, rn, rd, sh; local 7781 uint32_t insn, imm, shift, offset; local 8852 uint32_t val, insn, op, rm, rn, rd, shift, cond; local [all...] |
/external/valgrind/main/VEX/priv/ |
H A D | host_s390_isel.c | 51 might encounter. This is computed before insn selection starts, 54 - A mapping from IRTemp to HReg. This tells the insn selector 56 temporary. This is computed before insn selection starts, and 101 addInstr(ISelEnv *env, s390_insn *insn) argument 103 addHInstr(env->code, insn); 106 vex_printf("%s\n", s390_insn_as_string(insn)); 705 s390_insn *insn; local 979 insn = s390_insn_unop(size, S390_NEGATE, res, op2); 980 addInstr(env, insn); 993 insn 1005 s390_insn *insn; local [all...] |
H A D | host_arm_defs.c | 1988 /* Finally, there is the issue that the insn trashes a 2499 Note that buf is not the insn's final place, and therefore it is 2589 /* Generate a skeletal insn that involves an a RI84 shifter operand. 2889 else vassert(0); // ill-constructed insn 3034 UInt insn; local 3038 insn = XXXXXX__(0xE,X1101,BITS4(bU,0,0,bL),rN,dD,X1011); 3039 insn |= off8; 3040 *p++ = insn; 3051 UInt insn; local 3055 insn 3077 UInt insn = XXXXXXXX(0xE, X1110, BITS4(bP,0,bQ,bR), dN, dD, local 3102 UInt insn = XXXXXXXX(0xE, X1110, BITS4(bP,bD,bQ,bR), local 3111 UInt insn = 0; local 3134 UInt insn = 0; local 3165 UInt insn = XXXXXXXX(0xE, X1110, X1011, X0100, dD, X1011, X0100, dM); local 3175 UInt insn = XXXXXXXX(cc, X1110,X1011,X0000,dD,X1011,X0100,dM); local 3184 UInt insn = XXXXXXXX(cc, X1110, BITS4(1,(fD & 1),1,1), local 3194 UInt insn = XXXXXXXX(0xE, X1110, X1011, X0111, dD, X1010, local 3202 UInt insn = XXXXXXXX(0xE, X1110, BITS4(1,(fD & 1),1,1), local 3219 UInt insn local 3234 UInt insn local 3248 UInt insn = XXXXXXXX(0xE, X1110, X1011, X1000, regD, local 3258 UInt insn = XXXXXXXX(0xE, X1110, X1011, X1000, regD, local 3268 UInt insn = XXXXXXXX(0xE, X1110, BITS4(1,(regF & 1),1,1), local 3278 UInt insn = XXXXXXXX(0xE, X1110, BITS4(1,(regF & 1),1,1), local 3313 UInt insn; local 3333 UInt insn; local 3353 UInt insn; local 3517 UInt insn; local 3735 UInt insn; local 3773 UInt insn; local 3999 UInt insn; local 4037 UInt insn; local 4084 UInt insn = XXXXXXXX(cc ^ 1, 0xA, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0); local 4100 UInt insn = XXXXXXXX(0xE, 0, X1000, regN, regD, 0, 0, regD); local [all...] |
H A D | host_s390_defs.c | 398 ppS390Instr(s390_insn *insn, Bool mode64) argument 400 vex_printf("%s", s390_insn_as_string(insn)); 424 getRegUsage_S390Instr(HRegUsage *u, s390_insn *insn, Bool mode64) argument 426 s390_insn_get_reg_usage(u, insn); 432 mapRegs_S390Instr(HRegRemap *m, s390_insn *insn, Bool mode64) argument 434 s390_insn_map_regs(m, insn); 438 /* Figure out if the given insn represents a reg-reg move, and if so 442 isMove_S390Instr(s390_insn *insn, HReg *src, HReg *dst) argument 444 return s390_insn_is_reg_reg_move(insn, src, dst); 525 /* Tell the register allocator how the given insn use 527 s390_insn_get_reg_usage(HRegUsage *u, const s390_insn *insn) argument 743 s390_insn_map_regs(HRegRemap *m, s390_insn *insn) argument 927 s390_insn_is_reg_reg_move(const s390_insn *insn, HReg *src, HReg *dst) argument 3943 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 3959 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 3975 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 3991 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4008 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4022 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4038 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4058 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4078 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4097 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4116 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4131 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4146 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4160 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4180 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4197 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4213 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4230 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4248 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4265 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4281 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4300 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4320 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4339 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4357 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4377 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4395 s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); local 4540 s390_insn_as_string(const s390_insn *insn) argument 4965 s390_insn_load_emit(UChar *buf, const s390_insn *insn) argument 5014 s390_insn_store_emit(UChar *buf, const s390_insn *insn) argument 5106 s390_insn_move_emit(UChar *buf, const s390_insn *insn) argument 5137 s390_insn_load_immediate_emit(UChar *buf, const s390_insn *insn) argument 5174 s390_insn_alu_emit(UChar *buf, const s390_insn *insn) argument 5556 s390_widen_emit(UChar *buf, const s390_insn *insn, UInt from_size, Bool sign_extend) argument 5731 s390_negate_emit(UChar *buf, const s390_insn *insn) argument 5805 s390_insn_unop_emit(UChar *buf, const s390_insn *insn) argument 5827 s390_insn_test_emit(UChar *buf, const s390_insn *insn) argument 5894 s390_insn_cc2bool_emit(UChar *buf, const s390_insn *insn) argument 5916 s390_insn_cas_emit(UChar *buf, const s390_insn *insn) argument 5960 s390_insn_compare_emit(UChar *buf, const s390_insn *insn) argument 6063 s390_insn_mul_emit(UChar *buf, const s390_insn *insn) argument 6179 s390_insn_div_emit(UChar *buf, const s390_insn *insn) argument 6281 s390_insn_divs_emit(UChar *buf, const s390_insn *insn) argument 6322 s390_insn_clz_emit(UChar *buf, const s390_insn *insn) argument 6395 s390_insn_branch_emit(UChar *buf, const s390_insn *insn) argument 6493 s390_insn_helper_call_emit(UChar *buf, const s390_insn *insn) argument 6555 s390_insn_cond_move_emit(UChar *buf, const s390_insn *insn) argument 6655 s390_insn_bfp_triop_emit(UChar *buf, const s390_insn *insn) argument 6699 s390_insn_bfp_binop_emit(UChar *buf, const s390_insn *insn) argument 6746 s390_insn_bfp_unop_emit(UChar *buf, const s390_insn *insn) argument 6835 s390_insn_bfp_compare_emit(UChar *buf, const s390_insn *insn) argument 6861 s390_insn_bfp128_binop_emit(UChar *buf, const s390_insn *insn) argument 6901 s390_insn_bfp128_compare_emit(UChar *buf, const s390_insn *insn) argument 6924 s390_insn_bfp128_unop_emit(UChar *buf, const s390_insn *insn) argument 6967 s390_insn_bfp128_convert_to_emit(UChar *buf, const s390_insn *insn) argument 6994 s390_insn_bfp128_convert_from_emit(UChar *buf, const s390_insn *insn) argument 7022 s390_insn_mfence_emit(UChar *buf, const s390_insn *insn) argument 7029 emit_S390Instr(UChar *buf, Int nbuf, s390_insn *insn, Bool mode64, void *dispatch_unassisted, void *dispatch_assisted) argument [all...] |
H A D | guest_amd64_toIR.c | 130 insns: the side-exit back to the start of the insn is done with 184 /* These are set at the start of the translation of an insn, right 187 given insn. */ 196 insn being processed). */ 212 checking, if the next insn %rip is needed, we make a guess at what 214 indicate that -- after this insn's decode is finished -- that guess 217 /* At the start of each insn decode, is set to (0, False). 457 /*--- amd64 insn stream. ---*/ 532 /* Get a 8/16/32-bit unsigned value out of the insn stream. */ 559 /* Get a byte value out of the insn strea 9072 UChar* insn; /* used in SSE decoders */ local [all...] |
H A D | guest_arm_toIR.c | 134 insn is Thumb (True) or ARM (False). */ 185 /*--- arm insn stream. ---*/ 488 happened, because the first insn's write to the block is 527 r15, record info so at the end of this insn's translation, a branch 1406 /* ditto, but jump over a 16-bit thumb insn */ 1423 /* ditto, but jump over a 32-bit thumb insn */ 8244 or IRTemp_INVALID indicating the insn is always executed. In ARM 8326 or IRTemp_INVALID indicating the insn is always executed. 10224 calling this, if the insn is to be conditional. Caller is 10421 the insn (ya 12057 UInt insn; local [all...] |
H A D | guest_s390_toIR.c | 603 insn. Returns an expression of type Ity_I32 */ 13225 vex_printf("unknown insn: "); 13229 vex_printf("unimplemented insn: "); 13233 vex_printf("unimplemented special insn: "); 13265 disInstr_S390_WRK(UChar *insn) argument 13275 /* Get the first byte of the insn. */ 13276 byte = insn[0]; 13278 /* The leftmost two bits (0:1) encode the length of the insn in bytes. 13294 if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) { 13297 Tell the dispatcher that this insn canno [all...] |
H A D | guest_x86_toIR.c | 100 insns: the side-exit back to the start of the insn is done with 195 /* These are set at the start of the translation of an insn, right 198 given insn. */ 204 insn being processed). */ 290 /*--- x86 insn stream. ---*/ 340 /* Fetch a byte from the guest insn stream. */ 366 /* Get a 8/16/32-bit unsigned value out of the insn stream. */ 402 /* Get a byte value out of the insn stream and sign-extend to 32 1711 /* Figure out the number of (insn-stream) bytes constituting the amode 2810 /* The Intel docs imply this insn i 7878 UChar* insn; /* used in SSE decoders */ local [all...] |
/external/clang/lib/CodeGen/ |
H A D | CGCall.cpp | 1311 static void eraseUnusedBitCasts(llvm::Instruction *insn) { argument 1312 while (insn->use_empty()) { 1313 llvm::BitCastInst *bitcast = dyn_cast<llvm::BitCastInst>(insn); 1317 insn = cast<llvm::Instruction>(bitcast->getOperand(0));
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/external/qemu/tcg/hppa/ |
H A D | tcg-target.c | 151 uint32_t insn = *insn_ptr; local 163 insn &= ~0x1ffdu; 164 insn |= reassemble_12(pcrel); 168 insn &= ~0x1f1ffdu; 169 insn |= reassemble_17(pcrel); 175 *insn_ptr = insn;
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/external/webkit/Source/JavaScriptCore/assembler/ |
H A D | MIPSAssembler.h | 744 MIPSWord* insn = reinterpret_cast<MIPSWord*>(reinterpret_cast<intptr_t>(m_buffer.data()) + from.m_offset); local 747 ASSERT(!(*(insn - 1)) && !(*(insn - 2)) && !(*(insn - 3)) && !(*(insn - 5))); 748 insn = insn - 6; 749 linkWithOffset(insn, toPos); 755 MIPSWord* insn = reinterpret_cast<MIPSWord*>(reinterpret_cast<intptr_t>(code) + from.m_offset); local 757 ASSERT(!(*(insn 764 MIPSWord* insn = reinterpret_cast<MIPSWord*>(reinterpret_cast<intptr_t>(code) + from.m_offset); local 770 MIPSWord* insn = reinterpret_cast<MIPSWord*>(reinterpret_cast<intptr_t>(code) + from.m_offset); local 780 MIPSWord* insn = reinterpret_cast<MIPSWord*>(from); local 803 MIPSWord* insn = reinterpret_cast<MIPSWord*>(from); local 825 MIPSWord* insn = reinterpret_cast<MIPSWord*>(reinterpret_cast<intptr_t>(newBase) + pos); local 861 linkWithOffset(MIPSWord* insn, void* to) argument 939 MIPSWord* insn = reinterpret_cast<MIPSWord*>(from); local [all...] |
H A D | ARMAssembler.h | 731 static ARMWord* getLdrImmAddress(ARMWord* insn) argument 735 if ((*insn & 0x0f7f0000) != 0x051f0000) { 737 ASSERT((*insn & 0x012fff30) == 0x012fff30); 738 insn--; 742 ASSERT((*insn & 0x0f7f0000) == 0x051f0000); 744 ARMWord addr = reinterpret_cast<ARMWord>(insn) + DefaultPrefetching * sizeof(ARMWord); 745 if (*insn & DT_UP) 746 return reinterpret_cast<ARMWord*>(addr + (*insn & SDT_OFFSET_MASK)); 747 return reinterpret_cast<ARMWord*>(addr - (*insn & SDT_OFFSET_MASK)); 750 static ARMWord* getLdrImmAddressOnPool(ARMWord* insn, uint32_ argument 762 ARMWord* insn = reinterpret_cast<ARMWord*>(from); local 801 ARMWord* insn = reinterpret_cast<ARMWord*>(getAbsoluteJumpAddress(m_buffer.data(), from.m_offset)); local [all...] |
H A D | SH4Assembler.h | 1343 static uint32_t* getLdrImmAddressOnPool(SH4Word* insn, uint32_t* constPool) argument 1345 return (constPool + (*insn & 0xff));
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/external/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 425 uint32_t insn = (bytes[3] << 24) | local 431 DecodeStatus result = decodeInstruction(DecoderTableARM32, MI, insn, 441 result = decodeInstruction(DecoderTableVFP32, MI, insn, Address, this, STI); 448 result = decodeInstruction(DecoderTableNEONData32, MI, insn, Address, 460 result = decodeInstruction(DecoderTableNEONLoadStore32, MI, insn, Address, 472 result = decodeInstruction(DecoderTableNEONDup32, MI, insn, Address,
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/external/wpa_supplicant_8/hostapd/src/drivers/ |
H A D | driver_nl80211.c | 6145 struct sock_filter *insn = &msock_filter_insns[idx]; local 6147 if (BPF_CLASS(insn->code) == BPF_JMP) { 6148 if (insn->code == (BPF_JMP|BPF_JA)) { 6149 if (insn->k == PASS) 6150 insn->k = msock_filter.len - idx - 2; 6151 else if (insn->k == FAIL) 6152 insn->k = msock_filter.len - idx - 3; 6155 if (insn->jt == PASS) 6156 insn->jt = msock_filter.len - idx - 2; 6157 else if (insn [all...] |
/external/wpa_supplicant_8/src/drivers/ |
H A D | driver_nl80211.c | 6145 struct sock_filter *insn = &msock_filter_insns[idx]; local 6147 if (BPF_CLASS(insn->code) == BPF_JMP) { 6148 if (insn->code == (BPF_JMP|BPF_JA)) { 6149 if (insn->k == PASS) 6150 insn->k = msock_filter.len - idx - 2; 6151 else if (insn->k == FAIL) 6152 insn->k = msock_filter.len - idx - 3; 6155 if (insn->jt == PASS) 6156 insn->jt = msock_filter.len - idx - 2; 6157 else if (insn [all...] |
/external/wpa_supplicant_8/wpa_supplicant/src/drivers/ |
H A D | driver_nl80211.c | 6145 struct sock_filter *insn = &msock_filter_insns[idx]; local 6147 if (BPF_CLASS(insn->code) == BPF_JMP) { 6148 if (insn->code == (BPF_JMP|BPF_JA)) { 6149 if (insn->k == PASS) 6150 insn->k = msock_filter.len - idx - 2; 6151 else if (insn->k == FAIL) 6152 insn->k = msock_filter.len - idx - 3; 6155 if (insn->jt == PASS) 6156 insn->jt = msock_filter.len - idx - 2; 6157 else if (insn [all...] |