Searched defs:lir (Results 1 - 9 of 9) sorted by relevance
/dalvik/vm/compiler/codegen/mips/ |
H A D | ArchUtility.cpp | 34 static void buildInsnString(const char *fmt, MipsLIR *lir, char* buf, argument 53 operand = lir->operands[nc-'0']; 118 (int) baseAddr + lir->generic.offset + 4 + 120 lir->generic.target); 127 int offset_1 = lir->operands[0]; 128 int offset_2 = NEXT_LIR(lir)->operands[0]; 130 ((((intptr_t) baseAddr + lir->generic.offset + 4) & 165 void dvmDumpResourceMask(LIR *lir, u8 mask, const char *prefix) 169 MipsLIR *mipsLIR = (MipsLIR *) lir; 220 MipsLIR *lir [all...] |
H A D | CodegenCommon.cpp | 35 static void setMemRefType(MipsLIR *lir, bool isLoad, int memType) argument 40 assert(EncodingMap[lir->opcode].flags & (IS_LOAD | IS_STORE)); 43 maskPtr = &lir->useMask; 45 maskPtr = &lir->defMask; 63 assert(!(EncodingMap[lir->opcode].flags & IS_STORE)); 77 static void annotateDalvikRegAccess(MipsLIR *lir, int regId, bool isLoad) argument 80 setMemRefType(lir, isLoad, kDalvikReg); 86 lir->aliasInfo = regId; 87 if (DOUBLEREG(lir->operands[0])) { 88 lir [all...] |
H A D | Assemble.cpp | 440 MipsLIR *lir; local 442 for (lir = (MipsLIR *) cUnit->firstLIRInsn; lir; lir = NEXT_LIR(lir)) { 443 if (lir->opcode < 0) { 448 if (lir->flags.isNop) { 452 if (lir->opcode == kMipsB || lir->opcode == kMipsBal) { 453 MipsLIR *targetLIR = (MipsLIR *) lir 558 assignLiteralOffsetCommon(LIR *lir, int offset) argument [all...] |
H A D | CodegenDriver.cpp | 4826 void dvmCompilerSetupResourceMasks(MipsLIR *lir) argument 4828 setupResourceMasks(lir);
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/dalvik/vm/compiler/ |
H A D | IntermediateRep.cpp | 81 void dvmCompilerAppendLIR(CompilationUnit *cUnit, LIR *lir) argument 85 cUnit->lastLIRInsn = cUnit->firstLIRInsn = lir; 86 lir->prev = lir->next = NULL; 88 cUnit->lastLIRInsn->next = lir; 89 lir->prev = cUnit->lastLIRInsn; 90 lir->next = NULL; 91 cUnit->lastLIRInsn = lir;
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/dalvik/vm/compiler/codegen/arm/ |
H A D | ArchUtility.cpp | 76 static void buildInsnString(const char *fmt, ArmLIR *lir, char* buf, argument 96 operand = lir->operands[nc-'0']; 199 (int) baseAddr + lir->generic.offset + 4 + 201 lir->generic.target); 204 int offset_1 = lir->operands[0]; 205 int offset_2 = NEXT_LIR(lir)->operands[0]; 207 ((((intptr_t) baseAddr + lir->generic.offset + 4) & 219 decodeRegList(lir->opcode, operand, tbuf); 241 void dvmDumpResourceMask(LIR *lir, u8 mask, const char *prefix) 245 ArmLIR *armLIR = (ArmLIR *) lir; [all...] |
H A D | CodegenCommon.cpp | 35 static void setMemRefType(ArmLIR *lir, bool isLoad, int memType) argument 39 assert(EncodingMap[lir->opcode].flags & (IS_LOAD | IS_STORE)); 41 maskPtr = &lir->useMask; 43 maskPtr = &lir->defMask; 61 assert(!(EncodingMap[lir->opcode].flags & IS_STORE)); 75 static void annotateDalvikRegAccess(ArmLIR *lir, int regId, bool isLoad) argument 77 setMemRefType(lir, isLoad, kDalvikReg); 83 lir->aliasInfo = regId; 84 if (DOUBLEREG(lir->operands[0])) { 85 lir 126 setupResourceMasks(ArmLIR *lir) argument 232 relaxBranchMasks(ArmLIR *lir) argument [all...] |
H A D | Assemble.cpp | 936 ArmLIR *lir; local 938 for (lir = (ArmLIR *) cUnit->firstLIRInsn; lir; lir = NEXT_LIR(lir)) { 939 if (lir->opcode < 0) { 940 if ((lir->opcode == kArmPseudoPseudoAlign4) && 942 (lir->operands[0] == 1)) { 948 if (lir->flags.isNop) { 952 if (lir 1171 assignLiteralOffsetCommon(LIR *lir, int offset) argument [all...] |
H A D | CodegenDriver.cpp | 4723 void dvmCompilerSetupResourceMasks(ArmLIR *lir) argument 4725 setupResourceMasks(lir);
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