| /external/qemu/ |
| H A D | softmmu_header.h | 88 int mmu_idx; local
92 mmu_idx = CPU_MMU_INDEX;
93 if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
95 res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
97 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
109 int mmu_idx; local
113 mmu_idx = CPU_MMU_INDEX;
114 if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
116 res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
118 physaddr = addr + env->tlb_table[mmu_idx][page_inde
134 int mmu_idx; local
[all...] |
| H A D | softmmu_template.h | 66 int mmu_idx,
99 int mmu_idx)
115 tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ;
122 ioaddr = env->iotlb[mmu_idx][index];
128 * mmu_idx is set to 1. */
129 if (memcheck_instrument_mmu && mmu_idx == 1 &&
140 do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
143 mmu_idx, retaddr);
147 * mmu_idx is set to 1. */
148 if (memcheck_instrument_mmu && mmu_idx
98 MMUSUFFIX(target_ulong addr, int mmu_idx) argument
191 MMUSUFFIX(target_ulong addr, int mmu_idx, void *retaddr) argument
275 MMUSUFFIX(target_ulong addr, DATA_TYPE val, int mmu_idx) argument
366 MMUSUFFIX(target_ulong addr, DATA_TYPE val, int mmu_idx, void *retaddr) argument
[all...] |
| H A D | exec-all.h | 95 int mmu_idx, int is_softmmu);
98 int mmu_idx, int is_softmmu)
102 return tlb_set_page_exec(env1, vaddr, paddr, prot, mmu_idx, is_softmmu);
353 void tlb_fill(target_ulong addr, int is_write, int mmu_idx,
391 int mmu_idx, page_index, pd; local
395 mmu_idx = cpu_mmu_index(env1);
396 if (unlikely(env1->tlb_table[mmu_idx][page_index].addr_code !=
400 pd = env1->tlb_table[mmu_idx][page_index].addr_code & ~TARGET_PAGE_MASK;
409 + env1->tlb_table[mmu_idx][page_index].addend;
96 tlb_set_page(CPUState *env1, target_ulong vaddr, target_phys_addr_t paddr, int prot, int mmu_idx, int is_softmmu) argument
|
| H A D | exec.c | 1800 int mmu_idx; local
1801 for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) {
1802 env->tlb_table[mmu_idx][i].addr_read = -1;
1803 env->tlb_table[mmu_idx][i].addr_write = -1;
1804 env->tlb_table[mmu_idx][i].addr_code = -1;
1835 int mmu_idx; local
1846 for (mmu_idx = 0; mmu_idx < NB_MMU_MODE
1908 int mmu_idx; local
1960 int mmu_idx; local
1978 int mmu_idx; local
1990 tlb_set_page_exec(CPUState *env, target_ulong vaddr, target_phys_addr_t paddr, int prot, int mmu_idx, int is_softmmu) argument
2130 tlb_set_page_exec(CPUState *env, target_ulong vaddr, target_phys_addr_t paddr, int prot, int mmu_idx, int is_softmmu) argument
[all...] |
| /external/qemu/target-mips/ |
| H A D | helper.c | 304 int mmu_idx, int is_softmmu)
384 mmu_idx, is_softmmu);
399 int mmu_idx, int is_softmmu)
412 qemu_log("%s pc " TARGET_FMT_lx " ad " TARGET_FMT_lx " rw %d mmu_idx %d smmu %d\n",
413 __func__, env->active_tc.PC, address, rw, mmu_idx, is_softmmu);
431 mmu_idx, is_softmmu);
434 ret = cpu_mips_tlb_refill(env,address,rw,mmu_idx,is_softmmu);
303 cpu_mips_tlb_refill(CPUState *env, target_ulong address, int rw , int mmu_idx, int is_softmmu) argument
398 cpu_mips_handle_mmu_fault(CPUState *env, target_ulong address, int rw, int mmu_idx, int is_softmmu) argument
|
| H A D | op_helper.c | 1907 void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr) argument
1918 ret = cpu_mips_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
|
| /external/qemu/target-arm/ |
| H A D | op_helper.c | 73 void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr) argument
84 ret = cpu_arm_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
|
| H A D | helper.c | 582 int mmu_idx, int is_softmmu)
1322 int access_type, int mmu_idx, int is_softmmu)
1329 is_user = mmu_idx == MMU_USER_IDX;
1336 tlb_set_page (env, address, phys_addr, prot, mmu_idx, page_size);
581 cpu_arm_handle_mmu_fault(CPUState *env, target_ulong address, int rw, int mmu_idx, int is_softmmu) argument
1321 cpu_arm_handle_mmu_fault(CPUState *env, target_ulong address, int access_type, int mmu_idx, int is_softmmu) argument
|
| /external/qemu/target-i386/ |
| H A D | helper.c | 945 int is_write, int mmu_idx, int is_softmmu)
982 int is_write1, int mmu_idx, int is_softmmu)
991 is_user = mmu_idx == MMU_USER_IDX;
1247 ret = tlb_set_page_exec(env, vaddr, paddr, prot, mmu_idx, is_softmmu);
944 cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, int is_write, int mmu_idx, int is_softmmu) argument
981 cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, int is_write1, int mmu_idx, int is_softmmu) argument
|
| H A D | op_helper.c | 4830 void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr) argument
4842 ret = cpu_x86_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
|