Searched refs:opcode (Results 151 - 175 of 418) sorted by relevance

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/dalvik/vm/mterp/x86/
H A Dstub.S4 call dvmMterp_${opcode} # do the real work
H A DOP_EXECUTE_INLINE.S20 jnz .L${opcode}_debugprofile # yes, take slow path
21 .L${opcode}_resume:
24 call .L${opcode}_continue # make call; will return after
32 .L${opcode}_continue:
70 # will return to caller of .L${opcode}_continue
76 .L${opcode}_debugprofile:
84 jz .L${opcode}_resume # not resolved, just move on
93 call .L${opcode}_continue # make call; will return after
H A DOP_INVOKE_SUPER.S28 je .L${opcode}_resolve
34 .L${opcode}_continue:
38 jae .L${opcode}_nsm # method not present in superclass
50 .L${opcode}_resolve:
60 jne .L${opcode}_continue # good to go - continue
67 .L${opcode}_nsm:
/dalvik/vm/mterp/mips/
H A DunflopWide.S23 .L${opcode}_set_vreg:
29 GET_INST_OPCODE(t0) # extract opcode from rINST
H A DOP_IGET_WIDE_JUMBO.S21 bnez a0, .L${opcode}_finish # no, already resolved
26 b .L${opcode}_resolved # resolved, continue
30 .L${opcode}_resolved:
33 bnez v0, .L${opcode}_finish
41 .L${opcode}_finish:
54 GET_INST_OPCODE(t0) # extract opcode from rINST
H A DOP_IPUT_JUMBO.S24 bnez a0, .L${opcode}_finish # no, already resolved
29 b .L${opcode}_resolved # resolved, continue
33 .L${opcode}_resolved:
36 # fall through to ${opcode}_finish
44 .L${opcode}_finish:
52 GET_INST_OPCODE(t0) # extract opcode from rINST
H A DOP_IPUT_OBJECT_JUMBO.S21 bnez a0, .L${opcode}_finish # no, already resolved
26 b .L${opcode}_resolved
35 .L${opcode}_resolved:
38 # fall through to ${opcode}_finish
40 .L${opcode}_finish:
49 GET_INST_OPCODE(t0) # extract opcode from rINST
H A DOP_IPUT_WIDE_JUMBO.S19 bnez a0, .L${opcode}_finish # no, already resolved
24 b .L${opcode}_resolved # resolved, continue
28 .L${opcode}_resolved:
31 # fall through to ${opcode}_finish
37 .L${opcode}_finish:
45 GET_INST_OPCODE(rBIX) # extract opcode from rINST
H A DOP_IGET_JUMBO.S24 bnez a0, .L${opcode}_finish # no, already resolved
29 b .L${opcode}_resolved # resolved, continue
33 .L${opcode}_resolved:
42 .L${opcode}_finish:
53 GET_INST_OPCODE(t0) # extract opcode from rINST
/dalvik/dexgen/src/com/android/dexgen/rop/code/
H A DFillArrayDataInsn.java45 * @param opcode {@code non-null;} the opcode
51 public FillArrayDataInsn(Rop opcode, SourcePosition position, argument
55 super(opcode, position, null, sources);
57 if (opcode.getBranchingness() != Rop.BRANCH_NONE) {
H A DPlainCstInsn.java33 * @param opcode {@code non-null;} the opcode
39 public PlainCstInsn(Rop opcode, SourcePosition position, argument
42 super(opcode, position, result, sources, cst);
44 if (opcode.getBranchingness() != Rop.BRANCH_NONE) {
H A DSwitchInsn.java35 * @param opcode {@code non-null;} the opcode
41 public SwitchInsn(Rop opcode, SourcePosition position, RegisterSpec result, argument
43 super(opcode, position, result, sources);
45 if (opcode.getBranchingness() != Rop.BRANCH_SWITCH) {
H A DThrowingCstInsn.java35 * @param opcode {@code non-null;} the opcode
41 public ThrowingCstInsn(Rop opcode, SourcePosition position, argument
44 super(opcode, position, null, sources, cst);
46 if (opcode.getBranchingness() != Rop.BRANCH_THROW) {
H A DThrowingInsn.java57 * @param opcode {@code non-null;} the opcode
62 public ThrowingInsn(Rop opcode, SourcePosition position, argument
65 super(opcode, position, null, sources);
67 if (opcode.getBranchingness() != Rop.BRANCH_THROW) {
H A DInsn.java28 * an opcode (which specifies operation and source/result types), a
33 /** {@code non-null;} opcode */
34 private final Rop opcode; field in class:Insn
48 * @param opcode {@code non-null;} the opcode
53 public Insn(Rop opcode, SourcePosition position, RegisterSpec result, argument
55 if (opcode == null) {
56 throw new NullPointerException("opcode == null");
67 this.opcode = opcode;
[all...]
/dalvik/dx/src/com/android/dx/rop/code/
H A DFillArrayDataInsn.java45 * @param opcode {@code non-null;} the opcode
51 public FillArrayDataInsn(Rop opcode, SourcePosition position, argument
55 super(opcode, position, null, sources);
57 if (opcode.getBranchingness() != Rop.BRANCH_NONE) {
H A DPlainCstInsn.java33 * @param opcode {@code non-null;} the opcode
39 public PlainCstInsn(Rop opcode, SourcePosition position, argument
42 super(opcode, position, result, sources, cst);
44 if (opcode.getBranchingness() != Rop.BRANCH_NONE) {
H A DSwitchInsn.java35 * @param opcode {@code non-null;} the opcode
41 public SwitchInsn(Rop opcode, SourcePosition position, RegisterSpec result, argument
43 super(opcode, position, result, sources);
45 if (opcode.getBranchingness() != Rop.BRANCH_SWITCH) {
H A DThrowingCstInsn.java36 * @param opcode {@code non-null;} the opcode
42 public ThrowingCstInsn(Rop opcode, SourcePosition position, argument
45 super(opcode, position, null, sources, cst);
47 if (opcode.getBranchingness() != Rop.BRANCH_THROW) {
H A DThrowingInsn.java57 * @param opcode {@code non-null;} the opcode
62 public ThrowingInsn(Rop opcode, SourcePosition position, argument
65 super(opcode, position, null, sources);
67 if (opcode.getBranchingness() != Rop.BRANCH_THROW) {
/dalvik/vm/compiler/codegen/arm/
H A DLocalOptimizations.cpp103 isPseudoOpcode(thisLIR->opcode) ||
104 !(EncodingMap[thisLIR->opcode].flags & (IS_LOAD | IS_STORE))) {
109 bool isThisLIRLoad = EncodingMap[thisLIR->opcode].flags & IS_LOAD;
149 bool isCheckLIRLoad = EncodingMap[checkLIR->opcode].flags &
156 assert(!(EncodingMap[checkLIR->opcode].flags &
292 isPseudoOpcode(thisLIR->opcode) ||
293 !(EncodingMap[thisLIR->opcode].flags & IS_LOAD)) {
361 if (stopHere || !isPseudoOpcode(checkLIR->opcode)) {
391 if (!isPseudoOpcode(depLIR->opcode) &&
392 (EncodingMap[depLIR->opcode]
[all...]
/dalvik/vm/compiler/codegen/mips/
H A DLocalOptimizations.cpp103 isPseudoOpCode(thisLIR->opcode) ||
104 !(EncodingMap[thisLIR->opcode].flags & (IS_LOAD | IS_STORE))) {
109 bool isThisLIRLoad = EncodingMap[thisLIR->opcode].flags & IS_LOAD;
149 bool isCheckLIRLoad = EncodingMap[checkLIR->opcode].flags &
156 assert(!(EncodingMap[checkLIR->opcode].flags &
292 isPseudoOpCode(thisLIR->opcode) ||
293 !(EncodingMap[thisLIR->opcode].flags & IS_LOAD)) {
361 if (stopHere || !isPseudoOpCode(checkLIR->opcode)) {
391 if (!isPseudoOpCode(depLIR->opcode) &&
392 (EncodingMap[depLIR->opcode]
[all...]
/dalvik/dx/src/com/android/dx/ssa/
H A DLiteralOpUpgrader.java97 Rop opcode = originalRopInsn.getOpcode();
108 if (opcode.getBranchingness() == Rop.BRANCH_IF) {
114 RegOps.flippedIfOpcode(opcode.getOpcode()), null);
117 opcode.getOpcode(), null);
120 opcode, sources.get(0), sources.get(1))) {
122 } else if (opcode.isCommutative()
124 opcode, sources.get(1), sources.get(0))) {
148 Rop opcode = originalRopInsn.getOpcode();
152 opcode.getOpcode() != RegOps.CONST) {
160 if (opcode
[all...]
/dalvik/vm/mterp/armv5te/
H A DOP_SGET_WIDE.S15 beq .L${opcode}_resolve @ yes, do resolve
16 .L${opcode}_finish:
27 GET_INST_OPCODE(ip) @ extract opcode from rINST
38 .L${opcode}_resolve:
55 b .L${opcode}_finish @ resume
H A DOP_SPUT_WIDE.S17 beq .L${opcode}_resolve @ yes, do resolve
18 .L${opcode}_finish: @ field ptr in r2, AA in r9
21 GET_INST_OPCODE(r10) @ extract opcode from rINST
39 .L${opcode}_resolve:
57 b .L${opcode}_finish @ resume

Completed in 434 milliseconds

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