Searched refs:r1 (Results 151 - 175 of 179) sorted by relevance

12345678

/dalvik/vm/arch/arm/
H A DCallOldABI.S59 r0-r1 hold returns of 5-8 bytes, low word in r0
79 r1 clazz (NULL for virtual method calls, non-NULL for static)
111 cmp r1, #0
113 @ No: set r1 to *argv++, and set argc--.
114 @ (r0=pEnv, r1=this)
115 ldreq r1, [ip], #4
155 @ We're back, result is in r0 or (for long/double) r0-r1.
159 @ all we need to do is copy r0-r1 into the JValue union.
161 stmia ip, {r0-r1}
H A DCallEABI.S66 r0-r1 hold returns of 8 bytes, low word in r0
90 * r1 clazz (NULL for virtual method calls, non-NULL for static)
167 cmp r1, #0 @ calling a static method?
172 ldreq r1, [r9], #4 @ r1<- *argv++
186 * r1 don't touch
264 @ We're back, result is in r0 or (for long/double) r0-r1.
268 @ "hard" fp calling conventions, all we need to do is copy r0-r1 into
278 stmneia ip, {r0-r1} @ pReturn->j <- r0/r1
[all...]
/dalvik/vm/compiler/template/armv5te/
H A DTEMPLATE_CMPL_FLOAT.S3 * For the JIT: incoming arguments in r0-r1, r2-r3
9 * Provide a "naninst" instruction that puts 1 or -1 into r1 depending
37 mov r10, r1
50 mov r1, r9
53 movcc r0, #1 @ (greater than) r1<- 1
55 $naninst @ r1<- 1 or -1 for NaN
/dalvik/vm/mterp/armv5te/
H A Dentry.S70 mov r1, #0 @ prepare the value for the new state
71 str r1, [rSELF, #offThread_inJitCodeCache] @ back to the interp land
99 @ r1 holds value of entryPoint
/dalvik/vm/compiler/codegen/arm/Thumb2/
H A DGen.cpp37 * ldr r1, [r0] @ load counter [2 bytes]
38 * add r1, #1 @ increment [2 bytes]
39 * str r1, [r0] @ store [2 bytes]
60 newLIR3(cUnit, kThumbLdrRRI5, r1, r0, 0);
61 newLIR2(cUnit, kThumbAddRI8, r1, 1);
62 newLIR3(cUnit, kThumbStrRRI5, r1, r0, 0);
217 * r1 -> object [arg1 for dvm[Lock/Unlock]Object
246 loadValueDirectFixed(cUnit, rlSrc, r1); // Get obj
249 genNullCheck(cUnit, rlSrc.sRegLow, r1, mir->offset, NULL);
251 newLIR3(cUnit, kThumb2Ldrex, r2, r1,
[all...]
/dalvik/vm/compiler/codegen/arm/FP/
H A DThumbVFP.cpp100 loadValueAddressDirect(cUnit, rlSrc1, r1);
143 loadValueAddressDirect(cUnit, rlSrc1, r1);
214 loadValueAddressDirect(cUnit, rlSrc, r1);
252 loadValueAddressDirect(cUnit, rlSrc2, r1);
H A DThumb2VFP.cpp200 newLIR3(cUnit, kThumb2Fmrrd, r0, r1, S2D(rlSrc.lowReg, rlSrc.highReg));
203 r0, r1);
/dalvik/vm/compiler/codegen/arm/
H A DCodegenDriver.cpp62 loadValueDirectWideFixed(cUnit, rlSrc, r0, r1);
118 loadValueDirectFixed(cUnit, rlSrc2, r1);
164 loadValueDirectWideFixed(cUnit, rlSrc1, r0, r1);
234 * D/dalvikvm( 1538): 0x59414c80 (0048): movs r1, r3
560 int regArray = r1;
594 loadWordDisp(cUnit, regArray, offsetof(Object, clazz), r1);
607 dvmCompilerLockTemp(cUnit, r1);
614 loadValueDirectFixed(cUnit, rlArray, r1);
629 markCard(cUnit, r0, r1);
642 loadValueDirectWideFixed(cUnit, rlSrc1, r0, r1);
[all...]
H A DArmLIR.h24 * r0, r1, r2, r3 are always scratch
39 * Trashed across C calls: r0, r1, r2, r3, r12, r14
49 * r0, r1, r2, r3 to hold operands/results
53 * r0, r1, r2, r3, r8, r9, r10, r11, r12, r14 for operands/results
89 /* RegisterLocation templates return values (r0, or r0/r1) */
91 #define LOC_C_RETURN_WIDE {kLocPhysReg, 1, 0, r0, r1, -1}
215 r1 = 1, enumerator in enum:NativeRegisterPool
/dalvik/dexgen/src/com/android/dexgen/dex/code/form/
H A DForm35c.java109 int r1 = (sz > 1) ? regs.get(1).getReg() : 0;
118 codeUnit(r0, r1, r2, r3));
/dalvik/dx/src/com/android/dx/dex/code/form/
H A DForm35c.java127 int r1 = (sz > 1) ? regs.get(1).getReg() : 0;
136 codeUnit(r0, r1, r2, r3));
/dalvik/vm/compiler/codegen/arm/Thumb/
H A DGen.cpp40 * ldr r1, [r0]
41 * add r1, #1
42 * str r1, [r0]
65 newLIR3(cUnit, kThumbLdrRRI5, r1, r0, 0);
66 newLIR2(cUnit, kThumbAddRI8, r1, 1);
67 newLIR3(cUnit, kThumbStrRRI5, r1, r0, 0);
112 loadValueDirectWideFixed(cUnit, rlSrc1, r0, r1);
208 loadValueDirectWideFixed(cUnit, rlSrc1, r0, r1);
/dalvik/vm/mterp/mips/
H A DOP_CHECK_CAST.S50 move a1,rBIX # r1<- desired class
H A DOP_INVOKE_STATIC_JUMBO.S12 or a1, a0, a1 # r1<- AAAAaaaa
H A DOP_IPUT_WIDE.S42 JAL(dvmQuasiAtomicSwap64Sync) # stores r0/r1 into addr r2
H A DOP_IPUT_WIDE_JUMBO.S48 JAL(dvmQuasiAtomicSwap64Sync) # stores r0/r1 into addr r2
H A DOP_CHECK_CAST_JUMBO.S53 move a1,rBIX # r1<- desired class
H A DOP_FILLED_NEW_ARRAY_JUMBO.S14 FETCH(a1, 2) # r1<- AAAA (hi)
H A DOP_INSTANCE_OF_JUMBO.S24 FETCH(a1, 1) # r1<- aaaa (lo)
41 * r1 holds class resolved from AAAAAAAA
/dalvik/vm/compiler/codegen/arm/armv7-a-neon/
H A DMethodCodegenDriver.cpp44 int newStackSave = r1;
262 opImm(cUnit, kOpPush, (1 << r0 | 1 << r1 | 1 << r5FP | 1 << r14lr));
267 /* No need to pop r0 and r1 */
/dalvik/vm/compiler/codegen/x86/libenc/
H A Denc_defs.h778 inline bool equals(RegName r0, RegName r1) argument
780 return getRegKind(r0) == getRegKind(r1) &&
781 getRegIndex(r0) == getRegIndex(r1);
/dalvik/vm/mterp/out/
H A DInterpC-armv5te-vfp.cpp1187 void dvmMterpDumpArmRegs(uint32_t r0, uint32_t r1, uint32_t r2, uint32_t r3) argument
1201 printf("REGS: r0=%08x r1=%08x r2=%08x r3=%08x\n", r0, r1, r2, r3);
H A DInterpC-armv5te.cpp1187 void dvmMterpDumpArmRegs(uint32_t r0, uint32_t r1, uint32_t r2, uint32_t r3) argument
1201 printf("REGS: r0=%08x r1=%08x r2=%08x r3=%08x\n", r0, r1, r2, r3);
H A DInterpC-armv7-a-neon.cpp1187 void dvmMterpDumpArmRegs(uint32_t r0, uint32_t r1, uint32_t r2, uint32_t r3) argument
1201 printf("REGS: r0=%08x r1=%08x r2=%08x r3=%08x\n", r0, r1, r2, r3);
H A DInterpC-armv7-a.cpp1187 void dvmMterpDumpArmRegs(uint32_t r0, uint32_t r1, uint32_t r2, uint32_t r3) argument
1201 printf("REGS: r0=%08x r1=%08x r2=%08x r3=%08x\n", r0, r1, r2, r3);

Completed in 317 milliseconds

12345678