Searched refs:rFP (Results 151 - 165 of 165) sorted by relevance
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| /dalvik/vm/compiler/template/out/ |
| H A D | CompilerTemplateAsm-mips.S | 46 s1 rFP interpreted frame pointer, used for accessing locals and args
120 #define rFP s1 define
153 #define LOAD_FP_FROM_SELF() lw rFP, offThread_curFrame(rSELF)
154 #define SAVE_FP_TO_SELF() sw rFP, offThread_curFrame(rSELF)
157 sw rPC, (offStackSaveArea_currentPc - sizeofStackSaveArea)(rFP)
197 #define GET_VREG(rd, rix) LOAD_eas2(rd,rFP,rix)
199 #define GET_VREG_F(rd, rix) EAS2(AT, rFP, rix); \
202 #define SET_VREG(rd, rix) STORE_eas2(rd, rFP, rix)
208 addu t8, t8, rFP; \
213 #define SET_VREG_F(rd, rix) EAS2(AT, rFP, ri
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| /dalvik/vm/compiler/template/armv5te/ |
| H A D | footer.S | 53 str rFP, [rSELF, #offThread_curFrame] @ curFrame = fp
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| /dalvik/vm/compiler/template/mips/ |
| H A D | footer.S | 68 sw rFP, offThread_curFrame(rSELF) # self->curFrame = fp
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| /dalvik/vm/compiler/codegen/mips/FP/ |
| H A D | MipsFP.cpp | 40 opRegRegImm(cUnit, kOpAdd, rDest, rFP,
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| /dalvik/vm/compiler/codegen/mips/Mips32/ |
| H A D | Gen.cpp | 225 newLIR3(cUnit, kMipsAddiu, rAddr, rFP, -(sizeof(StackSaveArea) - offset));
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| H A D | Factory.cpp | 685 if (rBase == rFP) {
793 if (rBase == rFP) {
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| /dalvik/vm/compiler/codegen/mips/ |
| H A D | MipsLIR.h | 31 * s0 (rFP) is reserved [holds Dalvik frame pointer]
241 * rPC, rFP, and rSELF are for architecture-independent code to use.
340 #define rFP r_S1 macro
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| H A D | RallocUtil.cpp | 120 dvmCompilerFlushRegWideImpl(cUnit, rFP,
131 dvmCompilerFlushRegImpl(cUnit, rFP,
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| H A D | CodegenDriver.cpp | 1044 opRegRegImm(cUnit, kOpSub, r_S4, rFP,
1073 * r4PC : &rFP[vC]
1076 opRegRegImm(cUnit, kOpAdd, r4PC, rFP, srcOffset);
1085 opRegRegImm(cUnit, kOpSub, r_S4, rFP,
1101 * first. Pushing r_S1 (rFP) is just for stack alignment purposes.
1109 loadConstant(cUnit, rFP, ((numArgs - 4) >> 2) << 2);
1121 opRegImm(cUnit, kOpSub, rFP, 4);
1122 genConditionalBranchMips(cUnit, kMipsBne, rFP, r_ZERO, loopLabel);
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| /dalvik/vm/compiler/codegen/ |
| H A D | RallocUtil.cpp | 118 dvmCompilerFlushRegWideImpl(cUnit, rFP,
129 dvmCompilerFlushRegImpl(cUnit, rFP,
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| /dalvik/vm/mterp/out/ |
| H A D | InterpC-armv5te-vfp.cpp | 1192 register uint32_t rFP asm("r5");
1202 printf(" : rPC=%08x rFP=%08x rSELF=%08x rINST=%08x\n",
1203 rPC, rFP, rSELF, rINST);
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| H A D | InterpC-armv5te.cpp | 1192 register uint32_t rFP asm("r5");
1202 printf(" : rPC=%08x rFP=%08x rSELF=%08x rINST=%08x\n",
1203 rPC, rFP, rSELF, rINST);
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| H A D | InterpC-armv7-a-neon.cpp | 1192 register uint32_t rFP asm("r5");
1202 printf(" : rPC=%08x rFP=%08x rSELF=%08x rINST=%08x\n",
1203 rPC, rFP, rSELF, rINST);
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| H A D | InterpC-armv7-a.cpp | 1192 register uint32_t rFP asm("r5");
1202 printf(" : rPC=%08x rFP=%08x rSELF=%08x rINST=%08x\n",
1203 rPC, rFP, rSELF, rINST);
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| H A D | InterpC-mips.cpp | 2201 register uint32_t rFP asm("s1");
2212 printf(" : rPC=%08x rFP=%08x rSELF=%08x rIBASE=%08x\n",
2213 rPC, rFP, rSELF, rIBASE);
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Completed in 719 milliseconds
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