/external/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrInfo.h | 62 int FrameIndex,
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H A D | MSP430ISelDAGToDAG.cpp | 43 int FrameIndex; member in struct:__anon9521::MSP430ISelAddressMode::__anon9523 69 errs() << " Base.FrameIndex " << Base.FrameIndex << '\n'; 200 case ISD::FrameIndex: 204 AM.Base.FrameIndex = cast<FrameIndexSDNode>(N)->getIndex(); 262 CurDAG->getTargetFrameIndex(AM.Base.FrameIndex, TLI.getPointerTy()) : 403 case ISD::FrameIndex: {
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H A D | MSP430RegisterInfo.cpp | 177 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); 180 int FrameIndex = MI.getOperand(i).getIndex(); 183 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcRegisterInfo.cpp | 82 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); 85 int FrameIndex = MI.getOperand(i).getIndex(); 89 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
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H A D | SparcInstrInfo.cpp | 37 /// the destination along with the FrameIndex of the loaded stack slot. If 41 int &FrameIndex) const { 47 FrameIndex = MI->getOperand(1).getIndex(); 56 /// the source reg along with the FrameIndex of the loaded stack slot. If 60 int &FrameIndex) const { 66 FrameIndex = MI->getOperand(0).getIndex();
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H A D | SparcISelDAGToDAG.cpp | 115 if (Addr.getOpcode() == ISD::FrameIndex) return false;
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/external/llvm/lib/CodeGen/AsmPrinter/ |
H A D | DwarfDebug.h | 131 int FrameIndex; member in class:llvm::DbgVariable 136 FrameIndex(~0) {} 148 int getFrameIndex() const { return FrameIndex; } 149 void setFrameIndex(int FI) { FrameIndex = FI; }
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/external/llvm/lib/Target/MBlaze/ |
H A D | MBlazeInstrInfo.cpp | 40 /// the destination along with the FrameIndex of the loaded stack slot. If 44 isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const { 49 FrameIndex = MI->getOperand(1).getIndex(); 59 /// the source reg along with the FrameIndex of the loaded stack slot. If 63 isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const { 68 FrameIndex = MI->getOperand(1).getIndex();
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H A D | MBlazeISelDAGToDAG.cpp | 122 if (N.getOpcode() == ISD::FrameIndex) return false; 208 case ISD::FrameIndex: {
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreRegisterInfo.cpp | 166 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); 170 int FrameIndex = FrameOp.getIndex(); 174 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex); 182 DEBUG(errs() << "FrameIndex : " << FrameIndex << "\n");
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/external/llvm/lib/Target/CellSPU/ |
H A D | SPUInstrInfo.cpp | 73 int &FrameIndex) const { 88 FrameIndex = MOp2.getIndex(); 99 int &FrameIndex) const { 115 FrameIndex = MOp2.getIndex();
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H A D | SPURegisterInfo.cpp | 267 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); 271 int FrameIndex = SPOp.getIndex(); 274 int Offset = MFI->getObjectOffset(FrameIndex); 276 // Most instructions, except for generated FrameIndex additions using AIr32 290 // Replace the FrameIndex with base register with $sp (aka $r1)
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCRegisterInfo.cpp | 396 unsigned FrameIndex, int SPAdj, 432 FrameIndex); 439 unsigned FrameIndex, int SPAdj, 461 Reg), FrameIndex); local 501 "Instr doesn't have FrameIndex operand!"); 509 int FrameIndex = MI.getOperand(FIOperandNo).getIndex(); local 519 if (FPSI && FrameIndex == FPSI && 528 lowerCRSpilling(II, FrameIndex, SPAdj, RS); 531 lowerCRRestore(II, FrameIndex, SPAdj, RS); 536 // Replace the FrameIndex wit 395 lowerCRSpilling(MachineBasicBlock::iterator II, unsigned FrameIndex, int SPAdj, RegScavenger *RS) const argument 438 lowerCRRestore(MachineBasicBlock::iterator II, unsigned FrameIndex, int SPAdj, RegScavenger *RS) const argument [all...] |
H A D | PPCInstrInfo.cpp | 101 int &FrameIndex) const { 110 FrameIndex = MI->getOperand(2).getIndex(); 119 int &FrameIndex) const { 128 FrameIndex = MI->getOperand(2).getIndex();
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/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXRegisterInfo.cpp | 289 "Instr doesn't have FrameIndex operand!"); 292 int FrameIndex = MI.getOperand(i).getIndex(); 295 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
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/external/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 62 GlobalAddress, GlobalTLSAddress, FrameIndex, enumerator in enum:llvm::ISD::NodeType
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/external/llvm/lib/CodeGen/ |
H A D | TargetInstrInfoImpl.cpp | 188 int &FrameIndex) const { 196 FrameIndex = Value->getFrameIndex(); 206 int &FrameIndex) const { 214 FrameIndex = Value->getFrameIndex();
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/external/llvm/lib/Target/Mips/ |
H A D | MipsSEInstrInfo.cpp | 38 /// the destination along with the FrameIndex of the loaded stack slot. If 42 isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const 53 FrameIndex = MI->getOperand(1).getIndex(); 63 /// the source reg along with the FrameIndex of the loaded stack slot. If 67 isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const 78 FrameIndex = MI->getOperand(1).getIndex();
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/external/llvm/lib/Target/ARM/ |
H A D | Thumb1RegisterInfo.cpp | 427 // Replace the FrameIndex with sp / fp 499 // Replace the FrameIndex with the frame register (e.g., sp). 539 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); 609 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); 613 int FrameIndex = MI.getOperand(i).getIndex(); 614 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) + 617 if (AFI->isGPRCalleeSavedArea1Frame(FrameIndex)) 619 else if (AFI->isGPRCalleeSavedArea2Frame(FrameIndex)) 638 if (RS && FrameReg == ARM::SP && FrameIndex == RS->getScavengingFrameIndex()){
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H A D | ARMBaseInstrInfo.cpp | 875 int &FrameIndex) const { 885 FrameIndex = MI->getOperand(1).getIndex(); 897 FrameIndex = MI->getOperand(1).getIndex(); 906 FrameIndex = MI->getOperand(0).getIndex(); 913 FrameIndex = MI->getOperand(1).getIndex(); 923 int &FrameIndex) const { 925 return MI->mayStore() && hasStoreToStackSlot(MI, Dummy, FrameIndex); 1045 int &FrameIndex) const { 1055 FrameIndex = MI->getOperand(1).getIndex(); 1067 FrameIndex [all...] |
H A D | ARMISelDAGToDAG.cpp | 444 if (N.getOpcode() == ISD::FrameIndex) { 469 if (Base.getOpcode() == ISD::FrameIndex) { 614 if (N.getOpcode() == ISD::FrameIndex) { 635 if (Base.getOpcode() == ISD::FrameIndex) { 811 if (N.getOpcode() == ISD::FrameIndex) { 825 if (Base.getOpcode() == ISD::FrameIndex) { 870 if (N.getOpcode() == ISD::FrameIndex) { 888 if (Base.getOpcode() == ISD::FrameIndex) { 1112 if (N.getOpcode() == ISD::FrameIndex) { 1123 if (N.getOperand(0).getOpcode() == ISD::FrameIndex || [all...] |
H A D | ARMBaseRegisterInfo.cpp | 859 assert(i < MI->getNumOperands() &&"Instr doesn't have FrameIndex operand!"); 980 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); 1001 assert(i < MI->getNumOperands() &&"Instr doesn't have FrameIndex operand!"); 1076 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); 1079 int FrameIndex = MI.getOperand(i).getIndex(); 1082 int Offset = TFI->ResolveFrameIndexReference(MF, FrameIndex, FrameReg, SPAdj); 1089 if (RS && FrameReg == ARM::SP && FrameIndex == RS->getScavengingFrameIndex()){
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/external/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.cpp | 535 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); 538 int FrameIndex = MI.getOperand(i).getIndex(); 544 BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister()); 546 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr); 553 // FrameIndex with base register with EBP. Add an offset to the offset. 561 FIOffset = MFI->getObjectOffset(FrameIndex) - TFI->getOffsetOfLocalArea(); 563 FIOffset = TFI->getFrameIndexOffset(MF, FrameIndex);
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H A D | X86InstrInfo.cpp | 1383 /// isFrameOperand - Return true and the FrameIndex if the specified 1386 int &FrameIndex) const { 1392 FrameIndex = MI->getOperand(Op).getIndex(); 1456 int &FrameIndex) const { 1458 if (MI->getOperand(0).getSubReg() == 0 && isFrameOperand(MI, 1, FrameIndex)) 1464 int &FrameIndex) const { 1467 if ((Reg = isLoadFromStackSlot(MI, FrameIndex))) 1471 return hasLoadFromStackSlot(MI, Dummy, FrameIndex); 1477 int &FrameIndex) const { 1480 isFrameOperand(MI, 0, FrameIndex)) [all...] |
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 147 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); 150 int FrameIndex = MI.getOperand(i).getIndex(); 154 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
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