Searched refs:regs (Results 101 - 125 of 214) sorted by relevance

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/external/qemu/target-arm/
H A Dneon_helper.c1842 uint64_t zm0 = float64_val(env->vfp.regs[rm]);
1843 uint64_t zm1 = float64_val(env->vfp.regs[rm + 1]);
1844 uint64_t zd0 = float64_val(env->vfp.regs[rd]);
1845 uint64_t zd1 = float64_val(env->vfp.regs[rd + 1]);
1862 env->vfp.regs[rm] = make_float64(m0);
1863 env->vfp.regs[rm + 1] = make_float64(m1);
1864 env->vfp.regs[rd] = make_float64(d0);
1865 env->vfp.regs[rd + 1] = make_float64(d1);
1870 uint64_t zm0 = float64_val(env->vfp.regs[rm]);
1871 uint64_t zm1 = float64_val(env->vfp.regs[r
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H A Dop_helper.c39 table = (uint64_t *)&env->vfp.regs[rn];
311 val = env->regs[regno];
326 env->regs[regno] = val;
518 uint32_t addr = env->regs[rn];
525 addr = env->regs[rn] + (1 << size) * reg;
527 addr = env->regs[rn] + (1 << size);
532 env->vfp.regs[rd] = make_float64(LDQ(addr));
534 STQ(addr, float64_val(env->vfp.regs[rd]));
544 env->vfp.regs[rd] = make_float64(tmp64);
546 tmp64 = float64_val(env->vfp.regs[r
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H A Dmachine.c10 qemu_put_be32(f, env->regs[i]);
67 u.d = env->vfp.regs[i];
82 u.d = env->vfp.regs[i];
91 qemu_put_be64(f, env->iwmmxt.regs[i]);
123 env->regs[i] = qemu_get_be32(f);
185 env->vfp.regs[i] = u.d;
200 env->vfp.regs[i] = u.d;
207 env->iwmmxt.regs[i] = qemu_get_be64(f);
H A Dhelper.c303 env->regs[13] = ldl_p(rom);
306 env->regs[15] = pc & ~1;
330 stfq_le_p(buf, env->vfp.regs[reg]);
334 /* Aliases for Q regs. */
337 stfq_le_p(buf, env->vfp.regs[(reg - 32) * 2]);
338 stfq_le_p(buf + 8, env->vfp.regs[(reg - 32) * 2 + 1]);
356 env->vfp.regs[reg] = ldfq_le_p(buf);
362 env->vfp.regs[(reg - 32) * 2] = ldfq_le_p(buf);
363 env->vfp.regs[(reg - 32) * 2 + 1] = ldfq_le_p(buf + 8);
673 memcpy (env->fiq_regs, env->regs
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/external/valgrind/main/coregrind/m_gdbserver/
H A Dregcache.c142 void set_register_cache (struct reg *regs, int n) argument
146 reg_defs = regs;
151 regs[i].offset = offset;
152 offset += regs[i].size;
H A Dvalgrind-low-s390x.c39 struct reg regs[] = { variable in typeref:struct:reg
93 #define num_regs (sizeof (regs) / sizeof (regs[0]))
131 // numbers here have to match the order of regs above
190 regs,
191 17, //sp = r15, which is register offset 17 in regs
203 set_register_cache (regs, num_regs);
H A Dvalgrind-low-x86.c45 static struct reg regs[] = { variable in typeref:struct:reg
92 #define num_regs (sizeof (regs) / sizeof (regs[0]))
130 // numbers here have to match the order of regs above
257 regs,
274 set_register_cache (regs, num_regs);
H A Dvalgrind-low-amd64.c44 struct reg regs[] = { variable in typeref:struct:reg
107 #define num_regs (sizeof (regs) / sizeof (regs[0]))
145 // numbers here have to match the order of regs above.
287 regs,
304 set_register_cache (regs, num_regs);
/external/quake/quake/src/WinQuake/
H A Din_dos.cpp139 regs.x.ax = 0;
141 mouse_avail = regs.x.ax;
148 mouse_buttons = regs.x.bx;
203 regs.x.ax = 3; // read buttons
205 mouse_buttonstate = regs.x.bx;
283 regs.x.ax = 11; // read move
285 mx = (short)regs.x.cx;
286 my = (short)regs.x.dx;
H A Ddosisms.h97 extern regs_t regs;
/external/dexmaker/src/dx/java/com/android/dx/dex/code/
H A DRopTranslator.java469 RegisterSpecList regs = insn.getSources();
472 && (regs.size() == 2)
473 && (resultReg.getReg() == regs.get(1).getReg())) {
482 regs = RegisterSpecList.make(regs.get(1), regs.get(0));
486 return regs;
489 return regs.withFirst(resultReg);
608 RegisterSpecList regs = getRegs(insn);
609 di = new CstInsn(opcode, pos, regs, ins
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/external/valgrind/main/coregrind/
H A Dm_machine.c44 #define INSTR_PTR(regs) ((regs).vex.VG_INSTR_PTR)
45 #define STACK_PTR(regs) ((regs).vex.VG_STACK_PTR)
46 #define FRAME_PTR(regs) ((regs).vex.VG_FRAME_PTR)
65 void VG_(get_UnwindStartRegs) ( /*OUT*/UnwindStartRegs* regs, argument
69 regs->r_pc = (ULong)VG_(threads)[tid].arch.vex.guest_EIP;
70 regs->r_sp = (ULong)VG_(threads)[tid].arch.vex.guest_ESP;
71 regs
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/external/kernel-headers/original/asm-x86/
H A Dprocessor_32.h398 #define start_thread(regs, new_eip, new_esp) do { \
400 regs->xfs = 0; \
402 regs->xds = __USER_DS; \
403 regs->xes = __USER_DS; \
404 regs->xss = __USER_DS; \
405 regs->xcs = __USER_CS; \
406 regs->eip = new_eip; \
407 regs->esp = new_esp; \
426 void show_trace(struct task_struct *task, struct pt_regs *regs, unsigned long *stack);
H A Dsignal.h248 #define ptrace_signal_deliver(regs, cookie) \
252 (regs)->eflags &= ~TF_MASK; \
260 #define ptrace_signal_deliver(regs, cookie) do { } while (0)
H A Duser32.h45 struct user_regs_struct32 regs; /* Where the registers are actually stored */ member in struct:user32
H A Duser_32.h93 struct user_regs_struct regs; /* Where the registers are actually stored */ member in struct:user
/external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/org.eclipse.build.tools/scripts_cvs/searchcvs/
H A Dparsecvs.php67 preg_match_all("/^(RCS file:.+?^={77}$)/sm", $file, $regs) or die("Couldn't find any cvs logs!\n");
68 foreach ($regs[0] as $z)
139 return "('$str', " . (preg_match("/^build_(\d{12})$/", $str, $regs) ? "STR_TO_DATE('$regs[1]', '%Y%m%d%k%i')" : "NULL") . ")";
148 function extract_bugs($regs)
150 foreach ($regs as $z)
/external/qemu/distrib/sdl-1.2.15/src/video/riscos/
H A DSDL_riscosvideo.c164 _kernel_swi_regs regs; local
177 regs.r[0] = (int)vars;
178 regs.r[1] = (int)vals;
180 _kernel_swi(OS_ReadVduVariables, &regs, &regs);
/external/strace/
H A Dutil.c1145 struct pt_regs regs;
1146 if (ptrace(PTRACE_GETREGS,tcp->pid,(char *)&regs,0) < 0) {
1151 tprintf("[%08lx] ", regs.tpc);
1153 tprintf("[%08lx] ", regs.pc);
1231 struct regs regs; local
1233 if (ptrace(PTRACE_GETREGS, tcp->pid, (char *) &regs, 0) < 0) {
1238 tprintf("[%08x] ", regs.r_o7);
1247 struct reg regs; local
1248 pread(tcp->pfd_reg, &regs, sizeo
1587 struct regs regs; local
1644 struct regs regs; local
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H A Dprocess.c722 struct pt_regs regs;
723 if (ptrace(PTRACE_GETREGS, tcp->pid, (char*)&regs, 0)<0)
725 regs.u_regs[U_REG_G1] = new;
726 if (ptrace(PTRACE_SETREGS, tcp->pid, (char*)&regs, 0)<0)
2918 { uoff(regs), "offsetof(struct user, regs)" },
2921 { uoff(regs.ARM_r0), "r0" },
2922 { uoff(regs.ARM_r1), "r1" },
2923 { uoff(regs.ARM_r2), "r2" },
2924 { uoff(regs
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/external/oprofile/module/x86/
H A Dop_model_athlon.c87 struct pt_regs * const regs)
95 op_do_profile(cpu, instruction_pointer(regs), IRQ_ENABLED(regs), i);
85 athlon_check_ctrs(uint const cpu, struct op_msrs const * const msrs, struct pt_regs * const regs) argument
H A Dop_model_ppro.c83 struct pt_regs * const regs)
90 op_do_profile(cpu, instruction_pointer(regs), IRQ_ENABLED(regs), i);
81 ppro_check_ctrs(uint const cpu, struct op_msrs const * const msrs, struct pt_regs * const regs) argument
/external/kernel-headers/original/asm-mips/
H A Dprocessor.h221 extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp);
228 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[29])
H A Dsignal.h143 #define ptrace_signal_deliver(regs, cookie) do { } while (0)
/external/linux-tools-perf/arch/powerpc/util/
H A Ddwarf-regs.c13 #include <dwarf-regs.h>

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