/external/kernel-headers/original/linux/ |
H A D | signal.h | 242 extern int get_signal_to_deliver(siginfo_t *info, struct k_sigaction *return_ka, struct pt_regs *regs, void *cookie);
|
H A D | pnp.h | 202 unsigned short regs; /* ISAPnP: supported registers */ member in struct:pnp_dev
|
/external/qemu/android/config/linux-x86/asm/ |
H A D | kvm.h | 96 char regs[KVM_APIC_REG_SIZE]; member in struct:kvm_lapic_state
|
/external/qemu/android/config/linux-x86_64/asm/ |
H A D | kvm.h | 96 char regs[KVM_APIC_REG_SIZE]; member in struct:kvm_lapic_state
|
/external/qemu/hw/ |
H A D | arm_boot.c | 233 env->regs[15] = entry & 0xfffffffe;
|
/external/qemu/tcg/hppa/ |
H A D | tcg-target.c | 193 tcg_regset_set32(ct->u.regs, 0, 0xffffffff); 197 tcg_regset_set32(ct->u.regs, 0, 0xffffffff); 198 tcg_regset_reset_reg(ct->u.regs, TCG_REG_R26); 199 tcg_regset_reset_reg(ct->u.regs, TCG_REG_R25); 200 tcg_regset_reset_reg(ct->u.regs, TCG_REG_R24); 201 tcg_regset_reset_reg(ct->u.regs, TCG_REG_R23);
|
/external/valgrind/main/coregrind/m_debuginfo/ |
H A D | priv_d3basics.h | 635 /* Evaluate a guarded expression. If regs is NULL, then gx is assumed 638 to True (iow, gx is a single unconditional expression). If regs is 648 RegSummary* regs, const DebugInfo* di ); 651 single standard DWARF3 expression. Conventions w.r.t regs and fbGX 658 GExpr* fbGX, RegSummary* regs,
|
/external/kernel-headers/original/asm-arm/ |
H A D | uaccess.h | 41 extern int fixup_exception(struct pt_regs *regs);
|
/external/kernel-headers/original/asm-x86/ |
H A D | uaccess_32.h | 103 extern int fixup_exception(struct pt_regs *regs);
|
H A D | voyager.h | 450 struct voyager_psi_regs regs; member in struct:voyager_psi
|
/external/libffi/src/powerpc/ |
H A D | linux64_closure.S | 46 # save general regs into parm save area
|
/external/llvm/test/MC/ARM/ |
H A D | thumb-diagnostics.s | 14 @ Instructions which require v6+ for both registers to be low regs.
|
/external/valgrind/main/coregrind/m_scheduler/ |
H A D | scheduler.c | 676 /* x86/amd64 XMM regs must form an array, ie, have no 681 == (17/*#regs*/-1) * 16/*bytes per reg*/ 686 /* ppc guest_state vector regs must be 16 byte aligned for 698 /* arm guest_state VFP regs must be 8 byte aligned for 1400 #define CLREQ_ARGS(regs) ((regs).vex.VG_CLREQ_ARGS) 1401 #define CLREQ_RET(regs) ((regs).vex.VG_CLREQ_RET)
|
/external/linux-tools-perf/util/ |
H A D | probe-finder.c | 36 #include <dwarf-regs.h> 39 #include "include/dwarf-regs.h" 819 const char *regs; local 878 regs = get_arch_regstr(regn); 879 if (!regs) { 886 tvar->value = strdup(regs);
|
/external/qemu/tcg/sparc/ |
H A D | tcg-target.c | 147 tcg_regset_set32(ct->u.regs, 0, 0xffffffff); 151 tcg_regset_set32(ct->u.regs, 0, 0xffffffff); 153 tcg_regset_reset_reg(ct->u.regs, TCG_REG_O0); 154 tcg_regset_reset_reg(ct->u.regs, TCG_REG_O1); 155 tcg_regset_reset_reg(ct->u.regs, TCG_REG_O2);
|
/external/v8/src/mips/ |
H A D | macro-assembler-mips.cc | 800 void MacroAssembler::MultiPush(RegList regs) { argument 801 int16_t num_to_push = NumberOfBitsSet(regs); 806 if ((regs & (1 << i)) != 0) { 814 void MacroAssembler::MultiPushReversed(RegList regs) { argument 815 int16_t num_to_push = NumberOfBitsSet(regs); 820 if ((regs & (1 << i)) != 0) { 828 void MacroAssembler::MultiPop(RegList regs) { argument 832 if ((regs & (1 << i)) != 0) { 841 void MacroAssembler::MultiPopReversed(RegList regs) { argument 845 if ((regs 854 MultiPushFPU(RegList regs) argument 869 MultiPushReversedFPU(RegList regs) argument 884 MultiPopFPU(RegList regs) argument 898 MultiPopReversedFPU(RegList regs) argument [all...] |
/external/elfutils/src/ |
H A D | readelf.c | 5915 struct register_info regs[maxnreg]; local 5916 memset (regs, 0, sizeof regs); 5928 struct register_info *info = ®s[reg]; 5944 qsort (regs, maxreg + 1, sizeof regs[0], &compare_registers); 5950 return (a < ®s[maxnreg] && a->regloc != NULL 5951 && b < ®s[maxnreg] && b->regloc != NULL 5956 sets[0] = ®s[0]; 5959 if (regs[ [all...] |
/external/kernel-headers/original/asm-mips/ |
H A D | uaccess.h | 850 extern int fixup_exception(struct pt_regs *regs);
|
/external/llvm/lib/CodeGen/ |
H A D | RegAllocGreedy.cpp | 1055 DebugVars->splitRegister(Reg, LREdit.regs()); 1256 DebugVars->splitRegister(Reg, LREdit.regs()); 1323 DebugVars->splitRegister(VirtReg.reg, LREdit.regs()); 1613 DebugVars->splitRegister(VirtReg.reg, LREdit.regs());
|
/external/qemu/tcg/ |
H A D | tcg.h | 191 #define TCG_CALL_TYPE_REGPARM_2 0x0002 /* i386 style regparm call (2 regs) */ 192 #define TCG_CALL_TYPE_REGPARM 0x0003 /* i386 style regparm call (3 regs) */ 423 TCGRegSet regs; member in union:TCGArgConstraint::__anon11779
|
/external/valgrind/main/include/vki/ |
H A D | vki-ppc32-linux.h | 285 struct vki_pt_regs *regs; member in struct:vki_sigcontext
|
H A D | vki-ppc64-linux.h | 312 struct vki_pt_regs __user *regs; member in struct:vki_sigcontext
|
H A D | vki-s390x-linux.h | 125 _vki_s390_regs_common regs; member in struct:__anon14616
|
/external/libvpx/vp8/common/arm/armv6/ |
H A D | loopfilter_v6.asm | 632 ; transpose uses 8 regs(r6 - r12 and lr). Need to save reg value now 717 ; Transpose needs 8 regs(r6 - r12, and lr). Save r6 and lr first 901 ; transpose uses 8 regs(r6 - r12 and lr). Need to save reg value now 975 ; Transpose needs 8 regs(r6 - r12, and lr). Save r6 and lr first
|
/external/zlib/src/contrib/masmx64/ |
H A D | inffasx64.asm | 42 mov [rax+8], rbp ; /* save regs rbp and rsp */
|