/external/linux-tools-perf/arch/sh/ |
H A D | Makefile | 3 LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o
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/external/linux-tools-perf/arch/sparc/ |
H A D | Makefile | 3 LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o
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/external/linux-tools-perf/arch/x86/ |
H A D | Makefile | 3 LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o
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/external/qemu/distrib/sdl-1.2.15/src/video/riscos/ |
H A D | SDL_riscosFullScreenVideo.c | 99 _kernel_swi_regs regs; local 149 regs.r[0] = -1; /* -1 for current screen mode */ 152 regs.r[1] = 6; // Screen Width in bytes 153 _kernel_swi(OS_ReadModeVariable, ®s, ®s); 155 current->pitch = regs.r[2]; 159 regs.r[0] = 2; /* Screen area */ 160 _kernel_swi(OS_ReadDynamicArea, ®s, ®s); 163 regs 295 _kernel_swi_regs regs; local 362 _kernel_swi_regs regs; local 486 _kernel_swi_regs regs; local 535 _kernel_swi_regs regs; local 621 _kernel_swi_regs regs; local 629 _kernel_swi_regs regs; local 639 _kernel_swi_regs regs; local 650 _kernel_swi_regs regs; local 672 _kernel_swi_regs regs; local 727 _kernel_swi_regs regs; local [all...] |
H A D | SDL_wimpvideo.c | 201 _kernel_swi_regs regs; local 212 regs.r[0] = (int)vars; 213 regs.r[1] = (int)vals; 214 _kernel_swi(OS_ReadVduVariables, ®s, ®s); 249 _kernel_swi_regs regs; local 293 regs.r[1] = (unsigned int)(window_block); 296 if (_kernel_swi(Wimp_CreateWindow, ®s, ®s) == NULL) 298 this->hidden->window_handle = window_data[0] = regs 318 _kernel_swi_regs regs; local 327 _kernel_swi_regs regs; local 386 _kernel_swi_regs regs; local 428 _kernel_swi_regs regs; local [all...] |
H A D | SDL_riscosmouse.c | 192 _kernel_swi_regs regs; local 199 regs.r[0] = (int)eig_block; 200 regs.r[1] = (int)eig_block; 201 _kernel_swi(OS_ReadVduVariables, ®s, ®s); 227 _kernel_swi_regs regs; local 233 regs.r[1] = (unsigned int)window_state; 234 _kernel_swi(Wimp_GetWindowState, ®s, ®s); 245 regs 264 _kernel_swi_regs regs; local 312 _kernel_swi_regs regs; local [all...] |
/external/kernel-headers/original/asm-mips/ |
H A D | elf.h | 319 extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs); 323 #define ELF_CORE_COPY_REGS(elf_regs, regs) \ 324 elf_dump_regs((elf_greg_t *)&(elf_regs), regs); 352 _r->regs[1] = _r->regs[2] = _r->regs[3] = _r->regs[4] = 0; \ 353 _r->regs[5] = _r->regs[6] = _r->regs[ [all...] |
/external/dexmaker/src/dx/java/com/android/dx/dex/code/form/ |
H A D | Form21c.java | 51 RegisterSpecList regs = insn.getRegisters(); 52 return regs.get(0).regString() + ", " + cstString(insn); 78 RegisterSpecList regs = insn.getRegisters(); 81 switch (regs.size()) { 83 reg = regs.get(0); 91 reg = regs.get(0); 92 if (reg.getReg() != regs.get(1).getReg()) { 122 RegisterSpecList regs = insn.getRegisters(); 123 int sz = regs.size(); 125 boolean compat = unsignedFitsInByte(regs [all...] |
H A D | Form31c.java | 51 RegisterSpecList regs = insn.getRegisters(); 52 return regs.get(0).regString() + ", " + cstString(insn); 78 RegisterSpecList regs = insn.getRegisters(); 81 switch (regs.size()) { 83 reg = regs.get(0); 91 reg = regs.get(0); 92 if (reg.getReg() != regs.get(1).getReg()) { 117 RegisterSpecList regs = insn.getRegisters(); 118 int sz = regs.size(); 120 boolean compat = unsignedFitsInByte(regs [all...] |
H A D | Form41c.java | 50 RegisterSpecList regs = insn.getRegisters(); 51 return regs.get(0).regString() + ", " + cstString(insn); 81 RegisterSpecList regs = insn.getRegisters(); 84 switch (regs.size()) { 86 reg = regs.get(0); 94 reg = regs.get(0); 95 if (reg.getReg() != regs.get(1).getReg()) { 119 RegisterSpecList regs = insn.getRegisters(); 120 int sz = regs.size(); 122 boolean compat = unsignedFitsInByte(regs [all...] |
H A D | Form3rc.java | 87 RegisterSpecList regs = ci.getRegisters(); 88 int sz = regs.size(); 90 return (regs.size() == 0) || 91 (isRegListSequential(regs) && 92 unsignedFitsInShort(regs.get(0).getReg()) && 93 unsignedFitsInByte(regs.getWordCount())); 99 RegisterSpecList regs = insn.getRegisters(); 101 int firstReg = (regs.size() == 0) ? 0 : regs.get(0).getReg(); 102 int count = regs [all...] |
H A D | Form5rc.java | 86 RegisterSpecList regs = ci.getRegisters(); 87 int sz = regs.size(); 89 return (regs.size() == 0) || 90 (isRegListSequential(regs) && 91 unsignedFitsInShort(regs.get(0).getReg()) && 92 unsignedFitsInShort(regs.getWordCount())); 98 RegisterSpecList regs = insn.getRegisters(); 100 int firstReg = (regs.size() == 0) ? 0 : regs.get(0).getReg(); 101 int count = regs [all...] |
H A D | Form21h.java | 48 RegisterSpecList regs = insn.getRegisters(); 51 return regs.get(0).regString() + ", " + literalBitsString(value); 57 RegisterSpecList regs = insn.getRegisters(); 62 (regs.get(0).getCategory() == 1) ? 32 : 64); 74 RegisterSpecList regs = insn.getRegisters(); 76 (regs.size() == 1) && 77 unsignedFitsInByte(regs.get(0).getReg()))) { 91 if (regs.get(0).getCategory() == 1) { 103 RegisterSpecList regs = insn.getRegisters(); 106 bits.set(0, unsignedFitsInByte(regs [all...] |
H A D | Form22b.java | 48 RegisterSpecList regs = insn.getRegisters(); 51 return regs.get(0).regString() + ", " + regs.get(1).regString() + 71 RegisterSpecList regs = insn.getRegisters(); 73 (regs.size() == 2) && 74 unsignedFitsInByte(regs.get(0).getReg()) && 75 unsignedFitsInByte(regs.get(1).getReg()))) { 94 RegisterSpecList regs = insn.getRegisters(); 97 bits.set(0, unsignedFitsInByte(regs.get(0).getReg())); 98 bits.set(1, unsignedFitsInByte(regs [all...] |
H A D | Form22c.java | 49 RegisterSpecList regs = insn.getRegisters(); 50 return regs.get(0).regString() + ", " + regs.get(1).regString() + 73 RegisterSpecList regs = insn.getRegisters(); 75 (regs.size() == 2) && 76 unsignedFitsInNibble(regs.get(0).getReg()) && 77 unsignedFitsInNibble(regs.get(1).getReg()))) { 96 RegisterSpecList regs = insn.getRegisters(); 99 bits.set(0, unsignedFitsInNibble(regs.get(0).getReg())); 100 bits.set(1, unsignedFitsInNibble(regs [all...] |
H A D | Form22s.java | 48 RegisterSpecList regs = insn.getRegisters(); 51 return regs.get(0).regString() + ", " + regs.get(1).regString() 71 RegisterSpecList regs = insn.getRegisters(); 73 (regs.size() == 2) && 74 unsignedFitsInNibble(regs.get(0).getReg()) && 75 unsignedFitsInNibble(regs.get(1).getReg()))) { 94 RegisterSpecList regs = insn.getRegisters(); 97 bits.set(0, unsignedFitsInNibble(regs.get(0).getReg())); 98 bits.set(1, unsignedFitsInNibble(regs [all...] |
H A D | Form32s.java | 48 RegisterSpecList regs = insn.getRegisters(); 51 return regs.get(0).regString() + ", " + regs.get(1).regString() 75 RegisterSpecList regs = insn.getRegisters(); 77 (regs.size() == 2) && 78 unsignedFitsInByte(regs.get(0).getReg()) && 79 unsignedFitsInByte(regs.get(1).getReg()))) { 98 RegisterSpecList regs = insn.getRegisters(); 101 bits.set(0, unsignedFitsInByte(regs.get(0).getReg())); 102 bits.set(1, unsignedFitsInByte(regs [all...] |
H A D | Form52c.java | 49 RegisterSpecList regs = insn.getRegisters(); 50 return regs.get(0).regString() + ", " + regs.get(1).regString() + 77 RegisterSpecList regs = insn.getRegisters(); 79 (regs.size() == 2) && 80 unsignedFitsInShort(regs.get(0).getReg()) && 81 unsignedFitsInShort(regs.get(1).getReg()))) { 95 RegisterSpecList regs = insn.getRegisters(); 98 bits.set(0, unsignedFitsInShort(regs.get(0).getReg())); 99 bits.set(1, unsignedFitsInShort(regs [all...] |
H A D | Form21t.java | 46 RegisterSpecList regs = insn.getRegisters(); 47 return regs.get(0).regString() + ", " + branchString(insn); 65 RegisterSpecList regs = insn.getRegisters(); 68 (regs.size() == 1) && 69 unsignedFitsInByte(regs.get(0).getReg()))) { 80 RegisterSpecList regs = insn.getRegisters(); 83 bits.set(0, unsignedFitsInByte(regs.get(0).getReg())); 99 RegisterSpecList regs = insn.getRegisters(); 103 opcodeUnit(insn, regs.get(0).getReg()),
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H A D | Form31i.java | 48 RegisterSpecList regs = insn.getRegisters(); 51 return regs.get(0).regString() + ", " + literalBitsString(value); 70 RegisterSpecList regs = insn.getRegisters(); 72 (regs.size() == 1) && 73 unsignedFitsInByte(regs.get(0).getReg()))) { 90 RegisterSpecList regs = insn.getRegisters(); 93 bits.set(0, unsignedFitsInByte(regs.get(0).getReg())); 100 RegisterSpecList regs = insn.getRegisters(); 104 write(out, opcodeUnit(insn, regs.get(0).getReg()), value);
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H A D | Form31t.java | 46 RegisterSpecList regs = insn.getRegisters(); 47 return regs.get(0).regString() + ", " + branchString(insn); 65 RegisterSpecList regs = insn.getRegisters(); 68 (regs.size() == 1) && 69 unsignedFitsInByte(regs.get(0).getReg()))) { 79 RegisterSpecList regs = insn.getRegisters(); 82 bits.set(0, unsignedFitsInByte(regs.get(0).getReg())); 95 RegisterSpecList regs = insn.getRegisters(); 98 write(out, opcodeUnit(insn, regs.get(0).getReg()), offset);
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H A D | Form51l.java | 49 RegisterSpecList regs = insn.getRegisters(); 52 return regs.get(0).regString() + ", " + literalBitsString(value); 71 RegisterSpecList regs = insn.getRegisters(); 73 (regs.size() == 1) && 74 unsignedFitsInByte(regs.get(0).getReg()))) { 87 RegisterSpecList regs = insn.getRegisters(); 90 bits.set(0, unsignedFitsInByte(regs.get(0).getReg())); 97 RegisterSpecList regs = insn.getRegisters(); 101 write(out, opcodeUnit(insn, regs.get(0).getReg()), value);
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H A D | Form35c.java | 54 RegisterSpecList regs = explicitize(insn.getRegisters()); 55 return regListString(regs) + ", " + cstString(insn); 94 RegisterSpecList regs = ci.getRegisters(); 95 return (wordCount(regs) >= 0); 101 RegisterSpecList regs = insn.getRegisters(); 102 int sz = regs.size(); 106 RegisterSpec reg = regs.get(i); 124 RegisterSpecList regs = explicitize(insn.getRegisters()); 125 int sz = regs.size(); 126 int r0 = (sz > 0) ? regs 149 wordCount(RegisterSpecList regs) argument [all...] |
/external/quake/quake/src/WinQuake/ |
H A D | net_bw.cpp | 233 extern regs_t regs;
246 regs.x.ax = 0x4403;
247 regs.x.bx = s;
248 regs.x.cx = msglen;
249 regs.x.dx = lowmem_bufoff;
250 regs.x.ds = lowmem_bufseg;
252 return regs.x.ax;
282 regs.x.ax = 0x3d42;
283 regs.x.ds = lowmem_bufseg;
284 regs [all...] |
/external/valgrind/main/coregrind/ |
H A D | m_debugger.c | 52 struct vki_user_regs_struct regs; local 53 VG_(memset)(®s, 0, sizeof(regs)); 54 regs.cs = vex->guest_CS; 55 regs.ss = vex->guest_SS; 56 regs.ds = vex->guest_DS; 57 regs.es = vex->guest_ES; 58 regs.fs = vex->guest_FS; 59 regs.gs = vex->guest_GS; 60 regs [all...] |