Searched refs:FCSR (Results 1 - 4 of 4) sorted by relevance
| /external/v8/test/cctest/ |
| H A D | test-assembler-mips.cc | 1173 // Save FCSR.
1174 __ cfc1(a1, FCSR);
1176 __ ctc1(zero_reg, FCSR);
1195 __ ctc1(zero_reg, FCSR); \
1197 __ cfc1(a2, FCSR); \
1201 __ ctc1(zero_reg, FCSR); \
1203 __ cfc1(a2, FCSR); \
1207 __ ctc1(zero_reg, FCSR); \
1209 __ cfc1(a2, FCSR); \
1213 __ ctc1(zero_reg, FCSR); \
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| /external/v8/src/mips/ |
| H A D | macro-assembler-mips.cc | 1232 // For testing purposes we need to fetch content of the FCSR register and
1234 // 24. bit of the FCSR).
1235 cfc1(scratch, FCSR);
1258 // For testing purposes we need to fetch content of the FCSR register and
1260 // 24. bit of the FCSR).
1261 cfc1(scratch, FCSR);
1412 // Save FCSR.
1413 cfc1(scratch1, FCSR);
1415 ctc1(zero_reg, FCSR);
1433 // Retrieve FCSR
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| H A D | assembler-mips.h | 329 // Currently only FCSR (#31) is implemented.
350 const FPUControlRegister FCSR = { kFCSRRegister }; member in namespace:v8::internal
|
| H A D | stub-cache-mips.cc | 2068 // Backup FCSR.
2069 __ cfc1(a3, FCSR);
2070 // Clearing FCSR clears the exception mask with no side-effects.
2071 __ ctc1(zero_reg, FCSR);
2081 // Retrieve FCSR and check for fpu errors.
2082 __ cfc1(t5, FCSR);
2119 // Restore FCSR and return.
2120 __ ctc1(a3, FCSR);
2126 // Restore FCSR and fall to slow case.
2127 __ ctc1(a3, FCSR);
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