/external/libvpx/vp8/common/ |
H A D | common.h | 25 #define vp8_copy( Dest, Src) { \ 26 assert( sizeof( Dest) == sizeof( Src)); \ 27 vpx_memcpy( Dest, Src, sizeof( Src)); \ 32 #define vp8_copy_array( Dest, Src, N) { \ 33 assert( sizeof( *Dest) == sizeof( *Src)); \ 34 vpx_memcpy( Dest, Src, N * sizeof( *Src)); \
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/external/llvm/lib/CodeGen/ |
H A D | MachineBranchProbabilityInfo.cpp | 64 getEdgeWeight(const MachineBasicBlock *Src, argument 66 uint32_t Weight = Src->getSuccWeight(Dst); 73 getEdgeWeight(const MachineBasicBlock *Src, argument 77 return getEdgeWeight(Src, std::find(Src->succ_begin(), Src->succ_end(), Dst)); 80 bool MachineBranchProbabilityInfo::isEdgeHot(MachineBasicBlock *Src, argument 84 return getEdgeProbability(Src, Dst) > BranchProbability(4, 5); 107 MachineBranchProbabilityInfo::getEdgeProbability(MachineBasicBlock *Src, argument 110 uint32_t D = getSumForBlock(Src, Scal 117 printEdgeProbability(raw_ostream &OS, MachineBasicBlock *Src, MachineBasicBlock *Dst) const argument [all...] |
H A D | MachineCopyPropagation.cpp | 110 static bool isNopCopy(MachineInstr *CopyMI, unsigned Def, unsigned Src, argument 120 return SubIdx == TRI->getSubRegIndex(SrcDef, Src); 130 SourceMap SrcMap; // Src -> Def map 139 unsigned Src = MI->getOperand(1).getReg(); local 142 TargetRegisterInfo::isVirtualRegister(Src)) 146 DenseMap<unsigned, MachineInstr*>::iterator CI = AvailCopyMap.find(Src); 150 (!ReservedRegs.test(Src) || NoInterveningSideEffect(CopyMI, MI)) && 151 isNopCopy(CopyMI, Def, Src, TRI)) { 178 // If Src is defined by a previous copy, it cannot be eliminated. 179 for (MCRegAliasIterator AI(Src, TR [all...] |
/external/llvm/include/llvm/CodeGen/ |
H A D | MachineBranchProbabilityInfo.h | 50 uint32_t getEdgeWeight(const MachineBasicBlock *Src, 53 // Same thing, but using a const_succ_iterator from Src. This is faster when 55 uint32_t getEdgeWeight(const MachineBasicBlock *Src, 64 bool isEdgeHot(MachineBasicBlock *Src, MachineBasicBlock *Dst) const; 74 // Src. Querying sequentially for each successor's probability is a quadratic 76 BranchProbability getEdgeProbability(MachineBasicBlock *Src, 82 raw_ostream &printEdgeProbability(raw_ostream &OS, MachineBasicBlock *Src,
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/external/llvm/include/llvm/Analysis/ |
H A D | BranchProbabilityInfo.h | 36 /// identify an edge, since we can have multiple edges from Src to Dst. 51 /// \brief Get an edge's probability, relative to other out-edges of the Src. 55 /// leaving the 'Src' block. The returned probability is never zero, and can 57 BranchProbability getEdgeProbability(const BasicBlock *Src, 60 /// \brief Get the probability of going from Src to Dst. 62 /// It returns the sum of all probabilities for edges from Src to Dst. 63 BranchProbability getEdgeProbability(const BasicBlock *Src, 66 /// \brief Test if an edge is hot relative to other out-edges of the Src. 70 bool isEdgeHot(const BasicBlock *Src, const BasicBlock *Dst) const; 83 raw_ostream &printEdgeProbability(raw_ostream &OS, const BasicBlock *Src, [all...] |
/external/llvm/include/llvm-c/ |
H A D | Linker.h | 35 LLVMBool LLVMLinkModules(LLVMModuleRef Dest, LLVMModuleRef Src,
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonPeephole.cpp | 97 void ChangeOpInto(MachineOperand &Dst, MachineOperand &Src); 132 MachineOperand &Src = MI->getOperand(1); local 134 unsigned SrcReg = Src.getReg(); 168 MachineOperand &Src = MI->getOperand(1); local 170 unsigned SrcReg = Src.getReg(); 186 MachineOperand &Src = MI->getOperand(1); local 189 if (Src.getSubReg() != Hexagon::subreg_loreg) 193 unsigned SrcReg = Src.getReg(); 290 void HexagonPeephole::ChangeOpInto(MachineOperand &Dst, MachineOperand &Src) { argument 291 assert (&Dst != &Src [all...] |
H A D | HexagonSelectionDAGInfo.h | 31 SDValue Dst, SDValue Src,
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H A D | HexagonSelectionDAGInfo.cpp | 31 SDValue Dst, SDValue Src, SDValue Size, unsigned Align, 30 EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
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/external/skia/include/gpu/ |
H A D | GrTemplates.h | 18 template <typename Dst, typename Src> Dst GrTCast(Src src) { 20 Src src;
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/external/llvm/lib/CodeGen/AsmPrinter/ |
H A D | AsmPrinterDwarf.cpp | 181 const MachineLocation &Src = Move.getSource(); local 185 if (Src.getReg() == MachineLocation::VirtualFP) { 186 OutStreamer.EmitCFIDefCfaOffset(-Src.getOffset()); 189 OutStreamer.EmitCFIDefCfa(RI->getDwarfRegNum(Src.getReg(), true), 190 Src.getOffset()); 192 } else if (Src.isReg() && Src.getReg() == MachineLocation::VirtualFP) { 197 OutStreamer.EmitCFIOffset(RI->getDwarfRegNum(Src.getReg(), true),
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/external/llvm/lib/Target/X86/ |
H A D | X86SelectionDAGInfo.h | 39 SDValue Dst, SDValue Src, 47 SDValue Dst, SDValue Src,
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/external/clang/include/clang/Analysis/Analyses/ |
H A D | CFGReachabilityAnalysis.h | 40 /// Returns true if the block 'Dst' can be reached from block 'Src'. 41 bool isReachable(const CFGBlock *Src, const CFGBlock *Dst);
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/external/llvm/lib/Analysis/ |
H A D | BranchProbabilityInfo.cpp | 455 isEdgeHot(const BasicBlock *Src, const BasicBlock *Dst) const { argument 458 return getEdgeProbability(Src, Dst) > BranchProbability(4, 5); 491 getEdgeWeight(const BasicBlock *Src, unsigned IndexInSuccessors) const { argument 493 Weights.find(std::make_pair(Src, IndexInSuccessors)); 502 /// of all raw edge weights from Src to Dst. 504 getEdgeWeight(const BasicBlock *Src, const BasicBlock *Dst) const { argument 507 for (succ_const_iterator I = succ_begin(Src), E = succ_end(Src); I != E; ++I) 509 MapI = Weights.find(std::make_pair(Src, I.getSuccessorIndex())); 519 setEdgeWeight(const BasicBlock *Src, unsigne argument 529 getEdgeProbability(const BasicBlock *Src, unsigned IndexInSuccessors) const argument 539 getEdgeProbability(const BasicBlock *Src, const BasicBlock *Dst) const argument 548 printEdgeProbability(raw_ostream &OS, const BasicBlock *Src, const BasicBlock *Dst) const argument [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMSelectionDAGInfo.cpp | 31 SDValue Dst, SDValue Src, 67 DAG.getNode(ISD::ADD, dl, MVT::i32, Src, 106 DAG.getNode(ISD::ADD, dl, MVT::i32, Src, 145 SDValue Src, SDValue Size, 170 if (Src.getValueType().bitsGT(MVT::i32)) 171 Src = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 173 Src = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 176 Entry.Node = Src; 29 EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument 143 EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo) const argument [all...] |
/external/llvm/lib/VMCore/ |
H A D | IRBuilder.cpp | 82 CreateMemCpy(Value *Dst, Value *Src, Value *Size, unsigned Align, argument 85 Src = getCastedInt8PtrValue(Src); 87 Value *Ops[] = { Dst, Src, Size, getInt32(Align), getInt1(isVolatile) }; 88 Type *Tys[] = { Dst->getType(), Src->getType(), Size->getType() }; 102 CreateMemMove(Value *Dst, Value *Src, Value *Size, unsigned Align, argument 105 Src = getCastedInt8PtrValue(Src); 107 Value *Ops[] = { Dst, Src, Size, getInt32(Align), getInt1(isVolatile) }; 108 Type *Tys[] = { Dst->getType(), Src [all...] |
H A D | Globals.cpp | 49 /// create a GlobalValue) from the GlobalValue Src to this one. 50 void GlobalValue::copyAttributesFrom(const GlobalValue *Src) { argument 51 setAlignment(Src->getAlignment()); 52 setSection(Src->getSection()); 53 setVisibility(Src->getVisibility()); 54 setUnnamedAddr(Src->hasUnnamedAddr()); 176 /// create a GlobalVariable) from the GlobalVariable Src to this one. 177 void GlobalVariable::copyAttributesFrom(const GlobalValue *Src) { argument 178 assert(isa<GlobalVariable>(Src) && "Expected a GlobalVariable!"); 179 GlobalValue::copyAttributesFrom(Src); [all...] |
/external/eigen/test/ |
H A D | vectorization_logic.cpp | 31 template<typename Dst, typename Src> 32 bool test_assign(const Dst&, const Src&, int traversal, int unrolling) argument 34 internal::assign_traits<Dst,Src>::debug(); 35 bool res = internal::assign_traits<Dst,Src>::Traversal==traversal 36 && internal::assign_traits<Dst,Src>::Unrolling==unrolling; 40 << " got " << demangle_traversal(internal::assign_traits<Dst,Src>::Traversal) << "\n"; 42 << " got " << demangle_unrolling(internal::assign_traits<Dst,Src>::Unrolling) << "\n"; 47 template<typename Dst, typename Src> 50 internal::assign_traits<Dst,Src>::debug(); 51 bool res = internal::assign_traits<Dst,Src> [all...] |
/external/clang/include/clang/Analysis/Support/ |
H A D | BlkExprDeclBitVector.h | 162 struct Union { void operator()(ValTy& Dst, ValTy& Src) { Dst |= Src; } }; argument 163 struct Intersect { void operator()(ValTy& Dst, ValTy& Src) { Dst &= Src; } }; argument 301 struct Union { void operator()(ValTy& Dst, ValTy& Src) { Dst |= Src; } }; argument 302 struct Intersect { void operator()(ValTy& Dst, ValTy& Src) { Dst &= Src; } }; argument
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/external/clang/lib/Analysis/ |
H A D | CFGReachabilityAnalysis.cpp | 25 bool CFGReverseBlockReachabilityAnalysis::isReachable(const CFGBlock *Src, argument 37 return reachable[DstBlockID][Src->getBlockID()];
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/external/llvm/lib/Target/CellSPU/MCTargetDesc/ |
H A D | SPUMCTargetDesc.cpp | 59 MachineLocation Src(SPU::R1, 0); 60 MAI->addInitialFrameState(0, Dst, Src);
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCTargetDesc.cpp | 60 MachineLocation Src(Hexagon::R30, 0); 61 MAI->addInitialFrameState(0, Dst, Src);
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/external/llvm/lib/Target/XCore/MCTargetDesc/ |
H A D | XCoreMCTargetDesc.cpp | 58 MachineLocation Src(XCore::SP, 0); 59 MAI->addInitialFrameState(0, Dst, Src);
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/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCasts.cpp | 283 Value *Src = CI.getOperand(0); local 287 if (CastInst *CSrc = dyn_cast<CastInst>(Src)) { // A->B->C cast 297 if (SelectInst *SI = dyn_cast<SelectInst>(Src)) 302 if (isa<PHINode>(Src)) { 305 if (!Src->getType()->isIntegerTy() || 307 ShouldChangeType(CI.getType(), Src->getType())) 436 Value *Src = CI.getOperand(0); 437 Type *DestTy = CI.getType(), *SrcTy = Src->getType(); 444 CanEvaluateTruncated(Src, DestTy)) { 450 Value *Res = EvaluateInDifferentType(Src, DestT 1319 Value *Src = CI.getOperand(0); local 1589 Value *Src = CI.getOperand(0); local 1641 Value *Src = CI.getOperand(0); local [all...] |
/external/clang/include/clang/StaticAnalyzer/Core/ |
H A D | CheckerManager.h | 176 const ExplodedNodeSet &Src, 179 runCheckersForStmt(/*isPreVisit=*/true, Dst, Src, S, Eng); 189 const ExplodedNodeSet &Src, 193 runCheckersForStmt(/*isPreVisit=*/false, Dst, Src, S, Eng, wasInlined); 198 ExplodedNodeSet &Dst, const ExplodedNodeSet &Src, 204 const ExplodedNodeSet &Src, 207 runCheckersForObjCMessage(/*isPreVisit=*/true, Dst, Src, msg, Eng); 212 const ExplodedNodeSet &Src, 216 runCheckersForObjCMessage(/*isPreVisit=*/false, Dst, Src, msg, Eng, 223 const ExplodedNodeSet &Src, 175 runCheckersForPreStmt(ExplodedNodeSet &Dst, const ExplodedNodeSet &Src, const Stmt *S, ExprEngine &Eng) argument 188 runCheckersForPostStmt(ExplodedNodeSet &Dst, const ExplodedNodeSet &Src, const Stmt *S, ExprEngine &Eng, bool wasInlined = false) argument 203 runCheckersForPreObjCMessage(ExplodedNodeSet &Dst, const ExplodedNodeSet &Src, const ObjCMethodCall &msg, ExprEngine &Eng) argument 211 runCheckersForPostObjCMessage(ExplodedNodeSet &Dst, const ExplodedNodeSet &Src, const ObjCMethodCall &msg, ExprEngine &Eng, bool wasInlined = false) argument 228 runCheckersForPreCall(ExplodedNodeSet &Dst, const ExplodedNodeSet &Src, const CallEvent &Call, ExprEngine &Eng) argument 234 runCheckersForPostCall(ExplodedNodeSet &Dst, const ExplodedNodeSet &Src, const CallEvent &Call, ExprEngine &Eng, bool wasInlined = false) argument [all...] |