/external/llvm/lib/Target/XCore/ |
H A D | XCoreSubtarget.cpp | 26 XCoreSubtarget::XCoreSubtarget(const std::string &TT, argument 28 : XCoreGenSubtargetInfo(TT, CPU, FS)
|
H A D | XCoreTargetMachine.cpp | 23 XCoreTargetMachine::XCoreTargetMachine(const Target &T, StringRef TT, argument 28 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 29 Subtarget(TT, CPU, FS),
|
/external/clang/test/SemaCXX/ |
H A D | redeclared-alias-template.cpp | 16 template<template<typename> class> struct TT; 19 TT<A> f(); // expected-note {{previous declaration is here}} 22 TT<A> f(); // expected-error {{functions that differ only in their return type cannot be overloaded}}
|
/external/llvm/lib/Target/CppBackend/TargetInfo/ |
H A D | CppBackendTargetInfo.cpp | 17 static unsigned CppBackend_TripleMatchQuality(const std::string &TT) { argument
|
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430Subtarget.cpp | 26 MSP430Subtarget::MSP430Subtarget(const std::string &TT, argument 29 MSP430GenSubtargetInfo(TT, CPU, FS) {
|
H A D | MSP430TargetMachine.cpp | 28 StringRef TT, 34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 35 Subtarget(TT, CPU, FS), 27 MSP430TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|
/external/llvm/lib/Target/Sparc/MCTargetDesc/ |
H A D | SparcMCAsmInfo.cpp | 21 SparcELFMCAsmInfo::SparcELFMCAsmInfo(const Target &T, StringRef TT) { argument 23 Triple TheTriple(TT);
|
/external/clang/test/SemaTemplate/ |
H A D | temp_class_spec_neg.cpp | 30 template<typename T, int N, template<typename X> class TT> 34 template<typename T, int N, template<typename X> class TT> 35 struct Test0<T, N, TT>; // expected-error{{does not specialize}} 40 template<typename X> class TT = ::vector> // expected-error{{default template argument}} 41 struct Test0<T*, N, TT> { };
|
H A D | issue150.cpp | 43 template<typename T, typename U = T *, typename V = U const> class TT> 45 typedef TT<Z> type; 56 template<typename T, typename U = T *, typename V = U const> class TT> 58 typedef TT<Z> type; 62 template<typename T, typename U = T *, typename V = U const> class TT> 63 struct X<int, Z, TT> { 64 typedef TT<Z> type;
|
H A D | instantiate-template-template-parm.cpp | 34 template<template<int V> class TT> // expected-note{{parameter with type 'int'}} 37 template<typename T, template<T V> class TT> 39 X1<TT> x1; // expected-error{{has different template parameters}} 48 template <typename T, template <T, T> class TT, class R = TT<1, 2> > 64 template<template<int> class TT> struct X0
|
/external/clang/test/CXX/temp/temp.decls/temp.alias/ |
H A D | p2.cpp | 30 template<template<class> class TT> 31 void f(TT<int>); // expected-note {{candidate template ignored}} 33 template<template<class,class> class TT> 34 void g(TT<int, Alloc<int>>); 38 g(v); // OK: TT = vector
|
/external/clang/test/CXX/temp/temp.param/ |
H A D | p9.cpp | 21 template<template<int> class TT = X0> // expected-error{{not permitted on a friend template}}
|
/external/llvm/lib/Target/CellSPU/MCTargetDesc/ |
H A D | SPUMCAsmInfo.h | 26 explicit SPULinuxMCAsmInfo(const Target &T, StringRef TT);
|
H A D | SPUMCTargetDesc.cpp | 41 static MCRegisterInfo *createCellSPUMCRegisterInfo(StringRef TT) { argument 47 static MCSubtargetInfo *createSPUMCSubtargetInfo(StringRef TT, StringRef CPU, argument 50 InitSPUMCSubtargetInfo(X, TT, CPU, FS); 54 static MCAsmInfo *createSPUMCAsmInfo(const Target &T, StringRef TT) { argument 55 MCAsmInfo *MAI = new SPULinuxMCAsmInfo(T, TT); 65 static MCCodeGenInfo *createSPUMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
|
/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCAsmInfo.h | 25 explicit HexagonMCAsmInfo(const Target &T, StringRef TT);
|
H A D | HexagonMCTargetDesc.cpp | 41 static MCRegisterInfo *createHexagonMCRegisterInfo(StringRef TT) { argument 47 static MCSubtargetInfo *createHexagonMCSubtargetInfo(StringRef TT, argument 51 InitHexagonMCSubtargetInfo(X, TT, CPU, FS); 55 static MCAsmInfo *createHexagonMCAsmInfo(const Target &T, StringRef TT) { argument 56 MCAsmInfo *MAI = new HexagonMCAsmInfo(T, TT); 66 static MCCodeGenInfo *createHexagonMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
|
/external/llvm/lib/Target/MSP430/MCTargetDesc/ |
H A D | MSP430MCAsmInfo.cpp | 20 MSP430MCAsmInfo::MSP430MCAsmInfo(const Target &T, StringRef TT) { argument
|
/external/llvm/lib/Target/XCore/MCTargetDesc/ |
H A D | XCoreMCAsmInfo.cpp | 16 XCoreMCAsmInfo::XCoreMCAsmInfo(const Target &T, StringRef TT) { argument
|
H A D | XCoreMCTargetDesc.cpp | 40 static MCRegisterInfo *createXCoreMCRegisterInfo(StringRef TT) { argument 46 static MCSubtargetInfo *createXCoreMCSubtargetInfo(StringRef TT, StringRef CPU, argument 49 InitXCoreMCSubtargetInfo(X, TT, CPU, FS); 53 static MCAsmInfo *createXCoreMCAsmInfo(const Target &T, StringRef TT) { argument 54 MCAsmInfo *MAI = new XCoreMCAsmInfo(T, TT); 64 static MCCodeGenInfo *createXCoreMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
|
/external/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsMCAsmInfo.cpp | 21 MipsMCAsmInfo::MipsMCAsmInfo(const Target &T, StringRef TT) { argument 22 Triple TheTriple(TT);
|
/external/llvm/lib/Target/Sparc/ |
H A D | SparcSubtarget.cpp | 26 SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &CPU, argument 28 SparcGenSubtargetInfo(TT, CPU, FS),
|
H A D | SparcTargetMachine.cpp | 28 SparcTargetMachine::SparcTargetMachine(const Target &T, StringRef TT, argument 34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 35 Subtarget(TT, CPU, FS, is64bit), 79 StringRef TT, StringRef CPU, 85 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { 91 StringRef TT, StringRef CPU, 97 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { 78 SparcV8TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 90 SparcV9TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCTargetDesc.cpp | 38 std::string ARM_MC::ParseARMTriple(StringRef TT, StringRef CPU) { argument 41 unsigned Len = TT.size(); 46 if (Len >= 5 && TT.substr(0, 4) == "armv") 48 else if (Len >= 6 && TT.substr(0, 5) == "thumb") { 50 if (Len >= 7 && TT[5] == 'v') 57 unsigned SubVer = TT[Idx]; 59 if (Len >= Idx+2 && TT[Idx+1] == 'm') { 66 } else if (Len >= Idx+3 && TT[Idx+1] == 'e'&& TT[Idx+2] == 'm') { 87 if (Len >= Idx+3 && TT[Id 116 createARMMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument 143 createARMMCAsmInfo(const Target &T, StringRef TT) argument 152 createARMMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 166 createMCStreamer(const Target &T, StringRef TT, MCContext &Ctx, MCAsmBackend &MAB, raw_ostream &OS, MCCodeEmitter *Emitter, bool RelaxAll, bool NoExecStack) argument [all...] |
H A D | ARMMCTargetDesc.h | 35 std::string ParseARMTriple(StringRef TT, StringRef CPU); 40 MCSubtargetInfo *createARMMCSubtargetInfo(StringRef TT, StringRef CPU, 49 MCAsmBackend *createARMAsmBackend(const Target &T, StringRef TT);
|
/external/llvm/lib/Target/CppBackend/ |
H A D | CPPTargetMachine.h | 25 CPPTargetMachine(const Target &T, StringRef TT, argument 29 : TargetMachine(T, TT, CPU, FS, Options) {}
|