Searched refs:VAARG (Results 1 - 15 of 15) sorted by relevance

/external/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h540 /// VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE,
543 VAARG, enumerator in enum:llvm::ISD::NodeType
/external/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp235 // VAARG always uses double-word chunks, so promote anything smaller.
236 setOperationAction(ISD::VAARG, MVT::i1, Promote);
237 AddPromotedToType (ISD::VAARG, MVT::i1, MVT::i64);
238 setOperationAction(ISD::VAARG, MVT::i8, Promote);
239 AddPromotedToType (ISD::VAARG, MVT::i8, MVT::i64);
240 setOperationAction(ISD::VAARG, MVT::i16, Promote);
241 AddPromotedToType (ISD::VAARG, MVT::i16, MVT::i64);
242 setOperationAction(ISD::VAARG, MVT::i32, Promote);
243 AddPromotedToType (ISD::VAARG, MVT::i32, MVT::i64);
244 setOperationAction(ISD::VAARG, MV
[all...]
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp259 case ISD::VAARG: return "vaarg";
H A DLegalizeFloatTypes.cpp99 case ISD::VAARG: R = SoftenFloatRes_VAARG(N); break;
846 case ISD::VAARG: ExpandRes_VAARG(N, Lo, Hi); break;
H A DLegalizeDAG.cpp1159 case ISD::VAARG:
2764 case ISD::VAARG: {
3576 case ISD::VAARG: {
3585 && "VAARG promotion is supported only for vectors or integer types");
H A DLegalizeIntegerTypes.cpp78 case ISD::VAARG: Res = PromoteIntRes_VAARG(N); break;
1096 case ISD::VAARG: ExpandRes_VAARG(N, Lo, Hi); break;
H A DSelectionDAG.cpp4511 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
/external/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp793 // VAARG needs to be lowered to not do unaligned accesses for doubles.
794 setOperationAction(ISD::VAARG , MVT::Other, Custom);
1162 case ISD::VAARG: return LowerVAARG(Op, DAG);
/external/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp143 setOperationAction(ISD::VAARG, MVT::Other, Custom);
178 case ISD::VAARG: return LowerVAARG(Op, DAG);
/external/llvm/lib/Target/MBlaze/
H A DMBlazeISelLowering.cpp155 setOperationAction(ISD::VAARG, MVT::Other, Expand);
/external/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1407 setOperationAction(ISD::VAARG , MVT::Other, Expand);
/external/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp553 setOperationAction(ISD::VAARG , MVT::Other, Custom);
556 setOperationAction(ISD::VAARG , MVT::Other, Expand);
9572 SDValue VAARG = DAG.getMemIntrinsicNode(X86ISD::VAARG_64, dl, local
9580 Chain = VAARG.getValue(1);
9585 VAARG,
11302 case ISD::VAARG: return LowerVAARG(Op, DAG);
/external/llvm/lib/Target/CellSPU/
H A DSPUISelLowering.cpp382 setOperationAction(ISD::VAARG , MVT::Other, Expand);
/external/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp253 setOperationAction(ISD::VAARG, MVT::Other, Expand);
/external/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp659 setOperationAction(ISD::VAARG, MVT::Other, Expand);

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