/external/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 540 /// VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, 543 VAARG, enumerator in enum:llvm::ISD::NodeType
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 235 // VAARG always uses double-word chunks, so promote anything smaller. 236 setOperationAction(ISD::VAARG, MVT::i1, Promote); 237 AddPromotedToType (ISD::VAARG, MVT::i1, MVT::i64); 238 setOperationAction(ISD::VAARG, MVT::i8, Promote); 239 AddPromotedToType (ISD::VAARG, MVT::i8, MVT::i64); 240 setOperationAction(ISD::VAARG, MVT::i16, Promote); 241 AddPromotedToType (ISD::VAARG, MVT::i16, MVT::i64); 242 setOperationAction(ISD::VAARG, MVT::i32, Promote); 243 AddPromotedToType (ISD::VAARG, MVT::i32, MVT::i64); 244 setOperationAction(ISD::VAARG, MV [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGDumper.cpp | 259 case ISD::VAARG: return "vaarg";
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H A D | LegalizeFloatTypes.cpp | 99 case ISD::VAARG: R = SoftenFloatRes_VAARG(N); break; 846 case ISD::VAARG: ExpandRes_VAARG(N, Lo, Hi); break;
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H A D | LegalizeDAG.cpp | 1159 case ISD::VAARG: 2764 case ISD::VAARG: { 3576 case ISD::VAARG: { 3585 && "VAARG promotion is supported only for vectors or integer types");
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H A D | LegalizeIntegerTypes.cpp | 78 case ISD::VAARG: Res = PromoteIntRes_VAARG(N); break; 1096 case ISD::VAARG: ExpandRes_VAARG(N, Lo, Hi); break;
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H A D | SelectionDAG.cpp | 4511 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 793 // VAARG needs to be lowered to not do unaligned accesses for doubles. 794 setOperationAction(ISD::VAARG , MVT::Other, Custom); 1162 case ISD::VAARG: return LowerVAARG(Op, DAG);
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 143 setOperationAction(ISD::VAARG, MVT::Other, Custom); 178 case ISD::VAARG: return LowerVAARG(Op, DAG);
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/external/llvm/lib/Target/MBlaze/ |
H A D | MBlazeISelLowering.cpp | 155 setOperationAction(ISD::VAARG, MVT::Other, Expand);
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 1407 setOperationAction(ISD::VAARG , MVT::Other, Expand);
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 553 setOperationAction(ISD::VAARG , MVT::Other, Custom); 556 setOperationAction(ISD::VAARG , MVT::Other, Expand); 9572 SDValue VAARG = DAG.getMemIntrinsicNode(X86ISD::VAARG_64, dl, local 9580 Chain = VAARG.getValue(1); 9585 VAARG, 11302 case ISD::VAARG: return LowerVAARG(Op, DAG);
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/external/llvm/lib/Target/CellSPU/ |
H A D | SPUISelLowering.cpp | 382 setOperationAction(ISD::VAARG , MVT::Other, Expand);
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/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 253 setOperationAction(ISD::VAARG, MVT::Other, Expand);
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/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 659 setOperationAction(ISD::VAARG, MVT::Other, Expand);
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