Searched refs:cfc1 (Results 1 - 8 of 8) sorted by relevance
/external/llvm/test/MC/Mips/ |
H A D | mips-fpu-instructions.s | 142 # CHECK: cfc1 $6, $fcc0 # encoding: [0x00,0x00,0x46,0x44] 153 cfc1 $a2,$0
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/external/qemu/target-mips/ |
H A D | helper.h | 167 DEF_HELPER_1(cfc1, tl, i32)
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H A D | translate.c | 5368 gen_helper_1i(cfc1, t0, rt); 5822 gen_helper_1i(cfc1, t0, fs); 5824 opn = "cfc1";
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/external/v8/test/cctest/ |
H A D | test-assembler-mips.cc | 1174 __ cfc1(a1, FCSR); 1197 __ cfc1(a2, FCSR); \ 1203 __ cfc1(a2, FCSR); \ 1209 __ cfc1(a2, FCSR); \ 1215 __ cfc1(a2, FCSR); \
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/external/v8/src/mips/ |
H A D | assembler-mips.h | 804 void cfc1(Register rt, FPUControlRegister fs);
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H A D | macro-assembler-mips.cc | 1235 cfc1(scratch, FCSR); 1261 cfc1(scratch, FCSR); 1413 cfc1(scratch1, FCSR); 1434 cfc1(except_flag, FCSR); 1544 cfc1(scratch2, FCSR); 1550 cfc1(scratch, FCSR);
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H A D | assembler-mips.cc | 1667 void Assembler::cfc1(Register rt, FPUControlRegister fs) { function in class:v8::Assembler
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H A D | stub-cache-mips.cc | 2069 __ cfc1(a3, FCSR); 2082 __ cfc1(t5, FCSR);
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