Searched refs:opc (Results 1 - 25 of 69) sorted by relevance

123

/external/webkit/Source/JavaScriptCore/assembler/
H A DSH4Assembler.h220 inline uint16_t getOpcodeGroup1(uint16_t opc, int rm, int rn) argument
222 return (opc | ((rm & 0xf) << 8) | ((rn & 0xf) << 4));
225 inline uint16_t getOpcodeGroup2(uint16_t opc, int rm) argument
227 return (opc | ((rm & 0xf) << 8));
230 inline uint16_t getOpcodeGroup3(uint16_t opc, int rm, int rn) argument
232 return (opc | ((rm & 0xf) << 8) | (rn & 0xff));
235 inline uint16_t getOpcodeGroup4(uint16_t opc, int rm, int rn, int offset) argument
237 return (opc | ((rm & 0xf) << 8) | ((rn & 0xf) << 4) | (offset & 0xf));
240 inline uint16_t getOpcodeGroup5(uint16_t opc, int rm) argument
242 return (opc | (r
245 getOpcodeGroup6(uint16_t opc, int rm) argument
250 getOpcodeGroup7(uint16_t opc, int rm) argument
255 getOpcodeGroup8(uint16_t opc, int rm, int rn) argument
260 getOpcodeGroup9(uint16_t opc, int rm, int rn) argument
265 getOpcodeGroup10(uint16_t opc, int rm, int rn) argument
270 getOpcodeGroup11(uint16_t opc, int rm, int rn) argument
446 uint16_t opc = getOpcodeGroup2(MOVT_OPCODE, dst); local
454 uint16_t opc = getOpcodeGroup1(ADD_OPCODE, dst, src); local
460 uint16_t opc = getOpcodeGroup1(ADDC_OPCODE, dst, src); local
466 uint16_t opc = getOpcodeGroup1(ADDV_OPCODE, dst, src); local
474 uint16_t opc = getOpcodeGroup3(ADDIMM_OPCODE, dst, imm8); local
480 uint16_t opc = getOpcodeGroup1(AND_OPCODE, dst, src); local
489 uint16_t opc = getOpcodeGroup5(ANDIMM_OPCODE, imm8); local
495 uint16_t opc = getOpcodeGroup1(DIV1_OPCODE, dst, src); local
501 uint16_t opc = getOpcodeGroup1(DIV0_OPCODE, dst, src); local
507 uint16_t opc = getOpcodeGroup1(NOT_OPCODE, dst, src); local
513 uint16_t opc = getOpcodeGroup1(OR_OPCODE, dst, src); local
522 uint16_t opc = getOpcodeGroup5(ORIMM_OPCODE, imm8); local
528 uint16_t opc = getOpcodeGroup1(SUB_OPCODE, dst, src); local
534 uint16_t opc = getOpcodeGroup1(SUBV_OPCODE, dst, src); local
540 uint16_t opc = getOpcodeGroup1(XOR_OPCODE, dst, src); local
549 uint16_t opc = getOpcodeGroup5(XORIMM_OPCODE, imm8); local
575 uint16_t opc = getOpcodeGroup1(NEG_OPCODE, dst, src); local
581 uint16_t opc = getOpcodeGroup1(SHLD_OPCODE, dst, rShift); local
599 uint16_t opc = getOpcodeGroup1(SHAD_OPCODE, dst, rShift); local
625 uint16_t opc = getOpcodeGroup1(MULL_OPCODE, dst, src); local
631 uint16_t opc = getOpcodeGroup1(DMULL_L_OPCODE, dst, src); local
637 uint16_t opc = getOpcodeGroup1(DMULSL_OPCODE, dst, src); local
643 uint16_t opc = getOpcodeGroup2(STSMACL_OPCODE, reg); local
649 uint16_t opc = getOpcodeGroup2(STSMACH_OPCODE, reg); local
695 uint16_t opc = getOpcodeGroup2(CMPPL_OPCODE, reg); local
701 uint16_t opc = getOpcodeGroup2(CMPPZ_OPCODE, reg); local
707 uint16_t opc = getOpcodeGroup5(CMPEQIMM_OPCODE, imm); local
713 uint16_t opc = getOpcodeGroup1(TST_OPCODE, dst, src); local
721 uint16_t opc = getOpcodeGroup5(TSTIMM_OPCODE, imm); local
750 branch(uint16_t opc, int label) argument
770 branch(uint16_t opc, RegisterID reg) argument
792 uint16_t opc = getOpcodeGroup2(LDSPR_OPCODE, reg); local
798 uint16_t opc = getOpcodeGroup2(STSPR_OPCODE, reg); local
804 uint16_t opc = getOpcodeGroup1(EXTUW_OPCODE, dst, src); local
812 uint16_t opc = getOpcodeGroup2(LDS_RM_FPUL_OPCODE, src); local
818 uint16_t opc = getOpcodeGroup2(FNEG_OPCODE, dst); local
824 uint16_t opc = getOpcodeGroup2(FSQRT_OPCODE, dst); local
830 uint16_t opc = getOpcodeGroup2(STS_FPUL_RN_OPCODE, src); local
836 uint16_t opc = getOpcodeGroup2(FLOAT_OPCODE, src); local
842 uint16_t opc = getOpcodeGroup1(FMUL_OPCODE, dst, src); local
848 uint16_t opc = getOpcodeGroup1(FMOVS_READ_RM_OPCODE, dst, src); local
854 uint16_t opc = getOpcodeGroup1(FMOVS_WRITE_RN_OPCODE, dst, src); local
860 uint16_t opc = getOpcodeGroup1(FMOVS_WRITE_R0RN_OPCODE, dst, src); local
866 uint16_t opc = getOpcodeGroup1(FMOVS_READ_R0RM_OPCODE, dst, src); local
872 uint16_t opc = getOpcodeGroup1(FMOVS_READ_RM_INC_OPCODE, dst, src); local
878 uint16_t opc = getOpcodeGroup1(FMOVS_WRITE_RN_DEC_OPCODE, dst, src); local
884 uint16_t opc = getOpcodeGroup2(FTRC_OPCODE, src); local
890 uint16_t opc = getOpcodeGroup2(FLDS_FRM_FPUL_OPCODE, src); local
896 uint16_t opc = getOpcodeGroup2(FSTS_FPUL_FRN_OPCODE, src); local
902 uint16_t opc = getOpcodeGroup2(LDSFPSCR_OPCODE, reg); local
908 uint16_t opc = getOpcodeGroup2(STSFPSCR_OPCODE, reg); local
916 uint16_t opc = getOpcodeGroup7(FCNVDS_DRM_FPUL_OPCODE, src >> 1); local
922 uint16_t opc = getOpcodeGroup8(FCMPEQ_OPCODE, dst >> 1, src >> 1); local
928 uint16_t opc = getOpcodeGroup8(FCMPGT_OPCODE, dst >> 1, src >> 1); local
934 uint16_t opc = getOpcodeGroup8(FMUL_OPCODE, dst >> 1, src >> 1); local
940 uint16_t opc = getOpcodeGroup8(FSUB_OPCODE, dst >> 1, src >> 1); local
946 uint16_t opc = getOpcodeGroup8(FADD_OPCODE, dst >> 1, src >> 1); local
952 uint16_t opc = getOpcodeGroup8(FMOV_OPCODE, dst >> 1, src >> 1); local
958 uint16_t opc = getOpcodeGroup8(FDIV_OPCODE, dst >> 1, src >> 1); local
964 uint16_t opc = getOpcodeGroup7(FSQRT_OPCODE, dst >> 1); local
970 uint16_t opc = getOpcodeGroup7(FNEG_OPCODE, dst >> 1); local
976 uint16_t opc = getOpcodeGroup10(FMOVS_READ_RM_OPCODE, dst >> 1, src); local
982 uint16_t opc = getOpcodeGroup9(FMOVS_WRITE_RN_OPCODE, dst, src >> 1); local
988 uint16_t opc = getOpcodeGroup9(FMOVS_WRITE_R0RN_OPCODE, dst, src >> 1); local
994 uint16_t opc = getOpcodeGroup10(FMOVS_READ_R0RM_OPCODE, dst >> 1, src); local
1000 uint16_t opc = getOpcodeGroup10(FMOVS_READ_RM_INC_OPCODE, dst >> 1, src); local
1006 uint16_t opc = getOpcodeGroup9(FMOVS_WRITE_RN_DEC_OPCODE, dst, src >> 1); local
1012 uint16_t opc = getOpcodeGroup7(FLOAT_OPCODE, src >> 1); local
1018 uint16_t opc = getOpcodeGroup7(FTRC_OPCODE, src >> 1); local
1028 uint16_t opc = getOpcodeGroup3(MOVIMM_OPCODE, dst, imm8); local
1034 uint16_t opc = getOpcodeGroup1(MOV_OPCODE, dst, src); local
1040 uint16_t opc = getOpcodeGroup1(MOVW_WRITE_RN_OPCODE, dst, src); local
1046 uint16_t opc = getOpcodeGroup1(MOVW_READ_RM_OPCODE, dst, src); local
1055 uint16_t opc = getOpcodeGroup3(MOVW_READ_OFFPC_OPCODE, dst, offset); local
1063 uint16_t opc = getOpcodeGroup11(MOVW_READ_OFFRM_OPCODE, base, offset); local
1069 uint16_t opc = getOpcodeGroup1(MOVW_READ_R0RM_OPCODE, dst, src); local
1087 uint16_t opc = getOpcodeGroup1(MOVL_WRITE_RN_OPCODE, base, src); local
1112 uint16_t opc = getOpcodeGroup11(MOVB_READ_OFFRM_OPCODE, base, offset); local
1118 uint16_t opc = getOpcodeGroup1(MOVB_READ_R0RM_OPCODE, dst, src); local
1124 uint16_t opc = getOpcodeGroup1(MOVB_READ_RM_OPCODE, dst, src); local
1130 uint16_t opc = getOpcodeGroup1(MOVL_READ_RM_OPCODE, dst, base); local
1136 uint16_t opc = getOpcodeGroup1(MOVL_READ_RMINC_OPCODE, dst, base); local
1142 uint16_t opc = getOpcodeGroup1(MOVL_READ_R0RM_OPCODE, dst, src); local
1148 uint16_t opc = getOpcodeGroup1(MOVL_WRITE_R0RN_OPCODE, dst, src); local
1156 uint16_t opc = getOpcodeGroup3(MOVIMM_OPCODE, dst, imm8); local
1167 uint16_t opc = getOpcodeGroup3(MOVIMM_OPCODE, dst, 0); local
1176 uint16_t opc = getOpcodeGroup3(MOVIMM_OPCODE, dst, 0); local
1568 printInstr(uint16_t opc, unsigned int size, bool isdoubleInst = true) argument
2054 printInstr(uint16_t opc, unsigned int size, bool isdoubleInst = true) argument
[all...]
/external/wpa_supplicant_8/hostapd/src/crypto/
H A Dmilenage.c27 * @opc: OPc = 128-bit value derived from OP and K
36 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand, argument
44 tmp1[i] = _rand[i] ^ opc[i];
57 tmp3[(i + 8) % 16] = tmp2[i] ^ opc[i];
67 tmp1[i] ^= opc[i];
78 * @opc: OPc = 128-bit value derived from OP and K
88 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand, argument
96 tmp1[i] = _rand[i] ^ opc[i];
108 tmp1[i] = tmp2[i] ^ opc[i];
114 tmp3[i] ^= opc[
173 milenage_generate(const u8 *opc, const u8 *amf, const u8 *k, const u8 *sqn, const u8 *_rand, u8 *autn, u8 *ik, u8 *ck, u8 *res, size_t *res_len) argument
208 milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts, u8 *sqn) argument
235 gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres, u8 *kc) argument
270 milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand, const u8 *autn, u8 *ik, u8 *ck, u8 *res, size_t *res_len, u8 *auts) argument
[all...]
H A Dmilenage.h12 void milenage_generate(const u8 *opc, const u8 *amf, const u8 *k,
15 int milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts,
17 int gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres,
19 int milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand,
22 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand,
24 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand,
/external/wpa_supplicant_8/src/crypto/
H A Dmilenage.c27 * @opc: OPc = 128-bit value derived from OP and K
36 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand, argument
44 tmp1[i] = _rand[i] ^ opc[i];
57 tmp3[(i + 8) % 16] = tmp2[i] ^ opc[i];
67 tmp1[i] ^= opc[i];
78 * @opc: OPc = 128-bit value derived from OP and K
88 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand, argument
96 tmp1[i] = _rand[i] ^ opc[i];
108 tmp1[i] = tmp2[i] ^ opc[i];
114 tmp3[i] ^= opc[
173 milenage_generate(const u8 *opc, const u8 *amf, const u8 *k, const u8 *sqn, const u8 *_rand, u8 *autn, u8 *ik, u8 *ck, u8 *res, size_t *res_len) argument
208 milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts, u8 *sqn) argument
235 gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres, u8 *kc) argument
270 milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand, const u8 *autn, u8 *ik, u8 *ck, u8 *res, size_t *res_len, u8 *auts) argument
[all...]
H A Dmilenage.h12 void milenage_generate(const u8 *opc, const u8 *amf, const u8 *k,
15 int milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts,
17 int gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres,
19 int milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand,
22 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand,
24 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand,
/external/wpa_supplicant_8/wpa_supplicant/src/crypto/
H A Dmilenage.c27 * @opc: OPc = 128-bit value derived from OP and K
36 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand, argument
44 tmp1[i] = _rand[i] ^ opc[i];
57 tmp3[(i + 8) % 16] = tmp2[i] ^ opc[i];
67 tmp1[i] ^= opc[i];
78 * @opc: OPc = 128-bit value derived from OP and K
88 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand, argument
96 tmp1[i] = _rand[i] ^ opc[i];
108 tmp1[i] = tmp2[i] ^ opc[i];
114 tmp3[i] ^= opc[
173 milenage_generate(const u8 *opc, const u8 *amf, const u8 *k, const u8 *sqn, const u8 *_rand, u8 *autn, u8 *ik, u8 *ck, u8 *res, size_t *res_len) argument
208 milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts, u8 *sqn) argument
235 gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres, u8 *kc) argument
270 milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand, const u8 *autn, u8 *ik, u8 *ck, u8 *res, size_t *res_len, u8 *auts) argument
[all...]
H A Dmilenage.h12 void milenage_generate(const u8 *opc, const u8 *amf, const u8 *k,
15 int milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts,
17 int gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres,
19 int milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand,
22 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand,
24 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand,
/external/wpa_supplicant_6/wpa_supplicant/src/hlr_auc_gw/
H A Dmilenage.h18 void milenage_generate(const u8 *opc, const u8 *amf, const u8 *k,
21 int milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts,
23 int gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres,
25 int milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand,
H A Dmilenage.c33 * @opc: OPc = 128-bit value derived from OP and K
42 static int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand, argument
50 tmp1[i] = _rand[i] ^ opc[i];
63 tmp3[(i + 8) % 16] = tmp2[i] ^ opc[i];
73 tmp1[i] ^= opc[i];
84 * @opc: OPc = 128-bit value derived from OP and K
94 static int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand, argument
102 tmp1[i] = _rand[i] ^ opc[i];
114 tmp1[i] = tmp2[i] ^ opc[i];
120 tmp3[i] ^= opc[
179 milenage_generate(const u8 *opc, const u8 *amf, const u8 *k, const u8 *sqn, const u8 *_rand, u8 *autn, u8 *ik, u8 *ck, u8 *res, size_t *res_len) argument
214 milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts, u8 *sqn) argument
241 gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres, u8 *kc) argument
276 milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand, const u8 *autn, u8 *ik, u8 *ck, u8 *res, size_t *res_len, u8 *auts) argument
343 milenage_opc(const u8 *op, const u8 *k, u8 *opc) argument
356 u8 opc[16]; member in struct:gsm_milenage_test_set
585 u8 opc[16]; member in struct:milenage_test_set
1025 u8 buf[16], buf2[16], buf3[16], buf4[16], buf5[16], opc[16]; local
[all...]
/external/llvm/lib/Target/CellSPU/
H A DSPUInstrInfo.cpp33 unsigned opc = I->getOpcode(); local
35 return (opc == SPU::BR
36 || opc == SPU::BRA
37 || opc == SPU::BI);
42 unsigned opc = I->getOpcode(); local
44 return (opc == SPU::BRNZr32
45 || opc == SPU::BRNZv4i32
46 || opc == SPU::BRZr32
47 || opc == SPU::BRZv4i32
48 || opc
144 unsigned opc; local
177 unsigned opc; local
[all...]
/external/qemu/tcg/i386/
H A Dtcg-target.c351 static void tcg_out_opc(TCGContext *s, int opc, int r, int rm, int x) argument
355 if (opc & P_DATA16) {
357 assert((opc & P_REXW) == 0);
360 if (opc & P_ADDR32) {
365 rex |= (opc & P_REXW) >> 8; /* REX.W */
375 rex |= opc & (r >= 4 ? P_REXB_R : 0);
376 rex |= opc & (rm >= 4 ? P_REXB_RM : 0);
382 if (opc & P_EXT) {
385 tcg_out8(s, opc);
388 static void tcg_out_opc(TCGContext *s, int opc) argument
404 tcg_out_modrm(TCGContext *s, int opc, int r, int rm) argument
415 tcg_out_modrm_sib_offset(TCGContext *s, int opc, int r, int rm, int index, int shift, tcg_target_long offset) argument
499 tcg_out_modrm_offset(TCGContext *s, int opc, int r, int rm, tcg_target_long offset) argument
518 int opc = OPC_MOVL_GvEv + (type == TCG_TYPE_I64 ? P_REXW : 0); local
568 int opc = OPC_MOVL_GvEv + (type == TCG_TYPE_I64 ? P_REXW : 0); local
575 int opc = OPC_MOVL_EvGv + (type == TCG_TYPE_I64 ? P_REXW : 0); local
716 tcg_out_jxx(TCGContext *s, int opc, int label_index, int small) argument
1140 tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc) argument
1314 tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc) argument
1432 tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, const int *const_args) argument
[all...]
/external/clang/lib/StaticAnalyzer/Checkers/
H A DMallocOverflowSecurityChecker.cpp74 BinaryOperatorKind opc = binop->getOpcode(); local
76 if (mulop == NULL && opc == BO_Mul)
78 if (opc != BO_Mul && opc != BO_Add && opc != BO_Sub && opc != BO_Shl)
85 else if ((opc == BO_Add || opc == BO_Mul)
/external/qemu/tcg/x86_64/
H A Dtcg-target.c238 static void tcg_out_opc(TCGContext *s, int opc, int r, int rm, int x) argument
242 rex |= (opc & P_REXW) >> 6; /* REX.W */
252 rex |= opc & (r >= 4 ? P_REXB_R : 0);
253 rex |= opc & (rm >= 4 ? P_REXB_RM : 0);
258 if (opc & P_EXT) {
261 tcg_out8(s, opc & 0xff);
264 static inline void tcg_out_modrm(TCGContext *s, int opc, int r, int rm) argument
266 tcg_out_opc(s, opc, r, rm, 0);
271 static inline void tcg_out_modrm_offset(TCGContext *s, int opc, int r, int rm, argument
276 tcg_out_opc(s, opc,
320 tcg_out_modrm_offset2(TCGContext *s, int opc, int r, int rm, int index, int shift, tcg_target_long offset) argument
466 tcg_out_jxx(TCGContext *s, int opc, int label_index) argument
557 tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc) argument
751 tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc) argument
906 tcg_out_op(TCGContext *s, int opc, const TCGArg *args, const int *const_args) argument
[all...]
/external/qemu/tcg/
H A Dtcg-op.h28 static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 arg1) argument
30 *gen_opc_ptr++ = opc;
34 static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 arg1) argument
36 *gen_opc_ptr++ = opc;
40 static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg arg1) argument
42 *gen_opc_ptr++ = opc;
46 static inline void tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2) argument
48 *gen_opc_ptr++ = opc;
53 static inline void tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2) argument
55 *gen_opc_ptr++ = opc;
60 tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 arg1, TCGArg arg2) argument
67 tcg_gen_op2i_i64(TCGOpcode opc, TCGv_i64 arg1, TCGArg arg2) argument
74 tcg_gen_op2ii(TCGOpcode opc, TCGArg arg1, TCGArg arg2) argument
81 tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGv_i32 arg3) argument
90 tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGv_i64 arg3) argument
99 tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGArg arg3) argument
108 tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGArg arg3) argument
117 tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val, TCGv_ptr base, TCGArg offset) argument
126 tcg_gen_ldst_op_i64(TCGOpcode opc, TCGv_i64 val, TCGv_ptr base, TCGArg offset) argument
135 tcg_gen_qemu_ldst_op_i64_i32(TCGOpcode opc, TCGv_i64 val, TCGv_i32 addr, TCGArg mem_index) argument
144 tcg_gen_qemu_ldst_op_i64_i64(TCGOpcode opc, TCGv_i64 val, TCGv_i64 addr, TCGArg mem_index) argument
153 tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGv_i32 arg3, TCGv_i32 arg4) argument
163 tcg_gen_op4_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGv_i64 arg3, TCGv_i64 arg4) argument
173 tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGv_i32 arg3, TCGArg arg4) argument
183 tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGv_i64 arg3, TCGArg arg4) argument
193 tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGArg arg3, TCGArg arg4) argument
203 tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGArg arg3, TCGArg arg4) argument
213 tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGv_i32 arg3, TCGv_i32 arg4, TCGv_i32 arg5) argument
224 tcg_gen_op5_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGv_i64 arg3, TCGv_i64 arg4, TCGv_i64 arg5) argument
235 tcg_gen_op5i_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGv_i32 arg3, TCGv_i32 arg4, TCGArg arg5) argument
246 tcg_gen_op5i_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGv_i64 arg3, TCGv_i64 arg4, TCGArg arg5) argument
257 tcg_gen_op5ii_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGv_i32 arg3, TCGArg arg4, TCGArg arg5) argument
269 tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGv_i64 arg3, TCGArg arg4, TCGArg arg5) argument
281 tcg_gen_op6_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGv_i32 arg3, TCGv_i32 arg4, TCGv_i32 arg5, TCGv_i32 arg6) argument
294 tcg_gen_op6_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGv_i64 arg3, TCGv_i64 arg4, TCGv_i64 arg5, TCGv_i64 arg6) argument
307 tcg_gen_op6i_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGv_i32 arg3, TCGv_i32 arg4, TCGv_i32 arg5, TCGArg arg6) argument
320 tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGv_i64 arg3, TCGv_i64 arg4, TCGv_i64 arg5, TCGArg arg6) argument
333 tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 arg1, TCGv_i32 arg2, TCGv_i32 arg3, TCGv_i32 arg4, TCGArg arg5, TCGArg arg6) argument
346 tcg_gen_op6ii_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2, TCGv_i64 arg3, TCGv_i64 arg4, TCGArg arg5, TCGArg arg6) argument
[all...]
/external/qemu/tcg/arm/
H A Dtcg-target.c298 #define TO_CPSR(opc) \
299 ((opc == ARITH_CMP || opc == ARITH_CMN || opc == ARITH_TST) << 20)
385 int cond, int opc, int rd, int rn, int rm, int shift)
387 tcg_out32(s, (cond << 28) | (0 << 25) | (opc << 21) | TO_CPSR(opc) |
411 int cond, int opc, int rd, int rn, int im)
413 tcg_out32(s, (cond << 28) | (1 << 25) | (opc << 21) | TO_CPSR(opc) |
384 tcg_out_dat_reg(TCGContext *s, int cond, int opc, int rd, int rn, int rm, int shift) argument
410 tcg_out_dat_imm(TCGContext *s, int cond, int opc, int rd, int rn, int im) argument
435 int opc = ARITH_MOV; local
956 tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc) argument
1179 tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc) argument
1412 tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, const int *const_args) argument
[all...]
/external/openssl/crypto/bio/
H A Dbss_log.c357 opcdef_p->opc$b_ms_type = OPC$_RQ_RQST;
358 memcpy(opcdef_p->opc$z_ms_target_classes, &VMS_OPC_target, 3);
359 opcdef_p->opc$l_ms_rqstid = 0;
360 memcpy(&opcdef_p->opc$l_ms_text, buf, len);
/external/qemu/tcg/ppc64/
H A Dtcg-target.c275 #define OPCD(opc) ((opc)<<26)
276 #define XO19(opc) (OPCD(19)|((opc)<<1))
277 #define XO30(opc) (OPCD(30)|((opc)<<2))
278 #define XO31(opc) (OPCD(31)|((opc)<<1))
279 #define XO58(opc) (OPCD(58)|(opc))
617 tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc) argument
764 tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc) argument
1200 tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, const int *const_args) argument
[all...]
/external/qemu/tcg/hppa/
H A Dtcg-target.c954 int addr_reg, int addend_reg, int opc)
962 switch (opc) {
1020 static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc) argument
1024 int datahi_reg = (opc == 3 ? *args++ : TCG_REG_R0);
1038 opc & 3, lab1, offset);
1043 tcg_out_qemu_ld_direct(s, datalo_reg, datahi_reg, addrlo_reg, TCG_REG_R20, opc);
1057 tcg_out_call(s, qemu_ld_helpers[opc & 3]);
1059 switch (opc) {
1088 (GUEST_BASE ? TCG_GUEST_BASE_REG : TCG_REG_R0), opc);
1093 int addr_reg, int opc)
953 tcg_out_qemu_ld_direct(TCGContext *s, int datalo_reg, int datahi_reg, int addr_reg, int addend_reg, int opc) argument
1092 tcg_out_qemu_st_direct(TCGContext *s, int datalo_reg, int datahi_reg, int addr_reg, int opc) argument
1135 tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc) argument
1256 tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, const int *const_args) argument
[all...]
/external/llvm/lib/Target/Hexagon/
H A DHexagonNewValueJump.cpp586 unsigned opc = getNewValueJumpOpcode(cmpInstr, cmpOp2, local
589 opc = QII->getInvertedPredicatedOpcode(opc);
611 QII->get(opc))
618 QII->get(opc))
/external/qemu/tcg/ppc/
H A Dtcg-target.c300 #define OPCD(opc) ((opc)<<26)
301 #define XO31(opc) (OPCD(31)|((opc)<<1))
302 #define XO19(opc) (OPCD(19)|((opc)<<1))
527 static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc) argument
539 if (opc == 3)
548 s_bits = opc & 3;
603 switch (opc) {
724 tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc) argument
1294 tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, const int *const_args) argument
[all...]
/external/qemu/tcg/sparc/
H A Dtcg-target.c471 static void tcg_out_branch_i32(TCGContext *s, int opc, int label_index) argument
478 tcg_out32(s, (INSN_OP(0) | INSN_COND(opc, 0) | INSN_OP2(0x2)
482 tcg_out32(s, (INSN_OP(0) | INSN_COND(opc, 0) | INSN_OP2(0x2) | 0));
487 static void tcg_out_branch_i64(TCGContext *s, int opc, int label_index) argument
494 tcg_out32(s, (INSN_OP(0) | INSN_COND(opc, 0) | INSN_OP2(0x1) |
499 tcg_out32(s, (INSN_OP(0) | INSN_COND(opc, 0) | INSN_OP2(0x1) |
749 int opc)
759 s_bits = opc & 3;
819 switch(opc) {
892 switch(opc) {
748 tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc) argument
958 tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc) argument
1116 tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, const int *const_args) argument
[all...]
/external/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMAsmBackend.cpp323 unsigned opc = 4; // bits {24-21}. Default to add: 0b0100 local
326 opc = 2; // 0b0010
331 return ARM_AM::getSOImmVal(Value) | (opc << 21);
336 unsigned opc = 0; local
339 opc = 5;
342 uint32_t out = (opc << 21);
/external/qemu/hw/
H A Dbt-hci-csr.c184 int opc; local
188 opc = le16_to_cpu(((struct hci_command_hdr *) pkt)->opcode);
189 if (cmd_opcode_ogf(opc) == OGF_VENDOR_CMD) {
190 csrhci_in_packet_vendor(s, cmd_opcode_ocf(opc),
/external/qemu/target-mips/
H A Dtranslate.c980 static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt, argument
997 switch (opc) {
1137 static void gen_st_cond (DisasContext *ctx, uint32_t opc, int rt, argument
1158 switch (opc) {
1178 static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft, argument
1194 switch (opc) {
1250 static void gen_arith_imm (CPUState *env, DisasContext *ctx, uint32_t opc, argument
1256 if (rt == 0 && opc != OPC_ADDI && opc != OPC_DADDI) {
1262 switch (opc) {
1337 gen_logic_imm(CPUState *env, uint32_t opc, int rt, int rs, int16_t imm) argument
1379 gen_slt_imm(CPUState *env, uint32_t opc, int rt, int rs, int16_t imm) argument
1407 gen_shift_imm(CPUState *env, DisasContext *ctx, uint32_t opc, int rt, int rs, int16_t imm) argument
1546 gen_arith(CPUState *env, DisasContext *ctx, uint32_t opc, int rd, int rs, int rt) argument
1727 gen_cond_move(CPUState *env, uint32_t opc, int rd, int rs, int rt) argument
1764 gen_logic(CPUState *env, uint32_t opc, int rd, int rs, int rt) argument
1824 gen_slt(CPUState *env, uint32_t opc, int rd, int rs, int rt) argument
1855 gen_shift(CPUState *env, DisasContext *ctx, uint32_t opc, int rd, int rs, int rt) argument
1966 gen_HILO(DisasContext *ctx, uint32_t opc, int reg) argument
2002 gen_muldiv(DisasContext *ctx, uint32_t opc, int rs, int rt) argument
2237 gen_mul_vr54xx(DisasContext *ctx, uint32_t opc, int rd, int rs, int rt) argument
2317 gen_cl(DisasContext *ctx, uint32_t opc, int rd, int rs) argument
2355 gen_trap(DisasContext *ctx, uint32_t opc, int rs, int rt, int16_t imm) argument
2468 gen_compute_branch(DisasContext *ctx, uint32_t opc, int rs, int rt, int32_t offset) argument
2704 gen_bitops(DisasContext *ctx, uint32_t opc, int rt, int rs, int lsb, int msb) argument
5552 gen_cp0(CPUState *env, DisasContext *ctx, uint32_t opc, int rt, int rd) argument
5793 gen_cp1(DisasContext *ctx, uint32_t opc, int rt, int fs) argument
7243 gen_flt3_ldst(DisasContext *ctx, uint32_t opc, int fd, int fs, int base, int index) argument
7345 gen_flt3_arith(DisasContext *ctx, uint32_t opc, int fd, int fr, int fs, int ft) argument
[all...]
/external/wpa_supplicant_8/hostapd/
H A Dhlr_auc_gw.c78 u8 opc[16]; member in struct:milenage_parameters
117 " opc CHAR(32) NOT NULL,"
168 if (os_strcmp(col[i], "opc") == 0 && argv[i] &&
169 hexstr2bin(argv[i], m->opc, sizeof(m->opc))) {
201 "SELECT ki,opc,amf,sqn FROM milenage WHERE imsi=%llu;",
476 if (strlen(pos) != 32 || hexstr2bin(pos, m->opc, 16)) {
566 pos += wpa_snprintf_hex(pos, end - pos, m->opc, 16);
647 gsm_milenage(m->opc, m->ki, _rand, sres, kc);
742 milenage_generate(m->opc,
[all...]

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