Searched refs:dRow5 (Results 1 - 5 of 5) sorted by relevance
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/ |
| H A D | omxVCM4P2_MCReconBlock_s.s | 55 VLD1 dRow5, [pSrc], srcStep
64 VST1 dRow5, [pDst@64], dstStep
107 VLD1 {dRow5, dRow5Shft}, [pSrc], srcStep
108 VEXT dRow5Shft, dRow5, dRow5Shft, #1
122 $M_VHADDR dRow5, dRow5, dRow5Shft
125 VST1 dRow5, [pDst@64], dstStep
163 VLD1 dRow5, [pSrc], srcStep
174 $M_VHADDR dRow4, dRow4, dRow5
176 $M_VHADDR dRow5, dRow
303 dRow5 DN D10.U8 define
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| H A D | omxVCM4P10_FilterDeblockingChroma_VerEdge_I_s.s | 54 dRow5 DN D9.U8 define
151 VLD1 dRow5, [pTmp], step
161 ;// dRow5 = [q3r5 q2r5 q1r5 q0r5 p0r5 p1r5 p2r5 p3r5]
168 VZIP.8 dRow4, dRow5
174 VZIP.16 dRow5, dRow7
179 VZIP.32 dRow1, dRow5
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| H A D | omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.s | 56 dRow5 DN D9.U8 define
61 ;// dRow4 - dP_2, dRow5 - dQ_1, dRow6 - dP_0, dRow7 - dQ_3
244 VLD1 dRow5, [pTmp], pTmpStep
247 VZIP.8 dRow4, dRow5
256 ;// dRow5 = [q3r5 q2r5 q1r5 q0r5 p0r5 p1r5 p2r5 p3r5]
266 VZIP.16 dRow5, dRow7
270 VZIP.32 dRow1, dRow5
277 ;// dRow4 - dP_2, dRow5 - dQ_1, dRow6 - dP_0, dRow7 - dQ_3
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| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm/ |
| H A D | h264bsdWriteMacroblock.s | 57 dRow5 DN D5.U8 define
141 VST1 {dRow5}, [cb@64], cwidth
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| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm_gcc/ |
| H A D | h264bsdWriteMacroblock.S | 59 #define dRow5 D5.U8 define
143 VST1 {dRow5}, [cb,:64], cwidth
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