| /dalvik/vm/compiler/template/armv5te-vfp/ |
| H A D | funop.S | 3 * "instr" line that specifies an instruction that performs "s1 = op s0".
12 flds s0, [r1] @ s0<- vB
13 $instr @ s1<- op s0
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| H A D | funopNarrower.S | 3 * "instr" line that specifies an instruction that performs "s0 = op d0".
13 $instr @ s0<- op d0
14 fsts s0, [r0] @ vA<- s0
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| H A D | funopWider.S | 3 * "instr" line that specifies an instruction that performs "d0 = op s0".
12 flds s0, [r1] @ s0<- vB
13 $instr @ d0<- op s0
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| H A D | fbinop.S | 3 * specifies an instruction that performs s2 = s0 op s1.
10 flds s0,[r1]
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| /dalvik/vm/mterp/arm-vfp/ |
| H A D | funopNarrower.S | 3 * "instr" line that specifies an instruction that performs "s0 = op d0".
14 $instr @ s0<- op
17 fsts s0, [r9] @ vA<- s0
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| H A D | fbinop2addr.S | 4 * "s2 = s0 op s1".
16 flds s0, [r9] @ s0<- vA
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| H A D | funop.S | 3 * line that specifies an instruction that performs "s1 = op s0".
11 flds s0, [r3] @ s0<- vB
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| H A D | funopWider.S | 3 * "instr" line that specifies an instruction that performs "d0 = op s0".
11 flds s0, [r3] @ s0<- vB
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| H A D | fbinop.S | 3 * specifies an instruction that performs "s2 = s0 op s1". Because we
16 flds s0, [r2] @ s0<- vBB
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| /dalvik/vm/arch/mips/ |
| H A D | CallO32.S | 97 * |__________| saved s0
116 * s0: pReturn
144 sw $s0,12($sp)
150 lw $s0,FSIZE+28($sp) /* s0 <- pReturn */
226 * s0: pReturn
263 sw $v0,0($s0)
264 sw $v1,4($s0)
271 lw $s0,12($sp)
|
| /dalvik/vm/compiler/template/out/ |
| H A D | CompilerTemplateAsm-armv5te-vfp.S | 52 VFP: single-precision results in s0, double-precision results in d0.
599 * specifies an instruction that performs s2 = s0 op s1.
606 flds s0,[r1]
608 fadds s2, s0, s1
621 * specifies an instruction that performs s2 = s0 op s1.
628 flds s0,[r1]
630 fsubs s2, s0, s1
643 * specifies an instruction that performs s2 = s0 op s1.
650 flds s0,[r1]
652 fmuls s2, s0, s
[all...] |
| H A D | CompilerTemplateAsm-armv7-a-neon.S | 52 VFP: single-precision results in s0, double-precision results in d0.
599 * specifies an instruction that performs s2 = s0 op s1.
606 flds s0,[r1]
608 fadds s2, s0, s1
621 * specifies an instruction that performs s2 = s0 op s1.
628 flds s0,[r1]
630 fsubs s2, s0, s1
643 * specifies an instruction that performs s2 = s0 op s1.
650 flds s0,[r1]
652 fmuls s2, s0, s
[all...] |
| H A D | CompilerTemplateAsm-armv7-a.S | 52 VFP: single-precision results in s0, double-precision results in d0.
599 * specifies an instruction that performs s2 = s0 op s1.
606 flds s0,[r1]
608 fadds s2, s0, s1
621 * specifies an instruction that performs s2 = s0 op s1.
628 flds s0,[r1]
630 fsubs s2, s0, s1
643 * specifies an instruction that performs s2 = s0 op s1.
650 flds s0,[r1]
652 fmuls s2, s0, s
[all...] |
| H A D | CompilerTemplateAsm-mips.S | 45 s0 rPC interpreted program counter, used for fetching instructions
119 #define rPC s0
365 STACK_STORE(s0, 116)
374 #define STACK_LOAD_S0() STACK_LOAD(s0, 116); \
383 STACK_STORE(s0, 116); \
400 STACK_LOAD(s0, 116); \
1532 * "instr" line that specifies an instruction that performs "d0 = op s0".
1665 * "instr" line that specifies an instruction that performs "d0 = op s0".
2120 sw s0, r_S0*-4(sp) # push s0
[all...] |
| /dalvik/vm/compiler/template/mips/ |
| H A D | TEMPLATE_RESTORE_STATE.S | 32 lw s0, r_S0*4(a0) # restore s0
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| H A D | TEMPLATE_SAVE_STATE.S | 44 sw s0, r_S0*4(a0) # save s0
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| H A D | TEMPLATE_MEM_OP_DECODE.S | 66 sw s0, r_S0*-4(sp) # push s0
113 lw s0, r_S0*-4(sp) # pop s0
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| H A D | header.S | 38 s0 rPC interpreted program counter, used for fetching instructions
112 #define rPC s0
358 STACK_STORE(s0, 116)
367 #define STACK_LOAD_S0() STACK_LOAD(s0, 116); \
376 STACK_STORE(s0, 116); \
393 STACK_LOAD(s0, 116); \
|
| /dalvik/vm/mterp/mips/ |
| H A D | header.S | 19 s0 rPC interpreted program counter, used for fetching instructions
28 #define rPC s0
294 STACK_STORE(s0, 116)
303 #define STACK_LOAD_S0() STACK_LOAD(s0, 116); \
312 STACK_STORE(s0, 116); \
329 STACK_LOAD(s0, 116); \
|
| /dalvik/vm/mterp/out/ |
| H A D | InterpAsm-armv5te-vfp.S | 46 s0-s15 (d0-d7, q0-a3) do not need to be.
52 VFP: single-precision results in s0, double-precision results in d0.
1249 flds s0, [r2] @ s0<- vBB
1251 fcmpes s0, s1 @ compare (vBB, vCC)
1288 flds s0, [r2] @ s0<- vBB
1290 fcmpes s0, s1 @ compare (vBB, vCC)
3580 * line that specifies an instruction that performs "s1 = op s0".
3588 flds s0, [r
[all...] |
| H A D | InterpAsm-armv7-a-neon.S | 46 s0-s15 (d0-d7, q0-a3) do not need to be.
52 VFP: single-precision results in s0, double-precision results in d0.
1259 flds s0, [r2] @ s0<- vBB
1261 fcmpes s0, s1 @ compare (vBB, vCC)
1298 flds s0, [r2] @ s0<- vBB
1300 fcmpes s0, s1 @ compare (vBB, vCC)
3577 * line that specifies an instruction that performs "s1 = op s0".
3585 flds s0, [r
[all...] |
| H A D | InterpAsm-armv7-a.S | 46 s0-s15 (d0-d7, q0-a3) do not need to be.
52 VFP: single-precision results in s0, double-precision results in d0.
1259 flds s0, [r2] @ s0<- vBB
1261 fcmpes s0, s1 @ compare (vBB, vCC)
1298 flds s0, [r2] @ s0<- vBB
1300 fcmpes s0, s1 @ compare (vBB, vCC)
3577 * line that specifies an instruction that performs "s1 = op s0".
3585 flds s0, [r
[all...] |
| H A D | InterpAsm-mips.S | 26 s0 rPC interpreted program counter, used for fetching instructions
35 #define rPC s0
301 STACK_STORE(s0, 116)
310 #define STACK_LOAD_S0() STACK_LOAD(s0, 116); \
319 STACK_STORE(s0, 116); \
336 STACK_LOAD(s0, 116); \
1643 and rOBJ, a0, 255 # s0 <- BB
1645 EAS2(rOBJ, rFP, rOBJ) # s0 <- &fp[BB]
1695 and rOBJ, a0, 255 # s0 <- BB
1697 EAS2(rOBJ, rFP, rOBJ) # s0 <
[all...] |
| /dalvik/vm/ |
| H A D | InlineNative.cpp | 30 extern "C" u4 __memcmp16(const u2* s0, const u2* s1, size_t count);
|
| /dalvik/libdex/ |
| H A D | DexSwapVerify.cpp | 568 const char* s0 = dexGetStringData(state->pDexFile, item0); local
570 if (dexUtf8Cmp(s0, s1) >= 0) {
571 ALOGE("Out-of-order string_ids: '%s' then '%s'", s0, s1);
|