1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __ASM_CPU_FEATURES_H
20#define __ASM_CPU_FEATURES_H
21#include <asm/cpu.h>
22#include <asm/cpu-info.h>
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24#include <cpu-feature-overrides.h>
25#ifndef current_cpu_type
26#define current_cpu_type() current_cpu_data.cputype
27#endif
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29#ifndef cpu_has_tlb
30#define cpu_has_tlb (cpu_data[0].options & MIPS_CPU_TLB)
31#endif
32#ifndef cpu_has_4kex
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34#define cpu_has_4kex (cpu_data[0].options & MIPS_CPU_4KEX)
35#endif
36#ifndef cpu_has_3k_cache
37#define cpu_has_3k_cache (cpu_data[0].options & MIPS_CPU_3K_CACHE)
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39#endif
40#define cpu_has_6k_cache 0
41#define cpu_has_8k_cache 0
42#ifndef cpu_has_4k_cache
43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44#define cpu_has_4k_cache (cpu_data[0].options & MIPS_CPU_4K_CACHE)
45#endif
46#ifndef cpu_has_tx39_cache
47#define cpu_has_tx39_cache (cpu_data[0].options & MIPS_CPU_TX39_CACHE)
48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49#endif
50#ifndef cpu_has_fpu
51#define cpu_has_fpu (current_cpu_data.options & MIPS_CPU_FPU)
52#define raw_cpu_has_fpu (raw_current_cpu_data.options & MIPS_CPU_FPU)
53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54#else
55#define raw_cpu_has_fpu cpu_has_fpu
56#endif
57#ifndef cpu_has_32fpr
58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59#define cpu_has_32fpr (cpu_data[0].options & MIPS_CPU_32FPR)
60#endif
61#ifndef cpu_has_counter
62#define cpu_has_counter (cpu_data[0].options & MIPS_CPU_COUNTER)
63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64#endif
65#ifndef cpu_has_watch
66#define cpu_has_watch (cpu_data[0].options & MIPS_CPU_WATCH)
67#endif
68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69#ifndef cpu_has_divec
70#define cpu_has_divec (cpu_data[0].options & MIPS_CPU_DIVEC)
71#endif
72#ifndef cpu_has_vce
73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74#define cpu_has_vce (cpu_data[0].options & MIPS_CPU_VCE)
75#endif
76#ifndef cpu_has_cache_cdex_p
77#define cpu_has_cache_cdex_p (cpu_data[0].options & MIPS_CPU_CACHE_CDEX_P)
78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79#endif
80#ifndef cpu_has_cache_cdex_s
81#define cpu_has_cache_cdex_s (cpu_data[0].options & MIPS_CPU_CACHE_CDEX_S)
82#endif
83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84#ifndef cpu_has_prefetch
85#define cpu_has_prefetch (cpu_data[0].options & MIPS_CPU_PREFETCH)
86#endif
87#ifndef cpu_has_mcheck
88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89#define cpu_has_mcheck (cpu_data[0].options & MIPS_CPU_MCHECK)
90#endif
91#ifndef cpu_has_ejtag
92#define cpu_has_ejtag (cpu_data[0].options & MIPS_CPU_EJTAG)
93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94#endif
95#ifndef cpu_has_llsc
96#define cpu_has_llsc (cpu_data[0].options & MIPS_CPU_LLSC)
97#endif
98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99#ifndef cpu_has_mips16
100#define cpu_has_mips16 (cpu_data[0].ases & MIPS_ASE_MIPS16)
101#endif
102#ifndef cpu_has_mdmx
103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104#define cpu_has_mdmx (cpu_data[0].ases & MIPS_ASE_MDMX)
105#endif
106#ifndef cpu_has_mips3d
107#define cpu_has_mips3d (cpu_data[0].ases & MIPS_ASE_MIPS3D)
108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109#endif
110#ifndef cpu_has_smartmips
111#define cpu_has_smartmips (cpu_data[0].ases & MIPS_ASE_SMARTMIPS)
112#endif
113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114#ifndef cpu_has_vtag_icache
115#define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
116#endif
117#ifndef cpu_has_dc_aliases
118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119#define cpu_has_dc_aliases (cpu_data[0].dcache.flags & MIPS_CACHE_ALIASES)
120#endif
121#ifndef cpu_has_ic_fills_f_dc
122#define cpu_has_ic_fills_f_dc (cpu_data[0].icache.flags & MIPS_CACHE_IC_F_DC)
123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124#endif
125#ifndef cpu_has_pindexed_dcache
126#define cpu_has_pindexed_dcache (cpu_data[0].dcache.flags & MIPS_CACHE_PINDEX)
127#endif
128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129#ifndef cpu_icache_snoops_remote_store
130#define cpu_icache_snoops_remote_store 1
131#endif
132#ifndef cpu_has_mips32r1
133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134#define cpu_has_mips32r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1)
135#endif
136#ifndef cpu_has_mips32r2
137#define cpu_has_mips32r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2)
138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139#endif
140#ifndef cpu_has_mips64r1
141#define cpu_has_mips64r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1)
142#endif
143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144#ifndef cpu_has_mips64r2
145#define cpu_has_mips64r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2)
146#endif
147#define cpu_has_mips32 (cpu_has_mips32r1 | cpu_has_mips32r2)
148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
149#define cpu_has_mips64 (cpu_has_mips64r1 | cpu_has_mips64r2)
150#define cpu_has_mips_r1 (cpu_has_mips32r1 | cpu_has_mips64r1)
151#define cpu_has_mips_r2 (cpu_has_mips32r2 | cpu_has_mips64r2)
152#ifndef cpu_has_dsp
153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
155#endif
156#ifndef cpu_has_mipsmt
157#define cpu_has_mipsmt (cpu_data[0].ases & MIPS_ASE_MIPSMT)
158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
159#endif
160#ifndef cpu_has_userlocal
161#define cpu_has_userlocal (cpu_data[0].options & MIPS_CPU_ULRI)
162#endif
163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
164#ifndef cpu_has_nofpuex
165#define cpu_has_nofpuex (cpu_data[0].options & MIPS_CPU_NOFPUEX)
166#endif
167#ifndef cpu_has_64bits
168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
169#define cpu_has_64bits (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT)
170#endif
171#ifndef cpu_has_64bit_zero_reg
172#define cpu_has_64bit_zero_reg (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT)
173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
174#endif
175#ifndef cpu_has_64bit_gp_regs
176#define cpu_has_64bit_gp_regs 0
177#endif
178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
179#ifndef cpu_has_64bit_addresses
180#define cpu_has_64bit_addresses 0
181#endif
182#ifndef cpu_has_vint
183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
184#define cpu_has_vint 0
185#endif
186#ifndef cpu_has_veic
187#define cpu_has_veic 0
188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
189#endif
190#ifndef cpu_has_inclusive_pcaches
191#define cpu_has_inclusive_pcaches (cpu_data[0].options & MIPS_CPU_INCLUSIVE_CACHES)
192#endif
193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
194#ifndef cpu_dcache_line_size
195#define cpu_dcache_line_size() cpu_data[0].dcache.linesz
196#endif
197#ifndef cpu_icache_line_size
198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
199#define cpu_icache_line_size() cpu_data[0].icache.linesz
200#endif
201#ifndef cpu_scache_line_size
202#define cpu_scache_line_size() cpu_data[0].scache.linesz
203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
204#endif
205#endif
206