fbinopWide.S revision a8b91c52fd8a90b784835dfe1f8898035266c4dd 
1%default {"preinstr":"", "chkzero":"0"}
2    /*
3     * Generic 64-bit binary operation.  Provide an "instr" line that
4     * specifies an instruction that performs "result = a0-a1 op a2-a3".
5     * This could be an MIPS instruction or a function call.
6     * If "chkzero" is set to 1, we perform a divide-by-zero check on
7     * vCC (a1).  Useful for integer division and modulus.
8     *
9     * for: add-long, sub-long, div-long, rem-long, and-long, or-long,
10     *      xor-long, add-double, sub-double, mul-double, div-double,
11     *      rem-double
12     *
13     * On entry:
14     *     a0 = target dalvik register address
15     *     a1 = op1 address
16     *     a2 = op2 address
17     *
18     * IMPORTANT: you may specify "chkzero" or "preinstr" but not both.
19     */
20    move rOBJ, a0                       # save a0
21#ifdef  SOFT_FLOAT
22    move t0, a1                         # save a1
23    move t1, a2                         # save a2
24    LOAD64(rARG0, rARG1, t0)            # a0/a1<- vBB/vBB+1
25    LOAD64(rARG2, rARG3, t1)            # a2/a3<- vCC/vCC+1
26    .if $chkzero
27    or          t0, rARG2, rARG3        # second arg (a2-a3) is zero?
28    beqz        t0, common_errDivideByZero
29    .endif
30    $preinstr                           # optional op
31    $instr                              # result<- op, a0-a3 changed
32    STORE64(rRESULT0, rRESULT1, rOBJ)
33#else
34    LOAD64_F(fa0, fa0f, a1)
35    LOAD64_F(fa1, fa1f, a2)
36    .if $chkzero
37    li.d        ft0, 0
38    c.eq.d      fcc0, fa1, ft0
39    bc1t        fcc0, common_errDivideByZero
40    .endif
41    $preinstr                           # optional op
42    $instr_f
43    STORE64_F(fv0, fv0f, rOBJ)
44#endif
45    RETURN
46