OP_MUL_LONG.S revision a8b91c52fd8a90b784835dfe1f8898035266c4dd 
1%verify "executed"
2    /*
3     * Signed 64-bit integer multiply.
4     *         a1   a0
5     *   x     a3   a2
6     *   -------------
7     *       a2a1 a2a0
8     *       a3a0
9     *  a3a1 (<= unused)
10     *  ---------------
11     *         v1   v0
12     */
13    /* mul-long vAA, vBB, vCC */
14    FETCH(a0, 1)                           #  a0 <- CCBB
15    and       t0, a0, 255                  #  a2 <- BB
16    srl       t1, a0, 8                    #  a3 <- CC
17    EAS2(t0, rFP, t0)                      #  t0 <- &fp[BB]
18    LOAD64(a0, a1, t0)                     #  a0/a1 <- vBB/vBB+1
19
20    EAS2(t1, rFP, t1)                      #  t0 <- &fp[CC]
21    LOAD64(a2, a3, t1)                     #  a2/a3 <- vCC/vCC+1
22
23    mul       v1, a3, a0                   #  v1= a3a0
24    multu     a2, a0
25    mfhi      t1
26    mflo      v0                           #  v0= a2a0
27    mul       t0, a2, a1                   #  t0= a2a1
28    addu      v1, v1, t1                   #  v1+= hi(a2a0)
29    addu      v1, v1, t0                   #  v1= a3a0 + a2a1;
30
31    GET_OPA(a0)                            #  a0 <- AA
32    EAS2(a0, rFP, a0)                      #  a0 <- &fp[A]
33    FETCH_ADVANCE_INST(2)                  #  advance rPC, load rINST
34    b         .L${opcode}_finish
35%break
36
37.L${opcode}_finish:
38    GET_INST_OPCODE(t0)                    #  extract opcode from rINST
39    STORE64(v0, v1, a0)                    #  vAA::vAA+1 <- v0(low) :: v1(high)
40    GOTO_OPCODE(t0)                        #  jump to next instruction
41
42