binflop.S revision a8b91c52fd8a90b784835dfe1f8898035266c4dd 
1%default {"preinstr":"", "chkzero":"0"}
2    /*
3     * Generic 32-bit binary float operation.
4     *
5     * For: add-fp, sub-fp, mul-fp, div-fp
6     */
7
8    /* binop vAA, vBB, vCC */
9    FETCH(a0, 1)                           #  a0 <- CCBB
10    GET_OPA(rOBJ)                          #  s5 <- AA
11    srl       a3, a0, 8                    #  a3 <- CC
12    and       a2, a0, 255                  #  a2 <- BB
13#ifdef SOFT_FLOAT
14    GET_VREG(a1, a3)                       #  a1 <- vCC
15    GET_VREG(a0, a2)                       #  a0 <- vBB
16    .if $chkzero
17    # is second operand zero?
18    beqz      a1, common_errDivideByZero
19    .endif
20#else
21    GET_VREG_F(fa1, a3)                    #  a1 <- vCC
22    GET_VREG_F(fa0, a2)                    #  a0 <- vBB
23
24    .if $chkzero
25    # is second operand zero?
26    li.s      ft0, 0
27    c.eq.s    fcc0, ft0, fa1               #  condition bit and comparision with 0
28    bc1t      fcc0, common_errDivideByZero
29    .endif
30#endif
31
32    FETCH_ADVANCE_INST(2)                  #  advance rPC, load rINST
33    $preinstr                              #  optional op
34#ifdef SOFT_FLOAT
35    $instr                                 #  v0 = result
36    SET_VREG(v0, rOBJ)                     #  vAA <- v0
37#else
38    $instr_f                               #  f0 = result
39    SET_VREG_F(fv0, rOBJ)                  #  vAA <- fv0
40#endif
41    GET_INST_OPCODE(t0)                    #  extract opcode from rINST
42    GOTO_OPCODE(t0)                        #  jump to next instruction
43    /* 11-14 instructions */
44
45