binflopWide2addr.S revision a8b91c52fd8a90b784835dfe1f8898035266c4dd 
1%default {"preinstr":"", "chkzero":"0"}
2    /*
3     * Generic 64-bit "/2addr" binary operation.  Provide an "instr" line
4     * that specifies an instruction that performs "result = a0-a1 op a2-a3".
5     * This could be an MIPS instruction or a function call.
6     * If "chkzero" is set to 1, we perform a divide-by-zero check on
7     * vCC (a1).  Useful for integer division and modulus.
8     *
9     * For: add-double/2addr, sub-double/2addr, mul-double/2addr,
10     *  div-double/2addr, rem-double/2addr
11     */
12    /* binop/2addr vA, vB */
13    GET_OPA4(rOBJ)                         #  rOBJ <- A+
14    GET_OPB(a1)                            #  a1 <- B
15    EAS2(a1, rFP, a1)                      #  a1 <- &fp[B]
16    EAS2(rOBJ, rFP, rOBJ)                  #  rOBJ <- &fp[A]
17#ifdef SOFT_FLOAT
18    LOAD64(rARG2, rARG3, a1)               #  a2/a3 <- vBB/vBB+1
19    LOAD64(rARG0, rARG1, rOBJ)             #  a0/a1 <- vAA/vAA+1
20    .if $chkzero
21    or        t0, rARG2, rARG3             #  second arg (a2-a3) is zero?
22    beqz      t0, common_errDivideByZero
23    .endif
24#else
25    LOAD64_F(fa0, fa0f, rOBJ)
26    LOAD64_F(fa1, fa1f, a1)
27    .if $chkzero
28    li.d      ft0, 0
29    c.eq.d    fcc0, fa1, ft0
30    bc1t      fcc0, common_errDivideByZero
31    .endif
32#endif
331:
34    FETCH_ADVANCE_INST(1)                  #  advance rPC, load rINST
35    $preinstr                              #  optional op
36#ifdef SOFT_FLOAT
37    $instr                                 #  result <- op, a0-a3 changed
38    STORE64(rRESULT0, rRESULT1, rOBJ)
39#else
40    $instr_f
41    STORE64_F(fv0, fv0f, rOBJ)
42#endif
43    GET_INST_OPCODE(t0)                    #  extract opcode from rINST
44    GOTO_OPCODE(t0)                        #  jump to next instruction
45    /* 12-15 instructions */
46
47