binopLit8.S revision a8b91c52fd8a90b784835dfe1f8898035266c4dd 
1%default {"preinstr":"", "result":"a0", "chkzero":"0"}
2    /*
3     * Generic 32-bit "lit8" binary operation.  Provide an "instr" line
4     * that specifies an instruction that performs "result = a0 op a1".
5     * This could be an MIPS instruction or a function call.  (If the result
6     * comes back in a register other than a0, you can override "result".)
7     *
8     * If "chkzero" is set to 1, we perform a divide-by-zero check on
9     * vCC (a1).  Useful for integer division and modulus.
10     *
11     * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8,
12     *      rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8,
13     *      shl-int/lit8, shr-int/lit8, ushr-int/lit8
14     */
15    # binop/lit8 vAA, vBB,                 /* +CC */
16    FETCH_S(a3, 1)                         #  a3 <- ssssCCBB (sign-extended for CC)
17    GET_OPA(rOBJ)                          #  rOBJ <- AA
18    and       a2, a3, 255                  #  a2 <- BB
19    GET_VREG(a0, a2)                       #  a0 <- vBB
20    sra       a1, a3, 8                    #  a1 <- ssssssCC (sign extended)
21    .if $chkzero
22    # is second operand zero?
23    beqz      a1, common_errDivideByZero
24    .endif
25    FETCH_ADVANCE_INST(2)                  #  advance rPC, load rINST
26
27    $preinstr                              #  optional op
28    $instr                                 #  $result <- op, a0-a3 changed
29    GET_INST_OPCODE(t0)                    #  extract opcode from rINST
30    SET_VREG_GOTO($result, rOBJ, t0)       #  vAA <- $result
31    /* 10-12 instructions */
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