InterpC-armv5te.cpp revision 75425b731c514bf90c985275d80aa7886727d83f
1/* 2 * This file was generated automatically by gen-mterp.py for 'armv5te'. 3 * 4 * --> DO NOT EDIT <-- 5 */ 6 7/* File: c/header.cpp */ 8/* 9 * Copyright (C) 2008 The Android Open Source Project 10 * 11 * Licensed under the Apache License, Version 2.0 (the "License"); 12 * you may not use this file except in compliance with the License. 13 * You may obtain a copy of the License at 14 * 15 * http://www.apache.org/licenses/LICENSE-2.0 16 * 17 * Unless required by applicable law or agreed to in writing, software 18 * distributed under the License is distributed on an "AS IS" BASIS, 19 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 * See the License for the specific language governing permissions and 21 * limitations under the License. 22 */ 23 24/* common includes */ 25#include "Dalvik.h" 26#include "interp/InterpDefs.h" 27#include "mterp/Mterp.h" 28#include <math.h> // needed for fmod, fmodf 29#include "mterp/common/FindInterface.h" 30 31/* 32 * Configuration defines. These affect the C implementations, i.e. the 33 * portable interpreter(s) and C stubs. 34 * 35 * Some defines are controlled by the Makefile, e.g.: 36 * WITH_INSTR_CHECKS 37 * WITH_TRACKREF_CHECKS 38 * EASY_GDB 39 * NDEBUG 40 */ 41 42#ifdef WITH_INSTR_CHECKS /* instruction-level paranoia (slow!) */ 43# define CHECK_BRANCH_OFFSETS 44# define CHECK_REGISTER_INDICES 45#endif 46 47/* 48 * Some architectures require 64-bit alignment for access to 64-bit data 49 * types. We can't just use pointers to copy 64-bit values out of our 50 * interpreted register set, because gcc may assume the pointer target is 51 * aligned and generate invalid code. 52 * 53 * There are two common approaches: 54 * (1) Use a union that defines a 32-bit pair and a 64-bit value. 55 * (2) Call memcpy(). 56 * 57 * Depending upon what compiler you're using and what options are specified, 58 * one may be faster than the other. For example, the compiler might 59 * convert a memcpy() of 8 bytes into a series of instructions and omit 60 * the call. The union version could cause some strange side-effects, 61 * e.g. for a while ARM gcc thought it needed separate storage for each 62 * inlined instance, and generated instructions to zero out ~700 bytes of 63 * stack space at the top of the interpreter. 64 * 65 * The default is to use memcpy(). The current gcc for ARM seems to do 66 * better with the union. 67 */ 68#if defined(__ARM_EABI__) 69# define NO_UNALIGN_64__UNION 70#endif 71 72 73//#define LOG_INSTR /* verbose debugging */ 74/* set and adjust ANDROID_LOG_TAGS='*:i jdwp:i dalvikvm:i dalvikvmi:i' */ 75 76/* 77 * Export another copy of the PC on every instruction; this is largely 78 * redundant with EXPORT_PC and the debugger code. This value can be 79 * compared against what we have stored on the stack with EXPORT_PC to 80 * help ensure that we aren't missing any export calls. 81 */ 82#if WITH_EXTRA_GC_CHECKS > 1 83# define EXPORT_EXTRA_PC() (self->currentPc2 = pc) 84#else 85# define EXPORT_EXTRA_PC() 86#endif 87 88/* 89 * Adjust the program counter. "_offset" is a signed int, in 16-bit units. 90 * 91 * Assumes the existence of "const u2* pc" and "const u2* curMethod->insns". 92 * 93 * We don't advance the program counter until we finish an instruction or 94 * branch, because we do want to have to unroll the PC if there's an 95 * exception. 96 */ 97#ifdef CHECK_BRANCH_OFFSETS 98# define ADJUST_PC(_offset) do { \ 99 int myoff = _offset; /* deref only once */ \ 100 if (pc + myoff < curMethod->insns || \ 101 pc + myoff >= curMethod->insns + dvmGetMethodInsnsSize(curMethod)) \ 102 { \ 103 char* desc; \ 104 desc = dexProtoCopyMethodDescriptor(&curMethod->prototype); \ 105 LOGE("Invalid branch %d at 0x%04x in %s.%s %s", \ 106 myoff, (int) (pc - curMethod->insns), \ 107 curMethod->clazz->descriptor, curMethod->name, desc); \ 108 free(desc); \ 109 dvmAbort(); \ 110 } \ 111 pc += myoff; \ 112 EXPORT_EXTRA_PC(); \ 113 } while (false) 114#else 115# define ADJUST_PC(_offset) do { \ 116 pc += _offset; \ 117 EXPORT_EXTRA_PC(); \ 118 } while (false) 119#endif 120 121/* 122 * If enabled, log instructions as we execute them. 123 */ 124#ifdef LOG_INSTR 125# define ILOGD(...) ILOG(LOG_DEBUG, __VA_ARGS__) 126# define ILOGV(...) ILOG(LOG_VERBOSE, __VA_ARGS__) 127# define ILOG(_level, ...) do { \ 128 char debugStrBuf[128]; \ 129 snprintf(debugStrBuf, sizeof(debugStrBuf), __VA_ARGS__); \ 130 if (curMethod != NULL) \ 131 LOG(_level, LOG_TAG"i", "%-2d|%04x%s", \ 132 self->threadId, (int)(pc - curMethod->insns), debugStrBuf); \ 133 else \ 134 LOG(_level, LOG_TAG"i", "%-2d|####%s", \ 135 self->threadId, debugStrBuf); \ 136 } while(false) 137void dvmDumpRegs(const Method* method, const u4* framePtr, bool inOnly); 138# define DUMP_REGS(_meth, _frame, _inOnly) dvmDumpRegs(_meth, _frame, _inOnly) 139static const char kSpacing[] = " "; 140#else 141# define ILOGD(...) ((void)0) 142# define ILOGV(...) ((void)0) 143# define DUMP_REGS(_meth, _frame, _inOnly) ((void)0) 144#endif 145 146/* get a long from an array of u4 */ 147static inline s8 getLongFromArray(const u4* ptr, int idx) 148{ 149#if defined(NO_UNALIGN_64__UNION) 150 union { s8 ll; u4 parts[2]; } conv; 151 152 ptr += idx; 153 conv.parts[0] = ptr[0]; 154 conv.parts[1] = ptr[1]; 155 return conv.ll; 156#else 157 s8 val; 158 memcpy(&val, &ptr[idx], 8); 159 return val; 160#endif 161} 162 163/* store a long into an array of u4 */ 164static inline void putLongToArray(u4* ptr, int idx, s8 val) 165{ 166#if defined(NO_UNALIGN_64__UNION) 167 union { s8 ll; u4 parts[2]; } conv; 168 169 ptr += idx; 170 conv.ll = val; 171 ptr[0] = conv.parts[0]; 172 ptr[1] = conv.parts[1]; 173#else 174 memcpy(&ptr[idx], &val, 8); 175#endif 176} 177 178/* get a double from an array of u4 */ 179static inline double getDoubleFromArray(const u4* ptr, int idx) 180{ 181#if defined(NO_UNALIGN_64__UNION) 182 union { double d; u4 parts[2]; } conv; 183 184 ptr += idx; 185 conv.parts[0] = ptr[0]; 186 conv.parts[1] = ptr[1]; 187 return conv.d; 188#else 189 double dval; 190 memcpy(&dval, &ptr[idx], 8); 191 return dval; 192#endif 193} 194 195/* store a double into an array of u4 */ 196static inline void putDoubleToArray(u4* ptr, int idx, double dval) 197{ 198#if defined(NO_UNALIGN_64__UNION) 199 union { double d; u4 parts[2]; } conv; 200 201 ptr += idx; 202 conv.d = dval; 203 ptr[0] = conv.parts[0]; 204 ptr[1] = conv.parts[1]; 205#else 206 memcpy(&ptr[idx], &dval, 8); 207#endif 208} 209 210/* 211 * If enabled, validate the register number on every access. Otherwise, 212 * just do an array access. 213 * 214 * Assumes the existence of "u4* fp". 215 * 216 * "_idx" may be referenced more than once. 217 */ 218#ifdef CHECK_REGISTER_INDICES 219# define GET_REGISTER(_idx) \ 220 ( (_idx) < curMethod->registersSize ? \ 221 (fp[(_idx)]) : (assert(!"bad reg"),1969) ) 222# define SET_REGISTER(_idx, _val) \ 223 ( (_idx) < curMethod->registersSize ? \ 224 (fp[(_idx)] = (u4)(_val)) : (assert(!"bad reg"),1969) ) 225# define GET_REGISTER_AS_OBJECT(_idx) ((Object *)GET_REGISTER(_idx)) 226# define SET_REGISTER_AS_OBJECT(_idx, _val) SET_REGISTER(_idx, (s4)_val) 227# define GET_REGISTER_INT(_idx) ((s4) GET_REGISTER(_idx)) 228# define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val) 229# define GET_REGISTER_WIDE(_idx) \ 230 ( (_idx) < curMethod->registersSize-1 ? \ 231 getLongFromArray(fp, (_idx)) : (assert(!"bad reg"),1969) ) 232# define SET_REGISTER_WIDE(_idx, _val) \ 233 ( (_idx) < curMethod->registersSize-1 ? \ 234 (void)putLongToArray(fp, (_idx), (_val)) : assert(!"bad reg") ) 235# define GET_REGISTER_FLOAT(_idx) \ 236 ( (_idx) < curMethod->registersSize ? \ 237 (*((float*) &fp[(_idx)])) : (assert(!"bad reg"),1969.0f) ) 238# define SET_REGISTER_FLOAT(_idx, _val) \ 239 ( (_idx) < curMethod->registersSize ? \ 240 (*((float*) &fp[(_idx)]) = (_val)) : (assert(!"bad reg"),1969.0f) ) 241# define GET_REGISTER_DOUBLE(_idx) \ 242 ( (_idx) < curMethod->registersSize-1 ? \ 243 getDoubleFromArray(fp, (_idx)) : (assert(!"bad reg"),1969.0) ) 244# define SET_REGISTER_DOUBLE(_idx, _val) \ 245 ( (_idx) < curMethod->registersSize-1 ? \ 246 (void)putDoubleToArray(fp, (_idx), (_val)) : assert(!"bad reg") ) 247#else 248# define GET_REGISTER(_idx) (fp[(_idx)]) 249# define SET_REGISTER(_idx, _val) (fp[(_idx)] = (_val)) 250# define GET_REGISTER_AS_OBJECT(_idx) ((Object*) fp[(_idx)]) 251# define SET_REGISTER_AS_OBJECT(_idx, _val) (fp[(_idx)] = (u4)(_val)) 252# define GET_REGISTER_INT(_idx) ((s4)GET_REGISTER(_idx)) 253# define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val) 254# define GET_REGISTER_WIDE(_idx) getLongFromArray(fp, (_idx)) 255# define SET_REGISTER_WIDE(_idx, _val) putLongToArray(fp, (_idx), (_val)) 256# define GET_REGISTER_FLOAT(_idx) (*((float*) &fp[(_idx)])) 257# define SET_REGISTER_FLOAT(_idx, _val) (*((float*) &fp[(_idx)]) = (_val)) 258# define GET_REGISTER_DOUBLE(_idx) getDoubleFromArray(fp, (_idx)) 259# define SET_REGISTER_DOUBLE(_idx, _val) putDoubleToArray(fp, (_idx), (_val)) 260#endif 261 262/* 263 * Get 16 bits from the specified offset of the program counter. We always 264 * want to load 16 bits at a time from the instruction stream -- it's more 265 * efficient than 8 and won't have the alignment problems that 32 might. 266 * 267 * Assumes existence of "const u2* pc". 268 */ 269#define FETCH(_offset) (pc[(_offset)]) 270 271/* 272 * Extract instruction byte from 16-bit fetch (_inst is a u2). 273 */ 274#define INST_INST(_inst) ((_inst) & 0xff) 275 276/* 277 * Replace the opcode (used when handling breakpoints). _opcode is a u1. 278 */ 279#define INST_REPLACE_OP(_inst, _opcode) (((_inst) & 0xff00) | _opcode) 280 281/* 282 * Extract the "vA, vB" 4-bit registers from the instruction word (_inst is u2). 283 */ 284#define INST_A(_inst) (((_inst) >> 8) & 0x0f) 285#define INST_B(_inst) ((_inst) >> 12) 286 287/* 288 * Get the 8-bit "vAA" 8-bit register index from the instruction word. 289 * (_inst is u2) 290 */ 291#define INST_AA(_inst) ((_inst) >> 8) 292 293/* 294 * The current PC must be available to Throwable constructors, e.g. 295 * those created by the various exception throw routines, so that the 296 * exception stack trace can be generated correctly. If we don't do this, 297 * the offset within the current method won't be shown correctly. See the 298 * notes in Exception.c. 299 * 300 * This is also used to determine the address for precise GC. 301 * 302 * Assumes existence of "u4* fp" and "const u2* pc". 303 */ 304#define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc) 305 306/* 307 * Check to see if "obj" is NULL. If so, throw an exception. Assumes the 308 * pc has already been exported to the stack. 309 * 310 * Perform additional checks on debug builds. 311 * 312 * Use this to check for NULL when the instruction handler calls into 313 * something that could throw an exception (so we have already called 314 * EXPORT_PC at the top). 315 */ 316static inline bool checkForNull(Object* obj) 317{ 318 if (obj == NULL) { 319 dvmThrowNullPointerException(NULL); 320 return false; 321 } 322#ifdef WITH_EXTRA_OBJECT_VALIDATION 323 if (!dvmIsHeapAddressObject(obj)) { 324 LOGE("Invalid object %p", obj); 325 dvmAbort(); 326 } 327#endif 328#ifndef NDEBUG 329 if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) { 330 /* probable heap corruption */ 331 LOGE("Invalid object class %p (in %p)", obj->clazz, obj); 332 dvmAbort(); 333 } 334#endif 335 return true; 336} 337 338/* 339 * Check to see if "obj" is NULL. If so, export the PC into the stack 340 * frame and throw an exception. 341 * 342 * Perform additional checks on debug builds. 343 * 344 * Use this to check for NULL when the instruction handler doesn't do 345 * anything else that can throw an exception. 346 */ 347static inline bool checkForNullExportPC(Object* obj, u4* fp, const u2* pc) 348{ 349 if (obj == NULL) { 350 EXPORT_PC(); 351 dvmThrowNullPointerException(NULL); 352 return false; 353 } 354#ifdef WITH_EXTRA_OBJECT_VALIDATION 355 if (!dvmIsHeapAddress(obj)) { 356 LOGE("Invalid object %p", obj); 357 dvmAbort(); 358 } 359#endif 360#ifndef NDEBUG 361 if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) { 362 /* probable heap corruption */ 363 LOGE("Invalid object class %p (in %p)", obj->clazz, obj); 364 dvmAbort(); 365 } 366#endif 367 return true; 368} 369 370/* File: cstubs/stubdefs.cpp */ 371/* 372 * In the C mterp stubs, "goto" is a function call followed immediately 373 * by a return. 374 */ 375 376#define GOTO_TARGET_DECL(_target, ...) \ 377 extern "C" void dvmMterp_##_target(Thread* self, ## __VA_ARGS__); 378 379/* (void)xxx to quiet unused variable compiler warnings. */ 380#define GOTO_TARGET(_target, ...) \ 381 void dvmMterp_##_target(Thread* self, ## __VA_ARGS__) { \ 382 u2 ref, vsrc1, vsrc2, vdst; \ 383 u2 inst = FETCH(0); \ 384 const Method* methodToCall; \ 385 StackSaveArea* debugSaveArea; \ 386 (void)ref; (void)vsrc1; (void)vsrc2; (void)vdst; (void)inst; \ 387 (void)methodToCall; (void)debugSaveArea; 388 389#define GOTO_TARGET_END } 390 391/* 392 * Redefine what used to be local variable accesses into Thread struct 393 * references. (These are undefined down in "footer.cpp".) 394 */ 395#define retval self->interpSave.retval 396#define pc self->interpSave.pc 397#define fp self->interpSave.curFrame 398#define curMethod self->interpSave.method 399#define methodClassDex self->interpSave.methodClassDex 400#define debugTrackedRefStart self->interpSave.debugTrackedRefStart 401 402/* ugh */ 403#define STUB_HACK(x) x 404#if defined(WITH_JIT) 405#define JIT_STUB_HACK(x) x 406#else 407#define JIT_STUB_HACK(x) 408#endif 409 410/* 411 * InterpSave's pc and fp must be valid when breaking out to a 412 * "Reportxxx" routine. Because the portable interpreter uses local 413 * variables for these, we must flush prior. Stubs, however, use 414 * the interpSave vars directly, so this is a nop for stubs. 415 */ 416#define PC_FP_TO_SELF() 417#define PC_TO_SELF() 418 419/* 420 * Opcode handler framing macros. Here, each opcode is a separate function 421 * that takes a "self" argument and returns void. We can't declare 422 * these "static" because they may be called from an assembly stub. 423 * (void)xxx to quiet unused variable compiler warnings. 424 */ 425#define HANDLE_OPCODE(_op) \ 426 extern "C" void dvmMterp_##_op(Thread* self); \ 427 void dvmMterp_##_op(Thread* self) { \ 428 u4 ref; \ 429 u2 vsrc1, vsrc2, vdst; \ 430 u2 inst = FETCH(0); \ 431 (void)ref; (void)vsrc1; (void)vsrc2; (void)vdst; (void)inst; 432 433#define OP_END } 434 435/* 436 * Like the "portable" FINISH, but don't reload "inst", and return to caller 437 * when done. Further, debugger/profiler checks are handled 438 * before handler execution in mterp, so we don't do them here either. 439 */ 440#if defined(WITH_JIT) 441#define FINISH(_offset) { \ 442 ADJUST_PC(_offset); \ 443 if (self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) { \ 444 dvmCheckJit(pc, self); \ 445 } \ 446 return; \ 447 } 448#else 449#define FINISH(_offset) { \ 450 ADJUST_PC(_offset); \ 451 return; \ 452 } 453#endif 454 455#define FINISH_BKPT(_opcode) /* FIXME? */ 456#define DISPATCH_EXTENDED(_opcode) /* FIXME? */ 457 458/* 459 * The "goto label" statements turn into function calls followed by 460 * return statements. Some of the functions take arguments, which in the 461 * portable interpreter are handled by assigning values to globals. 462 */ 463 464#define GOTO_exceptionThrown() \ 465 do { \ 466 dvmMterp_exceptionThrown(self); \ 467 return; \ 468 } while(false) 469 470#define GOTO_returnFromMethod() \ 471 do { \ 472 dvmMterp_returnFromMethod(self); \ 473 return; \ 474 } while(false) 475 476#define GOTO_invoke(_target, _methodCallRange, _jumboFormat) \ 477 do { \ 478 dvmMterp_##_target(self, _methodCallRange, _jumboFormat); \ 479 return; \ 480 } while(false) 481 482#define GOTO_invokeMethod(_methodCallRange, _methodToCall, _vsrc1, _vdst) \ 483 do { \ 484 dvmMterp_invokeMethod(self, _methodCallRange, _methodToCall, \ 485 _vsrc1, _vdst); \ 486 return; \ 487 } while(false) 488 489/* 490 * As a special case, "goto bail" turns into a longjmp. 491 */ 492#define GOTO_bail() \ 493 dvmMterpStdBail(self) 494 495/* 496 * Periodically check for thread suspension. 497 * 498 * While we're at it, see if a debugger has attached or the profiler has 499 * started. 500 */ 501#define PERIODIC_CHECKS(_pcadj) { \ 502 if (dvmCheckSuspendQuick(self)) { \ 503 EXPORT_PC(); /* need for precise GC */ \ 504 dvmCheckSuspendPending(self); \ 505 } \ 506 } 507 508/* File: c/opcommon.cpp */ 509/* forward declarations of goto targets */ 510GOTO_TARGET_DECL(filledNewArray, bool methodCallRange, bool jumboFormat); 511GOTO_TARGET_DECL(invokeVirtual, bool methodCallRange, bool jumboFormat); 512GOTO_TARGET_DECL(invokeSuper, bool methodCallRange, bool jumboFormat); 513GOTO_TARGET_DECL(invokeInterface, bool methodCallRange, bool jumboFormat); 514GOTO_TARGET_DECL(invokeDirect, bool methodCallRange, bool jumboFormat); 515GOTO_TARGET_DECL(invokeStatic, bool methodCallRange, bool jumboFormat); 516GOTO_TARGET_DECL(invokeVirtualQuick, bool methodCallRange, bool jumboFormat); 517GOTO_TARGET_DECL(invokeSuperQuick, bool methodCallRange, bool jumboFormat); 518GOTO_TARGET_DECL(invokeMethod, bool methodCallRange, const Method* methodToCall, 519 u2 count, u2 regs); 520GOTO_TARGET_DECL(returnFromMethod); 521GOTO_TARGET_DECL(exceptionThrown); 522 523/* 524 * =========================================================================== 525 * 526 * What follows are opcode definitions shared between multiple opcodes with 527 * minor substitutions handled by the C pre-processor. These should probably 528 * use the mterp substitution mechanism instead, with the code here moved 529 * into common fragment files (like the asm "binop.S"), although it's hard 530 * to give up the C preprocessor in favor of the much simpler text subst. 531 * 532 * =========================================================================== 533 */ 534 535#define HANDLE_NUMCONV(_opcode, _opname, _fromtype, _totype) \ 536 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 537 vdst = INST_A(inst); \ 538 vsrc1 = INST_B(inst); \ 539 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \ 540 SET_REGISTER##_totype(vdst, \ 541 GET_REGISTER##_fromtype(vsrc1)); \ 542 FINISH(1); 543 544#define HANDLE_FLOAT_TO_INT(_opcode, _opname, _fromvtype, _fromrtype, \ 545 _tovtype, _tortype) \ 546 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 547 { \ 548 /* spec defines specific handling for +/- inf and NaN values */ \ 549 _fromvtype val; \ 550 _tovtype intMin, intMax, result; \ 551 vdst = INST_A(inst); \ 552 vsrc1 = INST_B(inst); \ 553 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \ 554 val = GET_REGISTER##_fromrtype(vsrc1); \ 555 intMin = (_tovtype) 1 << (sizeof(_tovtype) * 8 -1); \ 556 intMax = ~intMin; \ 557 result = (_tovtype) val; \ 558 if (val >= intMax) /* +inf */ \ 559 result = intMax; \ 560 else if (val <= intMin) /* -inf */ \ 561 result = intMin; \ 562 else if (val != val) /* NaN */ \ 563 result = 0; \ 564 else \ 565 result = (_tovtype) val; \ 566 SET_REGISTER##_tortype(vdst, result); \ 567 } \ 568 FINISH(1); 569 570#define HANDLE_INT_TO_SMALL(_opcode, _opname, _type) \ 571 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 572 vdst = INST_A(inst); \ 573 vsrc1 = INST_B(inst); \ 574 ILOGV("|int-to-%s v%d,v%d", (_opname), vdst, vsrc1); \ 575 SET_REGISTER(vdst, (_type) GET_REGISTER(vsrc1)); \ 576 FINISH(1); 577 578/* NOTE: the comparison result is always a signed 4-byte integer */ 579#define HANDLE_OP_CMPX(_opcode, _opname, _varType, _type, _nanVal) \ 580 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 581 { \ 582 int result; \ 583 u2 regs; \ 584 _varType val1, val2; \ 585 vdst = INST_AA(inst); \ 586 regs = FETCH(1); \ 587 vsrc1 = regs & 0xff; \ 588 vsrc2 = regs >> 8; \ 589 ILOGV("|cmp%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 590 val1 = GET_REGISTER##_type(vsrc1); \ 591 val2 = GET_REGISTER##_type(vsrc2); \ 592 if (val1 == val2) \ 593 result = 0; \ 594 else if (val1 < val2) \ 595 result = -1; \ 596 else if (val1 > val2) \ 597 result = 1; \ 598 else \ 599 result = (_nanVal); \ 600 ILOGV("+ result=%d", result); \ 601 SET_REGISTER(vdst, result); \ 602 } \ 603 FINISH(2); 604 605#define HANDLE_OP_IF_XX(_opcode, _opname, _cmp) \ 606 HANDLE_OPCODE(_opcode /*vA, vB, +CCCC*/) \ 607 vsrc1 = INST_A(inst); \ 608 vsrc2 = INST_B(inst); \ 609 if ((s4) GET_REGISTER(vsrc1) _cmp (s4) GET_REGISTER(vsrc2)) { \ 610 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 611 ILOGV("|if-%s v%d,v%d,+0x%04x", (_opname), vsrc1, vsrc2, \ 612 branchOffset); \ 613 ILOGV("> branch taken"); \ 614 if (branchOffset < 0) \ 615 PERIODIC_CHECKS(branchOffset); \ 616 FINISH(branchOffset); \ 617 } else { \ 618 ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \ 619 FINISH(2); \ 620 } 621 622#define HANDLE_OP_IF_XXZ(_opcode, _opname, _cmp) \ 623 HANDLE_OPCODE(_opcode /*vAA, +BBBB*/) \ 624 vsrc1 = INST_AA(inst); \ 625 if ((s4) GET_REGISTER(vsrc1) _cmp 0) { \ 626 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 627 ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \ 628 ILOGV("> branch taken"); \ 629 if (branchOffset < 0) \ 630 PERIODIC_CHECKS(branchOffset); \ 631 FINISH(branchOffset); \ 632 } else { \ 633 ILOGV("|if-%s v%d,-", (_opname), vsrc1); \ 634 FINISH(2); \ 635 } 636 637#define HANDLE_UNOP(_opcode, _opname, _pfx, _sfx, _type) \ 638 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 639 vdst = INST_A(inst); \ 640 vsrc1 = INST_B(inst); \ 641 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \ 642 SET_REGISTER##_type(vdst, _pfx GET_REGISTER##_type(vsrc1) _sfx); \ 643 FINISH(1); 644 645#define HANDLE_OP_X_INT(_opcode, _opname, _op, _chkdiv) \ 646 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 647 { \ 648 u2 srcRegs; \ 649 vdst = INST_AA(inst); \ 650 srcRegs = FETCH(1); \ 651 vsrc1 = srcRegs & 0xff; \ 652 vsrc2 = srcRegs >> 8; \ 653 ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \ 654 if (_chkdiv != 0) { \ 655 s4 firstVal, secondVal, result; \ 656 firstVal = GET_REGISTER(vsrc1); \ 657 secondVal = GET_REGISTER(vsrc2); \ 658 if (secondVal == 0) { \ 659 EXPORT_PC(); \ 660 dvmThrowArithmeticException("divide by zero"); \ 661 GOTO_exceptionThrown(); \ 662 } \ 663 if ((u4)firstVal == 0x80000000 && secondVal == -1) { \ 664 if (_chkdiv == 1) \ 665 result = firstVal; /* division */ \ 666 else \ 667 result = 0; /* remainder */ \ 668 } else { \ 669 result = firstVal _op secondVal; \ 670 } \ 671 SET_REGISTER(vdst, result); \ 672 } else { \ 673 /* non-div/rem case */ \ 674 SET_REGISTER(vdst, \ 675 (s4) GET_REGISTER(vsrc1) _op (s4) GET_REGISTER(vsrc2)); \ 676 } \ 677 } \ 678 FINISH(2); 679 680#define HANDLE_OP_SHX_INT(_opcode, _opname, _cast, _op) \ 681 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 682 { \ 683 u2 srcRegs; \ 684 vdst = INST_AA(inst); \ 685 srcRegs = FETCH(1); \ 686 vsrc1 = srcRegs & 0xff; \ 687 vsrc2 = srcRegs >> 8; \ 688 ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \ 689 SET_REGISTER(vdst, \ 690 _cast GET_REGISTER(vsrc1) _op (GET_REGISTER(vsrc2) & 0x1f)); \ 691 } \ 692 FINISH(2); 693 694#define HANDLE_OP_X_INT_LIT16(_opcode, _opname, _op, _chkdiv) \ 695 HANDLE_OPCODE(_opcode /*vA, vB, #+CCCC*/) \ 696 vdst = INST_A(inst); \ 697 vsrc1 = INST_B(inst); \ 698 vsrc2 = FETCH(1); \ 699 ILOGV("|%s-int/lit16 v%d,v%d,#+0x%04x", \ 700 (_opname), vdst, vsrc1, vsrc2); \ 701 if (_chkdiv != 0) { \ 702 s4 firstVal, result; \ 703 firstVal = GET_REGISTER(vsrc1); \ 704 if ((s2) vsrc2 == 0) { \ 705 EXPORT_PC(); \ 706 dvmThrowArithmeticException("divide by zero"); \ 707 GOTO_exceptionThrown(); \ 708 } \ 709 if ((u4)firstVal == 0x80000000 && ((s2) vsrc2) == -1) { \ 710 /* won't generate /lit16 instr for this; check anyway */ \ 711 if (_chkdiv == 1) \ 712 result = firstVal; /* division */ \ 713 else \ 714 result = 0; /* remainder */ \ 715 } else { \ 716 result = firstVal _op (s2) vsrc2; \ 717 } \ 718 SET_REGISTER(vdst, result); \ 719 } else { \ 720 /* non-div/rem case */ \ 721 SET_REGISTER(vdst, GET_REGISTER(vsrc1) _op (s2) vsrc2); \ 722 } \ 723 FINISH(2); 724 725#define HANDLE_OP_X_INT_LIT8(_opcode, _opname, _op, _chkdiv) \ 726 HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \ 727 { \ 728 u2 litInfo; \ 729 vdst = INST_AA(inst); \ 730 litInfo = FETCH(1); \ 731 vsrc1 = litInfo & 0xff; \ 732 vsrc2 = litInfo >> 8; /* constant */ \ 733 ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \ 734 (_opname), vdst, vsrc1, vsrc2); \ 735 if (_chkdiv != 0) { \ 736 s4 firstVal, result; \ 737 firstVal = GET_REGISTER(vsrc1); \ 738 if ((s1) vsrc2 == 0) { \ 739 EXPORT_PC(); \ 740 dvmThrowArithmeticException("divide by zero"); \ 741 GOTO_exceptionThrown(); \ 742 } \ 743 if ((u4)firstVal == 0x80000000 && ((s1) vsrc2) == -1) { \ 744 if (_chkdiv == 1) \ 745 result = firstVal; /* division */ \ 746 else \ 747 result = 0; /* remainder */ \ 748 } else { \ 749 result = firstVal _op ((s1) vsrc2); \ 750 } \ 751 SET_REGISTER(vdst, result); \ 752 } else { \ 753 SET_REGISTER(vdst, \ 754 (s4) GET_REGISTER(vsrc1) _op (s1) vsrc2); \ 755 } \ 756 } \ 757 FINISH(2); 758 759#define HANDLE_OP_SHX_INT_LIT8(_opcode, _opname, _cast, _op) \ 760 HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \ 761 { \ 762 u2 litInfo; \ 763 vdst = INST_AA(inst); \ 764 litInfo = FETCH(1); \ 765 vsrc1 = litInfo & 0xff; \ 766 vsrc2 = litInfo >> 8; /* constant */ \ 767 ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \ 768 (_opname), vdst, vsrc1, vsrc2); \ 769 SET_REGISTER(vdst, \ 770 _cast GET_REGISTER(vsrc1) _op (vsrc2 & 0x1f)); \ 771 } \ 772 FINISH(2); 773 774#define HANDLE_OP_X_INT_2ADDR(_opcode, _opname, _op, _chkdiv) \ 775 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 776 vdst = INST_A(inst); \ 777 vsrc1 = INST_B(inst); \ 778 ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \ 779 if (_chkdiv != 0) { \ 780 s4 firstVal, secondVal, result; \ 781 firstVal = GET_REGISTER(vdst); \ 782 secondVal = GET_REGISTER(vsrc1); \ 783 if (secondVal == 0) { \ 784 EXPORT_PC(); \ 785 dvmThrowArithmeticException("divide by zero"); \ 786 GOTO_exceptionThrown(); \ 787 } \ 788 if ((u4)firstVal == 0x80000000 && secondVal == -1) { \ 789 if (_chkdiv == 1) \ 790 result = firstVal; /* division */ \ 791 else \ 792 result = 0; /* remainder */ \ 793 } else { \ 794 result = firstVal _op secondVal; \ 795 } \ 796 SET_REGISTER(vdst, result); \ 797 } else { \ 798 SET_REGISTER(vdst, \ 799 (s4) GET_REGISTER(vdst) _op (s4) GET_REGISTER(vsrc1)); \ 800 } \ 801 FINISH(1); 802 803#define HANDLE_OP_SHX_INT_2ADDR(_opcode, _opname, _cast, _op) \ 804 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 805 vdst = INST_A(inst); \ 806 vsrc1 = INST_B(inst); \ 807 ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \ 808 SET_REGISTER(vdst, \ 809 _cast GET_REGISTER(vdst) _op (GET_REGISTER(vsrc1) & 0x1f)); \ 810 FINISH(1); 811 812#define HANDLE_OP_X_LONG(_opcode, _opname, _op, _chkdiv) \ 813 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 814 { \ 815 u2 srcRegs; \ 816 vdst = INST_AA(inst); \ 817 srcRegs = FETCH(1); \ 818 vsrc1 = srcRegs & 0xff; \ 819 vsrc2 = srcRegs >> 8; \ 820 ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 821 if (_chkdiv != 0) { \ 822 s8 firstVal, secondVal, result; \ 823 firstVal = GET_REGISTER_WIDE(vsrc1); \ 824 secondVal = GET_REGISTER_WIDE(vsrc2); \ 825 if (secondVal == 0LL) { \ 826 EXPORT_PC(); \ 827 dvmThrowArithmeticException("divide by zero"); \ 828 GOTO_exceptionThrown(); \ 829 } \ 830 if ((u8)firstVal == 0x8000000000000000ULL && \ 831 secondVal == -1LL) \ 832 { \ 833 if (_chkdiv == 1) \ 834 result = firstVal; /* division */ \ 835 else \ 836 result = 0; /* remainder */ \ 837 } else { \ 838 result = firstVal _op secondVal; \ 839 } \ 840 SET_REGISTER_WIDE(vdst, result); \ 841 } else { \ 842 SET_REGISTER_WIDE(vdst, \ 843 (s8) GET_REGISTER_WIDE(vsrc1) _op (s8) GET_REGISTER_WIDE(vsrc2)); \ 844 } \ 845 } \ 846 FINISH(2); 847 848#define HANDLE_OP_SHX_LONG(_opcode, _opname, _cast, _op) \ 849 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 850 { \ 851 u2 srcRegs; \ 852 vdst = INST_AA(inst); \ 853 srcRegs = FETCH(1); \ 854 vsrc1 = srcRegs & 0xff; \ 855 vsrc2 = srcRegs >> 8; \ 856 ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 857 SET_REGISTER_WIDE(vdst, \ 858 _cast GET_REGISTER_WIDE(vsrc1) _op (GET_REGISTER(vsrc2) & 0x3f)); \ 859 } \ 860 FINISH(2); 861 862#define HANDLE_OP_X_LONG_2ADDR(_opcode, _opname, _op, _chkdiv) \ 863 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 864 vdst = INST_A(inst); \ 865 vsrc1 = INST_B(inst); \ 866 ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \ 867 if (_chkdiv != 0) { \ 868 s8 firstVal, secondVal, result; \ 869 firstVal = GET_REGISTER_WIDE(vdst); \ 870 secondVal = GET_REGISTER_WIDE(vsrc1); \ 871 if (secondVal == 0LL) { \ 872 EXPORT_PC(); \ 873 dvmThrowArithmeticException("divide by zero"); \ 874 GOTO_exceptionThrown(); \ 875 } \ 876 if ((u8)firstVal == 0x8000000000000000ULL && \ 877 secondVal == -1LL) \ 878 { \ 879 if (_chkdiv == 1) \ 880 result = firstVal; /* division */ \ 881 else \ 882 result = 0; /* remainder */ \ 883 } else { \ 884 result = firstVal _op secondVal; \ 885 } \ 886 SET_REGISTER_WIDE(vdst, result); \ 887 } else { \ 888 SET_REGISTER_WIDE(vdst, \ 889 (s8) GET_REGISTER_WIDE(vdst) _op (s8)GET_REGISTER_WIDE(vsrc1));\ 890 } \ 891 FINISH(1); 892 893#define HANDLE_OP_SHX_LONG_2ADDR(_opcode, _opname, _cast, _op) \ 894 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 895 vdst = INST_A(inst); \ 896 vsrc1 = INST_B(inst); \ 897 ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \ 898 SET_REGISTER_WIDE(vdst, \ 899 _cast GET_REGISTER_WIDE(vdst) _op (GET_REGISTER(vsrc1) & 0x3f)); \ 900 FINISH(1); 901 902#define HANDLE_OP_X_FLOAT(_opcode, _opname, _op) \ 903 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 904 { \ 905 u2 srcRegs; \ 906 vdst = INST_AA(inst); \ 907 srcRegs = FETCH(1); \ 908 vsrc1 = srcRegs & 0xff; \ 909 vsrc2 = srcRegs >> 8; \ 910 ILOGV("|%s-float v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 911 SET_REGISTER_FLOAT(vdst, \ 912 GET_REGISTER_FLOAT(vsrc1) _op GET_REGISTER_FLOAT(vsrc2)); \ 913 } \ 914 FINISH(2); 915 916#define HANDLE_OP_X_DOUBLE(_opcode, _opname, _op) \ 917 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 918 { \ 919 u2 srcRegs; \ 920 vdst = INST_AA(inst); \ 921 srcRegs = FETCH(1); \ 922 vsrc1 = srcRegs & 0xff; \ 923 vsrc2 = srcRegs >> 8; \ 924 ILOGV("|%s-double v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 925 SET_REGISTER_DOUBLE(vdst, \ 926 GET_REGISTER_DOUBLE(vsrc1) _op GET_REGISTER_DOUBLE(vsrc2)); \ 927 } \ 928 FINISH(2); 929 930#define HANDLE_OP_X_FLOAT_2ADDR(_opcode, _opname, _op) \ 931 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 932 vdst = INST_A(inst); \ 933 vsrc1 = INST_B(inst); \ 934 ILOGV("|%s-float-2addr v%d,v%d", (_opname), vdst, vsrc1); \ 935 SET_REGISTER_FLOAT(vdst, \ 936 GET_REGISTER_FLOAT(vdst) _op GET_REGISTER_FLOAT(vsrc1)); \ 937 FINISH(1); 938 939#define HANDLE_OP_X_DOUBLE_2ADDR(_opcode, _opname, _op) \ 940 HANDLE_OPCODE(_opcode /*vA, vB*/) \ 941 vdst = INST_A(inst); \ 942 vsrc1 = INST_B(inst); \ 943 ILOGV("|%s-double-2addr v%d,v%d", (_opname), vdst, vsrc1); \ 944 SET_REGISTER_DOUBLE(vdst, \ 945 GET_REGISTER_DOUBLE(vdst) _op GET_REGISTER_DOUBLE(vsrc1)); \ 946 FINISH(1); 947 948#define HANDLE_OP_AGET(_opcode, _opname, _type, _regsize) \ 949 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 950 { \ 951 ArrayObject* arrayObj; \ 952 u2 arrayInfo; \ 953 EXPORT_PC(); \ 954 vdst = INST_AA(inst); \ 955 arrayInfo = FETCH(1); \ 956 vsrc1 = arrayInfo & 0xff; /* array ptr */ \ 957 vsrc2 = arrayInfo >> 8; /* index */ \ 958 ILOGV("|aget%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 959 arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \ 960 if (!checkForNull((Object*) arrayObj)) \ 961 GOTO_exceptionThrown(); \ 962 if (GET_REGISTER(vsrc2) >= arrayObj->length) { \ 963 dvmThrowArrayIndexOutOfBoundsException( \ 964 arrayObj->length, GET_REGISTER(vsrc2)); \ 965 GOTO_exceptionThrown(); \ 966 } \ 967 SET_REGISTER##_regsize(vdst, \ 968 ((_type*)(void*)arrayObj->contents)[GET_REGISTER(vsrc2)]); \ 969 ILOGV("+ AGET[%d]=%#x", GET_REGISTER(vsrc2), GET_REGISTER(vdst)); \ 970 } \ 971 FINISH(2); 972 973#define HANDLE_OP_APUT(_opcode, _opname, _type, _regsize) \ 974 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \ 975 { \ 976 ArrayObject* arrayObj; \ 977 u2 arrayInfo; \ 978 EXPORT_PC(); \ 979 vdst = INST_AA(inst); /* AA: source value */ \ 980 arrayInfo = FETCH(1); \ 981 vsrc1 = arrayInfo & 0xff; /* BB: array ptr */ \ 982 vsrc2 = arrayInfo >> 8; /* CC: index */ \ 983 ILOGV("|aput%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \ 984 arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \ 985 if (!checkForNull((Object*) arrayObj)) \ 986 GOTO_exceptionThrown(); \ 987 if (GET_REGISTER(vsrc2) >= arrayObj->length) { \ 988 dvmThrowArrayIndexOutOfBoundsException( \ 989 arrayObj->length, GET_REGISTER(vsrc2)); \ 990 GOTO_exceptionThrown(); \ 991 } \ 992 ILOGV("+ APUT[%d]=0x%08x", GET_REGISTER(vsrc2), GET_REGISTER(vdst));\ 993 ((_type*)(void*)arrayObj->contents)[GET_REGISTER(vsrc2)] = \ 994 GET_REGISTER##_regsize(vdst); \ 995 } \ 996 FINISH(2); 997 998/* 999 * It's possible to get a bad value out of a field with sub-32-bit stores 1000 * because the -quick versions always operate on 32 bits. Consider: 1001 * short foo = -1 (sets a 32-bit register to 0xffffffff) 1002 * iput-quick foo (writes all 32 bits to the field) 1003 * short bar = 1 (sets a 32-bit register to 0x00000001) 1004 * iput-short (writes the low 16 bits to the field) 1005 * iget-quick foo (reads all 32 bits from the field, yielding 0xffff0001) 1006 * This can only happen when optimized and non-optimized code has interleaved 1007 * access to the same field. This is unlikely but possible. 1008 * 1009 * The easiest way to fix this is to always read/write 32 bits at a time. On 1010 * a device with a 16-bit data bus this is sub-optimal. (The alternative 1011 * approach is to have sub-int versions of iget-quick, but now we're wasting 1012 * Dalvik instruction space and making it less likely that handler code will 1013 * already be in the CPU i-cache.) 1014 */ 1015#define HANDLE_IGET_X(_opcode, _opname, _ftype, _regsize) \ 1016 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \ 1017 { \ 1018 InstField* ifield; \ 1019 Object* obj; \ 1020 EXPORT_PC(); \ 1021 vdst = INST_A(inst); \ 1022 vsrc1 = INST_B(inst); /* object ptr */ \ 1023 ref = FETCH(1); /* field ref */ \ 1024 ILOGV("|iget%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \ 1025 obj = (Object*) GET_REGISTER(vsrc1); \ 1026 if (!checkForNull(obj)) \ 1027 GOTO_exceptionThrown(); \ 1028 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \ 1029 if (ifield == NULL) { \ 1030 ifield = dvmResolveInstField(curMethod->clazz, ref); \ 1031 if (ifield == NULL) \ 1032 GOTO_exceptionThrown(); \ 1033 } \ 1034 SET_REGISTER##_regsize(vdst, \ 1035 dvmGetField##_ftype(obj, ifield->byteOffset)); \ 1036 ILOGV("+ IGET '%s'=0x%08llx", ifield->field.name, \ 1037 (u8) GET_REGISTER##_regsize(vdst)); \ 1038 } \ 1039 FINISH(2); 1040 1041#define HANDLE_IGET_X_JUMBO(_opcode, _opname, _ftype, _regsize) \ 1042 HANDLE_OPCODE(_opcode /*vBBBB, vCCCC, class@AAAAAAAA*/) \ 1043 { \ 1044 InstField* ifield; \ 1045 Object* obj; \ 1046 EXPORT_PC(); \ 1047 ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \ 1048 vdst = FETCH(3); \ 1049 vsrc1 = FETCH(4); /* object ptr */ \ 1050 ILOGV("|iget%s/jumbo v%d,v%d,field@0x%08x", \ 1051 (_opname), vdst, vsrc1, ref); \ 1052 obj = (Object*) GET_REGISTER(vsrc1); \ 1053 if (!checkForNull(obj)) \ 1054 GOTO_exceptionThrown(); \ 1055 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \ 1056 if (ifield == NULL) { \ 1057 ifield = dvmResolveInstField(curMethod->clazz, ref); \ 1058 if (ifield == NULL) \ 1059 GOTO_exceptionThrown(); \ 1060 } \ 1061 SET_REGISTER##_regsize(vdst, \ 1062 dvmGetField##_ftype(obj, ifield->byteOffset)); \ 1063 ILOGV("+ IGET '%s'=0x%08llx", ifield->field.name, \ 1064 (u8) GET_REGISTER##_regsize(vdst)); \ 1065 } \ 1066 FINISH(5); 1067 1068#define HANDLE_IGET_X_QUICK(_opcode, _opname, _ftype, _regsize) \ 1069 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \ 1070 { \ 1071 Object* obj; \ 1072 vdst = INST_A(inst); \ 1073 vsrc1 = INST_B(inst); /* object ptr */ \ 1074 ref = FETCH(1); /* field offset */ \ 1075 ILOGV("|iget%s-quick v%d,v%d,field@+%u", \ 1076 (_opname), vdst, vsrc1, ref); \ 1077 obj = (Object*) GET_REGISTER(vsrc1); \ 1078 if (!checkForNullExportPC(obj, fp, pc)) \ 1079 GOTO_exceptionThrown(); \ 1080 SET_REGISTER##_regsize(vdst, dvmGetField##_ftype(obj, ref)); \ 1081 ILOGV("+ IGETQ %d=0x%08llx", ref, \ 1082 (u8) GET_REGISTER##_regsize(vdst)); \ 1083 } \ 1084 FINISH(2); 1085 1086#define HANDLE_IPUT_X(_opcode, _opname, _ftype, _regsize) \ 1087 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \ 1088 { \ 1089 InstField* ifield; \ 1090 Object* obj; \ 1091 EXPORT_PC(); \ 1092 vdst = INST_A(inst); \ 1093 vsrc1 = INST_B(inst); /* object ptr */ \ 1094 ref = FETCH(1); /* field ref */ \ 1095 ILOGV("|iput%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \ 1096 obj = (Object*) GET_REGISTER(vsrc1); \ 1097 if (!checkForNull(obj)) \ 1098 GOTO_exceptionThrown(); \ 1099 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \ 1100 if (ifield == NULL) { \ 1101 ifield = dvmResolveInstField(curMethod->clazz, ref); \ 1102 if (ifield == NULL) \ 1103 GOTO_exceptionThrown(); \ 1104 } \ 1105 dvmSetField##_ftype(obj, ifield->byteOffset, \ 1106 GET_REGISTER##_regsize(vdst)); \ 1107 ILOGV("+ IPUT '%s'=0x%08llx", ifield->field.name, \ 1108 (u8) GET_REGISTER##_regsize(vdst)); \ 1109 } \ 1110 FINISH(2); 1111 1112#define HANDLE_IPUT_X_JUMBO(_opcode, _opname, _ftype, _regsize) \ 1113 HANDLE_OPCODE(_opcode /*vBBBB, vCCCC, class@AAAAAAAA*/) \ 1114 { \ 1115 InstField* ifield; \ 1116 Object* obj; \ 1117 EXPORT_PC(); \ 1118 ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \ 1119 vdst = FETCH(3); \ 1120 vsrc1 = FETCH(4); /* object ptr */ \ 1121 ILOGV("|iput%s/jumbo v%d,v%d,field@0x%08x", \ 1122 (_opname), vdst, vsrc1, ref); \ 1123 obj = (Object*) GET_REGISTER(vsrc1); \ 1124 if (!checkForNull(obj)) \ 1125 GOTO_exceptionThrown(); \ 1126 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \ 1127 if (ifield == NULL) { \ 1128 ifield = dvmResolveInstField(curMethod->clazz, ref); \ 1129 if (ifield == NULL) \ 1130 GOTO_exceptionThrown(); \ 1131 } \ 1132 dvmSetField##_ftype(obj, ifield->byteOffset, \ 1133 GET_REGISTER##_regsize(vdst)); \ 1134 ILOGV("+ IPUT '%s'=0x%08llx", ifield->field.name, \ 1135 (u8) GET_REGISTER##_regsize(vdst)); \ 1136 } \ 1137 FINISH(5); 1138 1139#define HANDLE_IPUT_X_QUICK(_opcode, _opname, _ftype, _regsize) \ 1140 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \ 1141 { \ 1142 Object* obj; \ 1143 vdst = INST_A(inst); \ 1144 vsrc1 = INST_B(inst); /* object ptr */ \ 1145 ref = FETCH(1); /* field offset */ \ 1146 ILOGV("|iput%s-quick v%d,v%d,field@0x%04x", \ 1147 (_opname), vdst, vsrc1, ref); \ 1148 obj = (Object*) GET_REGISTER(vsrc1); \ 1149 if (!checkForNullExportPC(obj, fp, pc)) \ 1150 GOTO_exceptionThrown(); \ 1151 dvmSetField##_ftype(obj, ref, GET_REGISTER##_regsize(vdst)); \ 1152 ILOGV("+ IPUTQ %d=0x%08llx", ref, \ 1153 (u8) GET_REGISTER##_regsize(vdst)); \ 1154 } \ 1155 FINISH(2); 1156 1157/* 1158 * The JIT needs dvmDexGetResolvedField() to return non-null. 1159 * Because the portable interpreter is not involved with the JIT 1160 * and trace building, we only need the extra check here when this 1161 * code is massaged into a stub called from an assembly interpreter. 1162 * This is controlled by the JIT_STUB_HACK maco. 1163 */ 1164 1165#define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \ 1166 HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \ 1167 { \ 1168 StaticField* sfield; \ 1169 vdst = INST_AA(inst); \ 1170 ref = FETCH(1); /* field ref */ \ 1171 ILOGV("|sget%s v%d,sfield@0x%04x", (_opname), vdst, ref); \ 1172 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \ 1173 if (sfield == NULL) { \ 1174 EXPORT_PC(); \ 1175 sfield = dvmResolveStaticField(curMethod->clazz, ref); \ 1176 if (sfield == NULL) \ 1177 GOTO_exceptionThrown(); \ 1178 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \ 1179 JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \ 1180 } \ 1181 } \ 1182 SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \ 1183 ILOGV("+ SGET '%s'=0x%08llx", \ 1184 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \ 1185 } \ 1186 FINISH(2); 1187 1188#define HANDLE_SGET_X_JUMBO(_opcode, _opname, _ftype, _regsize) \ 1189 HANDLE_OPCODE(_opcode /*vBBBB, class@AAAAAAAA*/) \ 1190 { \ 1191 StaticField* sfield; \ 1192 ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \ 1193 vdst = FETCH(3); \ 1194 ILOGV("|sget%s/jumbo v%d,sfield@0x%08x", (_opname), vdst, ref); \ 1195 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \ 1196 if (sfield == NULL) { \ 1197 EXPORT_PC(); \ 1198 sfield = dvmResolveStaticField(curMethod->clazz, ref); \ 1199 if (sfield == NULL) \ 1200 GOTO_exceptionThrown(); \ 1201 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \ 1202 JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \ 1203 } \ 1204 } \ 1205 SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \ 1206 ILOGV("+ SGET '%s'=0x%08llx", \ 1207 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \ 1208 } \ 1209 FINISH(4); 1210 1211#define HANDLE_SPUT_X(_opcode, _opname, _ftype, _regsize) \ 1212 HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \ 1213 { \ 1214 StaticField* sfield; \ 1215 vdst = INST_AA(inst); \ 1216 ref = FETCH(1); /* field ref */ \ 1217 ILOGV("|sput%s v%d,sfield@0x%04x", (_opname), vdst, ref); \ 1218 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \ 1219 if (sfield == NULL) { \ 1220 EXPORT_PC(); \ 1221 sfield = dvmResolveStaticField(curMethod->clazz, ref); \ 1222 if (sfield == NULL) \ 1223 GOTO_exceptionThrown(); \ 1224 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \ 1225 JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \ 1226 } \ 1227 } \ 1228 dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \ 1229 ILOGV("+ SPUT '%s'=0x%08llx", \ 1230 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \ 1231 } \ 1232 FINISH(2); 1233 1234#define HANDLE_SPUT_X_JUMBO(_opcode, _opname, _ftype, _regsize) \ 1235 HANDLE_OPCODE(_opcode /*vBBBB, class@AAAAAAAA*/) \ 1236 { \ 1237 StaticField* sfield; \ 1238 ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \ 1239 vdst = FETCH(3); \ 1240 ILOGV("|sput%s/jumbo v%d,sfield@0x%08x", (_opname), vdst, ref); \ 1241 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \ 1242 if (sfield == NULL) { \ 1243 EXPORT_PC(); \ 1244 sfield = dvmResolveStaticField(curMethod->clazz, ref); \ 1245 if (sfield == NULL) \ 1246 GOTO_exceptionThrown(); \ 1247 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \ 1248 JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \ 1249 } \ 1250 } \ 1251 dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \ 1252 ILOGV("+ SPUT '%s'=0x%08llx", \ 1253 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \ 1254 } \ 1255 FINISH(4); 1256 1257/* File: cstubs/enddefs.cpp */ 1258 1259/* undefine "magic" name remapping */ 1260#undef retval 1261#undef pc 1262#undef fp 1263#undef curMethod 1264#undef methodClassDex 1265#undef self 1266#undef debugTrackedRefStart 1267 1268/* File: armv5te/debug.cpp */ 1269#include <inttypes.h> 1270 1271/* 1272 * Dump the fixed-purpose ARM registers, along with some other info. 1273 * 1274 * This function MUST be compiled in ARM mode -- THUMB will yield bogus 1275 * results. 1276 * 1277 * This will NOT preserve r0-r3/ip. 1278 */ 1279void dvmMterpDumpArmRegs(uint32_t r0, uint32_t r1, uint32_t r2, uint32_t r3) 1280{ 1281 register uint32_t rPC asm("r4"); 1282 register uint32_t rFP asm("r5"); 1283 register uint32_t rSELF asm("r6"); 1284 register uint32_t rINST asm("r7"); 1285 register uint32_t rIBASE asm("r8"); 1286 register uint32_t r9 asm("r9"); 1287 register uint32_t r10 asm("r10"); 1288 1289 //extern char dvmAsmInstructionStart[]; 1290 1291 printf("REGS: r0=%08x r1=%08x r2=%08x r3=%08x\n", r0, r1, r2, r3); 1292 printf(" : rPC=%08x rFP=%08x rSELF=%08x rINST=%08x\n", 1293 rPC, rFP, rSELF, rINST); 1294 printf(" : rIBASE=%08x r9=%08x r10=%08x\n", rIBASE, r9, r10); 1295 1296 //Thread* self = (Thread*) rSELF; 1297 //const Method* method = self->method; 1298 printf(" + self is %p\n", dvmThreadSelf()); 1299 //printf(" + currently in %s.%s %s\n", 1300 // method->clazz->descriptor, method->name, method->shorty); 1301 //printf(" + dvmAsmInstructionStart = %p\n", dvmAsmInstructionStart); 1302 //printf(" + next handler for 0x%02x = %p\n", 1303 // rINST & 0xff, dvmAsmInstructionStart + (rINST & 0xff) * 64); 1304} 1305 1306/* 1307 * Dump the StackSaveArea for the specified frame pointer. 1308 */ 1309void dvmDumpFp(void* fp, StackSaveArea* otherSaveArea) 1310{ 1311 StackSaveArea* saveArea = SAVEAREA_FROM_FP(fp); 1312 printf("StackSaveArea for fp %p [%p/%p]:\n", fp, saveArea, otherSaveArea); 1313#ifdef EASY_GDB 1314 printf(" prevSave=%p, prevFrame=%p savedPc=%p meth=%p curPc=%p\n", 1315 saveArea->prevSave, saveArea->prevFrame, saveArea->savedPc, 1316 saveArea->method, saveArea->xtra.currentPc); 1317#else 1318 printf(" prevFrame=%p savedPc=%p meth=%p curPc=%p fp[0]=0x%08x\n", 1319 saveArea->prevFrame, saveArea->savedPc, 1320 saveArea->method, saveArea->xtra.currentPc, 1321 *(u4*)fp); 1322#endif 1323} 1324 1325/* 1326 * Does the bulk of the work for common_printMethod(). 1327 */ 1328void dvmMterpPrintMethod(Method* method) 1329{ 1330 /* 1331 * It is a direct (non-virtual) method if it is static, private, 1332 * or a constructor. 1333 */ 1334 bool isDirect = 1335 ((method->accessFlags & (ACC_STATIC|ACC_PRIVATE)) != 0) || 1336 (method->name[0] == '<'); 1337 1338 char* desc = dexProtoCopyMethodDescriptor(&method->prototype); 1339 1340 printf("<%c:%s.%s %s> ", 1341 isDirect ? 'D' : 'V', 1342 method->clazz->descriptor, 1343 method->name, 1344 desc); 1345 1346 free(desc); 1347} 1348 1349