perf.h revision 7d82a4640abdcc3ffbd89c7971a11e4ac7953b7f 
1#ifndef _PERF_PERF_H
2#define _PERF_PERF_H
3
4struct winsize;
5
6void get_term_dimensions(struct winsize *ws);
7
8#if defined(__i386__)
9/* ANDROID_CHANGE_BEGIN */
10#if 0
11#include "../../arch/x86/include/asm/unistd.h"
12#elif !defined(__APPLE__)
13#include <asm/unistd.h>
14#endif
15/* ANDROID_CHANGE_END */
16#define rmb()		asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
17#define cpu_relax()	asm volatile("rep; nop" ::: "memory");
18#endif
19
20#if defined(__x86_64__)
21#include "../../arch/x86/include/asm/unistd.h"
22#define rmb()		asm volatile("lfence" ::: "memory")
23#define cpu_relax()	asm volatile("rep; nop" ::: "memory");
24#endif
25
26#ifdef __powerpc__
27#include "../../arch/powerpc/include/asm/unistd.h"
28#define rmb()		asm volatile ("sync" ::: "memory")
29#define cpu_relax()	asm volatile ("" ::: "memory");
30#endif
31
32#ifdef __s390__
33#include "../../arch/s390/include/asm/unistd.h"
34#define rmb()		asm volatile("bcr 15,0" ::: "memory")
35#define cpu_relax()	asm volatile("" ::: "memory");
36#endif
37
38#ifdef __sh__
39#include "../../arch/sh/include/asm/unistd.h"
40#if defined(__SH4A__) || defined(__SH5__)
41# define rmb()		asm volatile("synco" ::: "memory")
42#else
43# define rmb()		asm volatile("" ::: "memory")
44#endif
45#define cpu_relax()	asm volatile("" ::: "memory")
46#endif
47
48#ifdef __hppa__
49#include "../../arch/parisc/include/asm/unistd.h"
50#define rmb()		asm volatile("" ::: "memory")
51#define cpu_relax()	asm volatile("" ::: "memory");
52#endif
53
54#ifdef __sparc__
55#include "../../arch/sparc/include/asm/unistd.h"
56#define rmb()		asm volatile("":::"memory")
57#define cpu_relax()	asm volatile("":::"memory")
58#endif
59
60#ifdef __alpha__
61#include "../../arch/alpha/include/asm/unistd.h"
62#define rmb()		asm volatile("mb" ::: "memory")
63#define cpu_relax()	asm volatile("" ::: "memory")
64#endif
65
66#ifdef __ia64__
67#include "../../arch/ia64/include/asm/unistd.h"
68#define rmb()		asm volatile ("mf" ::: "memory")
69#define cpu_relax()	asm volatile ("hint @pause" ::: "memory")
70#endif
71
72#ifdef __arm__
73/* ANDROID_CHANGE_BEGIN */
74#if 0
75#include "../../arch/arm/include/asm/unistd.h"
76#else
77#include <asm/unistd.h>
78#endif
79/* ANDROID_CHANGE_END */
80/*
81 * Use the __kuser_memory_barrier helper in the CPU helper page. See
82 * arch/arm/kernel/entry-armv.S in the kernel source for details.
83 */
84#define rmb()		((void(*)(void))0xffff0fa0)()
85#define cpu_relax()	asm volatile("":::"memory")
86#endif
87
88#ifdef __mips__
89#include "../../arch/mips/include/asm/unistd.h"
90#define rmb()		asm volatile(					\
91				".set	mips2\n\t"			\
92				"sync\n\t"				\
93				".set	mips0"				\
94				: /* no output */			\
95				: /* no input */			\
96				: "memory")
97#define cpu_relax()	asm volatile("" ::: "memory")
98#endif
99
100#include <time.h>
101#include <unistd.h>
102#include <sys/types.h>
103
104#include <sys/syscall.h>
105
106/* ANDROID_CHANGE_BEGIN */
107#if 0
108#include "../../include/linux/perf_event.h"
109#else
110#include "util/include/linux/added/perf_event.h"
111#endif
112/* ANDROID_CHANGE_END */
113#include "util/types.h"
114#include <stdbool.h>
115
116struct perf_mmap {
117	void			*base;
118	int			mask;
119	unsigned int		prev;
120};
121
122static inline unsigned int perf_mmap__read_head(struct perf_mmap *mm)
123{
124	struct perf_event_mmap_page *pc = mm->base;
125	int head = pc->data_head;
126	rmb();
127	return head;
128}
129
130static inline void perf_mmap__write_tail(struct perf_mmap *md,
131					 unsigned long tail)
132{
133	struct perf_event_mmap_page *pc = md->base;
134
135	/*
136	 * ensure all reads are done before we write the tail out.
137	 */
138	/* mb(); */
139	pc->data_tail = tail;
140}
141
142/*
143 * prctl(PR_TASK_PERF_EVENTS_DISABLE) will (cheaply) disable all
144 * counters in the current task.
145 */
146#define PR_TASK_PERF_EVENTS_DISABLE   31
147#define PR_TASK_PERF_EVENTS_ENABLE    32
148
149#ifndef NSEC_PER_SEC
150# define NSEC_PER_SEC			1000000000ULL
151#endif
152
153/* ANDROID_CHANGE_BEGIN */
154#ifndef __APPLE__
155static inline unsigned long long rdclock(void)
156{
157	struct timespec ts;
158
159	clock_gettime(CLOCK_MONOTONIC, &ts);
160	return ts.tv_sec * 1000000000ULL + ts.tv_nsec;
161}
162#endif
163/* ANDROID_CHANGE_END */
164
165/*
166 * Pick up some kernel type conventions:
167 */
168#define __user
169#define asmlinkage
170
171#define unlikely(x)	__builtin_expect(!!(x), 0)
172#define min(x, y) ({				\
173	typeof(x) _min1 = (x);			\
174	typeof(y) _min2 = (y);			\
175	(void) (&_min1 == &_min2);		\
176	_min1 < _min2 ? _min1 : _min2; })
177
178/* ANDROID_CHANGE_BEGIN */
179#ifndef __APPLE__
180static inline int
181sys_perf_event_open(struct perf_event_attr *attr,
182		      pid_t pid, int cpu, int group_fd,
183		      unsigned long flags)
184{
185	attr->size = sizeof(*attr);
186	return syscall(__NR_perf_event_open, attr, pid, cpu,
187		       group_fd, flags);
188}
189#endif
190/* ANDROID_CHANGE_END */
191
192#define MAX_COUNTERS			256
193#define MAX_NR_CPUS			256
194
195struct ip_callchain {
196	u64 nr;
197	u64 ips[0];
198};
199
200extern bool perf_host, perf_guest;
201
202#endif
203