1/* 2 * Tiny Code Generator for QEMU 3 * 4 * Copyright (c) 2008 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24#define TCG_TARGET_X86_64 1 25 26#define TCG_TARGET_REG_BITS 64 27//#define TCG_TARGET_WORDS_BIGENDIAN 28 29#define TCG_TARGET_NB_REGS 16 30 31enum { 32 TCG_REG_RAX = 0, 33 TCG_REG_RCX, 34 TCG_REG_RDX, 35 TCG_REG_RBX, 36 TCG_REG_RSP, 37 TCG_REG_RBP, 38 TCG_REG_RSI, 39 TCG_REG_RDI, 40 TCG_REG_R8, 41 TCG_REG_R9, 42 TCG_REG_R10, 43 TCG_REG_R11, 44 TCG_REG_R12, 45 TCG_REG_R13, 46 TCG_REG_R14, 47 TCG_REG_R15, 48}; 49 50#define TCG_CT_CONST_S32 0x100 51#define TCG_CT_CONST_U32 0x200 52 53/* used for function call generation */ 54#define TCG_REG_CALL_STACK TCG_REG_RSP 55#define TCG_TARGET_STACK_ALIGN 16 56#define TCG_TARGET_CALL_STACK_OFFSET 0 57 58/* optional instructions */ 59#define TCG_TARGET_HAS_bswap16_i32 60#define TCG_TARGET_HAS_bswap16_i64 61#define TCG_TARGET_HAS_bswap32_i32 62#define TCG_TARGET_HAS_bswap32_i64 63#define TCG_TARGET_HAS_bswap64_i64 64#define TCG_TARGET_HAS_neg_i32 65#define TCG_TARGET_HAS_neg_i64 66#define TCG_TARGET_HAS_not_i32 67#define TCG_TARGET_HAS_not_i64 68#define TCG_TARGET_HAS_ext8s_i32 69#define TCG_TARGET_HAS_ext16s_i32 70#define TCG_TARGET_HAS_ext8s_i64 71#define TCG_TARGET_HAS_ext16s_i64 72#define TCG_TARGET_HAS_ext32s_i64 73#define TCG_TARGET_HAS_ext8u_i32 74#define TCG_TARGET_HAS_ext16u_i32 75#define TCG_TARGET_HAS_ext8u_i64 76#define TCG_TARGET_HAS_ext16u_i64 77#define TCG_TARGET_HAS_ext32u_i64 78#define TCG_TARGET_HAS_rot_i32 79#define TCG_TARGET_HAS_rot_i64 80 81// #define TCG_TARGET_HAS_andc_i32 82// #define TCG_TARGET_HAS_andc_i64 83// #define TCG_TARGET_HAS_orc_i32 84// #define TCG_TARGET_HAS_orc_i64 85 86#define TCG_TARGET_HAS_GUEST_BASE 87 88/* Note: must be synced with dyngen-exec.h */ 89#define TCG_AREG0 TCG_REG_R14 90#define TCG_AREG1 TCG_REG_R15 91#define TCG_AREG2 TCG_REG_R12 92 93static inline void flush_icache_range(unsigned long start, unsigned long stop) 94{ 95} 96