10c1bc742181ded4930842b46e9507372f0b1b963James Dong/* ----------------------------------------------------------------
20c1bc742181ded4930842b46e9507372f0b1b963James Dong *
30c1bc742181ded4930842b46e9507372f0b1b963James Dong *
40c1bc742181ded4930842b46e9507372f0b1b963James Dong * File Name:  omxVCM4P10_DeblockChroma_I.c
50c1bc742181ded4930842b46e9507372f0b1b963James Dong * OpenMAX DL: v1.0.2
60c1bc742181ded4930842b46e9507372f0b1b963James Dong * Revision:   12290
70c1bc742181ded4930842b46e9507372f0b1b963James Dong * Date:       Wednesday, April 9, 2008
80c1bc742181ded4930842b46e9507372f0b1b963James Dong *
90c1bc742181ded4930842b46e9507372f0b1b963James Dong * (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
100c1bc742181ded4930842b46e9507372f0b1b963James Dong *
110c1bc742181ded4930842b46e9507372f0b1b963James Dong *
120c1bc742181ded4930842b46e9507372f0b1b963James Dong *
130c1bc742181ded4930842b46e9507372f0b1b963James Dong * H.264 intra chroma deblock
140c1bc742181ded4930842b46e9507372f0b1b963James Dong *
150c1bc742181ded4930842b46e9507372f0b1b963James Dong */
160c1bc742181ded4930842b46e9507372f0b1b963James Dong
170c1bc742181ded4930842b46e9507372f0b1b963James Dong#include "omxtypes.h"
180c1bc742181ded4930842b46e9507372f0b1b963James Dong#include "armOMX.h"
190c1bc742181ded4930842b46e9507372f0b1b963James Dong#include "omxVC.h"
200c1bc742181ded4930842b46e9507372f0b1b963James Dong
210c1bc742181ded4930842b46e9507372f0b1b963James Dong#include "armCOMM.h"
220c1bc742181ded4930842b46e9507372f0b1b963James Dong#include "armVC.h"
230c1bc742181ded4930842b46e9507372f0b1b963James Dong
240c1bc742181ded4930842b46e9507372f0b1b963James Dong/**
250c1bc742181ded4930842b46e9507372f0b1b963James Dong * Function: omxVCM4P10_DeblockChroma_I
260c1bc742181ded4930842b46e9507372f0b1b963James Dong *
270c1bc742181ded4930842b46e9507372f0b1b963James Dong * Description:
280c1bc742181ded4930842b46e9507372f0b1b963James Dong * Performs deblocking filtering on all edges of the chroma macroblock (16x16).
290c1bc742181ded4930842b46e9507372f0b1b963James Dong *
300c1bc742181ded4930842b46e9507372f0b1b963James Dong * Remarks:
310c1bc742181ded4930842b46e9507372f0b1b963James Dong *
320c1bc742181ded4930842b46e9507372f0b1b963James Dong * Parameters:
330c1bc742181ded4930842b46e9507372f0b1b963James Dong * [in]	pSrcDst         pointer to the input macroblock. Must be 8-byte aligned.
340c1bc742181ded4930842b46e9507372f0b1b963James Dong * [in]	srcdstStep      Step of the arrays
350c1bc742181ded4930842b46e9507372f0b1b963James Dong * [in]	pAlpha          pointer to a 2x2 array of alpha thresholds, organized as follows: { external
360c1bc742181ded4930842b46e9507372f0b1b963James Dong *                          vertical edge, internal  vertical edge, external
370c1bc742181ded4930842b46e9507372f0b1b963James Dong *                         horizontal edge, internal horizontal edge }
380c1bc742181ded4930842b46e9507372f0b1b963James Dong * [in]	pBeta			pointer to a 2x2 array of beta thresholds, organized as follows: { external
390c1bc742181ded4930842b46e9507372f0b1b963James Dong *                              vertical edge, internal vertical edge, external  horizontal edge,
400c1bc742181ded4930842b46e9507372f0b1b963James Dong *                              internal  horizontal edge }
410c1bc742181ded4930842b46e9507372f0b1b963James Dong * [in]	pThresholds		AArray of size  8x2 of Thresholds (TC0) (values for the left or
420c1bc742181ded4930842b46e9507372f0b1b963James Dong *                               above edge of each 4x2 or 2x4 block, arranged in  vertical block order
430c1bc742181ded4930842b46e9507372f0b1b963James Dong *                               and then in  horizontal block order)
440c1bc742181ded4930842b46e9507372f0b1b963James Dong * [in]	pBS				array of size 16x2 of BS parameters (arranged in scan block order for vertical edges and then horizontal edges);
450c1bc742181ded4930842b46e9507372f0b1b963James Dong *                         valid in the range [0,4] with the following restrictions: i) pBS[i]== 4 may occur only for 0<=i<=3, ii) pBS[i]== 4 if and only if pBS[i^1]== 4.  Must be 4-byte aligned.
460c1bc742181ded4930842b46e9507372f0b1b963James Dong * [out]	pSrcDst		pointer to filtered output macroblock
470c1bc742181ded4930842b46e9507372f0b1b963James Dong *
480c1bc742181ded4930842b46e9507372f0b1b963James Dong * Return Value:
490c1bc742181ded4930842b46e9507372f0b1b963James Dong * OMX_Sts_NoErr - no error
500c1bc742181ded4930842b46e9507372f0b1b963James Dong * OMX_Sts_BadArgErr - bad arguments
510c1bc742181ded4930842b46e9507372f0b1b963James Dong *   - Either of the pointers in pSrcDst, pAlpha, pBeta, pTresholds, or pBS is NULL.
520c1bc742181ded4930842b46e9507372f0b1b963James Dong *   - pSrcDst is not 8-byte aligned.
530c1bc742181ded4930842b46e9507372f0b1b963James Dong *   - either pThresholds or pBS is not 4-byte aligned.
540c1bc742181ded4930842b46e9507372f0b1b963James Dong *   - pBS is out of range, i.e., one of the following conditions is true: pBS[i]<0, pBS[i]>4, pBS[i]==4 for i>=4, or (pBS[i]==4 && pBS[i^1]!=4) for 0<=i<=3.
550c1bc742181ded4930842b46e9507372f0b1b963James Dong *   - srcdstStep is not a multiple of 8.
560c1bc742181ded4930842b46e9507372f0b1b963James Dong *
570c1bc742181ded4930842b46e9507372f0b1b963James Dong */
580c1bc742181ded4930842b46e9507372f0b1b963James DongOMXResult omxVCM4P10_DeblockChroma_I(
590c1bc742181ded4930842b46e9507372f0b1b963James Dong	OMX_U8* pSrcDst,
600c1bc742181ded4930842b46e9507372f0b1b963James Dong	OMX_S32 srcdstStep,
610c1bc742181ded4930842b46e9507372f0b1b963James Dong	const OMX_U8* pAlpha,
620c1bc742181ded4930842b46e9507372f0b1b963James Dong	const OMX_U8* pBeta,
630c1bc742181ded4930842b46e9507372f0b1b963James Dong	const OMX_U8* pThresholds,
640c1bc742181ded4930842b46e9507372f0b1b963James Dong    const OMX_U8 *pBS
650c1bc742181ded4930842b46e9507372f0b1b963James Dong)
660c1bc742181ded4930842b46e9507372f0b1b963James Dong{
670c1bc742181ded4930842b46e9507372f0b1b963James Dong    OMXResult errorCode;
680c1bc742181ded4930842b46e9507372f0b1b963James Dong
690c1bc742181ded4930842b46e9507372f0b1b963James Dong    armRetArgErrIf(pSrcDst == NULL,                 OMX_Sts_BadArgErr);
700c1bc742181ded4930842b46e9507372f0b1b963James Dong    armRetArgErrIf(armNot8ByteAligned(pSrcDst),     OMX_Sts_BadArgErr);
710c1bc742181ded4930842b46e9507372f0b1b963James Dong    armRetArgErrIf(srcdstStep & 7,                  OMX_Sts_BadArgErr);
720c1bc742181ded4930842b46e9507372f0b1b963James Dong    armRetArgErrIf(pAlpha == NULL,                  OMX_Sts_BadArgErr);
730c1bc742181ded4930842b46e9507372f0b1b963James Dong    armRetArgErrIf(pBeta == NULL,                   OMX_Sts_BadArgErr);
740c1bc742181ded4930842b46e9507372f0b1b963James Dong    armRetArgErrIf(pThresholds == NULL,             OMX_Sts_BadArgErr);
750c1bc742181ded4930842b46e9507372f0b1b963James Dong    armRetArgErrIf(armNot4ByteAligned(pThresholds), OMX_Sts_BadArgErr);
760c1bc742181ded4930842b46e9507372f0b1b963James Dong    armRetArgErrIf(pBS == NULL,                     OMX_Sts_BadArgErr);
770c1bc742181ded4930842b46e9507372f0b1b963James Dong    armRetArgErrIf(armNot4ByteAligned(pBS),         OMX_Sts_BadArgErr);
780c1bc742181ded4930842b46e9507372f0b1b963James Dong
790c1bc742181ded4930842b46e9507372f0b1b963James Dong    errorCode = omxVCM4P10_FilterDeblockingChroma_VerEdge_I(
800c1bc742181ded4930842b46e9507372f0b1b963James Dong        pSrcDst, srcdstStep, pAlpha, pBeta, pThresholds, pBS);
810c1bc742181ded4930842b46e9507372f0b1b963James Dong
820c1bc742181ded4930842b46e9507372f0b1b963James Dong    armRetArgErrIf(errorCode != OMX_Sts_NoErr, errorCode)
830c1bc742181ded4930842b46e9507372f0b1b963James Dong
840c1bc742181ded4930842b46e9507372f0b1b963James Dong    errorCode = omxVCM4P10_FilterDeblockingChroma_HorEdge_I(
850c1bc742181ded4930842b46e9507372f0b1b963James Dong        pSrcDst, srcdstStep, pAlpha+2, pBeta+2, pThresholds+8, pBS+16);
860c1bc742181ded4930842b46e9507372f0b1b963James Dong
870c1bc742181ded4930842b46e9507372f0b1b963James Dong    return errorCode;
880c1bc742181ded4930842b46e9507372f0b1b963James Dong}
89