10c1bc742181ded4930842b46e9507372f0b1b963James Dong/** 20c1bc742181ded4930842b46e9507372f0b1b963James Dong * 30c1bc742181ded4930842b46e9507372f0b1b963James Dong * File Name: armVCM4P2_Huff_Tables_VLC.h 40c1bc742181ded4930842b46e9507372f0b1b963James Dong * OpenMAX DL: v1.0.2 50c1bc742181ded4930842b46e9507372f0b1b963James Dong * Revision: 9641 60c1bc742181ded4930842b46e9507372f0b1b963James Dong * Date: Thursday, February 7, 2008 70c1bc742181ded4930842b46e9507372f0b1b963James Dong * 80c1bc742181ded4930842b46e9507372f0b1b963James Dong * (c) Copyright 2007-2008 ARM Limited. All Rights Reserved. 90c1bc742181ded4930842b46e9507372f0b1b963James Dong * 100c1bc742181ded4930842b46e9507372f0b1b963James Dong * 110c1bc742181ded4930842b46e9507372f0b1b963James Dong * 120c1bc742181ded4930842b46e9507372f0b1b963James Dong * 130c1bc742181ded4930842b46e9507372f0b1b963James Dong * File: armVCM4P2_Huff_Tables.h 140c1bc742181ded4930842b46e9507372f0b1b963James Dong * Description: Declares Tables used for Hufffman coding and decoding 150c1bc742181ded4930842b46e9507372f0b1b963James Dong * in MP4P2 codec. 160c1bc742181ded4930842b46e9507372f0b1b963James Dong * 170c1bc742181ded4930842b46e9507372f0b1b963James Dong */ 180c1bc742181ded4930842b46e9507372f0b1b963James Dong 190c1bc742181ded4930842b46e9507372f0b1b963James Dong#ifndef _OMXHUFFTAB_H_ 200c1bc742181ded4930842b46e9507372f0b1b963James Dong#define _OMXHUFFTAB_H_ 210c1bc742181ded4930842b46e9507372f0b1b963James Dong 220c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const OMX_U8 armVCM4P2_IntraL0RunIdx[11]; 230c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const ARM_VLC32 armVCM4P2_IntraVlcL0[68]; 240c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const OMX_U8 armVCM4P2_IntraL1RunIdx[7]; 250c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const ARM_VLC32 armVCM4P2_IntraVlcL1[36]; 260c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const OMX_U8 armVCM4P2_IntraL0LMAX[15]; 270c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const OMX_U8 armVCM4P2_IntraL1LMAX[21]; 280c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const OMX_U8 armVCM4P2_IntraL0RMAX[27]; 290c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const OMX_U8 armVCM4P2_IntraL1RMAX[8]; 300c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const OMX_U8 armVCM4P2_InterL0RunIdx[12]; 310c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const ARM_VLC32 armVCM4P2_InterVlcL0[59]; 320c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const OMX_U8 armVCM4P2_InterL1RunIdx[3]; 330c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const ARM_VLC32 armVCM4P2_InterVlcL1[45]; 340c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const OMX_U8 armVCM4P2_InterL0LMAX[27]; 350c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const OMX_U8 armVCM4P2_InterL1LMAX[41]; 360c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const OMX_U8 armVCM4P2_InterL0RMAX[12]; 370c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const OMX_U8 armVCM4P2_InterL1RMAX[3]; 380c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const ARM_VLC32 armVCM4P2_aIntraDCLumaIndex[14]; 390c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const ARM_VLC32 armVCM4P2_aIntraDCChromaIndex[14]; 400c1bc742181ded4930842b46e9507372f0b1b963James Dongextern const ARM_VLC32 armVCM4P2_aVlcMVD[66]; 410c1bc742181ded4930842b46e9507372f0b1b963James Dong 420c1bc742181ded4930842b46e9507372f0b1b963James Dong#endif /* _OMXHUFFTAB_H_ */ 43