177ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao//===-- floatsidfvfp.S - Implement floatsidfvfp ---------------------------===// 277ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao// 377ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao// The LLVM Compiler Infrastructure 477ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao// 577ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao// This file is distributed under the University of Illinois Open Source 677ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao// License. See LICENSE.TXT for details. 777ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao// 877ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao//===----------------------------------------------------------------------===// 977ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao 1077ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao#include "../assembly.h" 1177ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao 1277ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao// 1377ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao// extern double __floatsidfvfp(int a); 1477ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao// 1577ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao// Converts a 32-bit int to a double precision float. 1677ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao// Uses Darwin calling convention where a double precision result is 1777ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao// return in GPR register pair. 1877ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao// 1977ed6142daed1e068fbda64405d0de9845e40e1Shih-wei LiaoDEFINE_COMPILERRT_FUNCTION(__floatsidfvfp) 2077ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao fmsr s15, r0 // move int to float register s15 2177ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao fsitod d7, s15 // convert 32-bit int in s15 to double in d7 2277ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao fmrrd r0, r1, d7 // move d7 to result register pair r0/r1 2377ed6142daed1e068fbda64405d0de9845e40e1Shih-wei Liao bx lr 24