History log of /system/core/include/cutils/atomic-inline.h
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
6521a41dcf12ed9a7c038c42696695e22feb428b 11-Aug-2012 Elliott Hughes <enh@google.com> Remove system/core's remnants of SH support.

SH support is long dead.

Change-Id: I6be2763ca9f1ad8b3f9b09a8ad2f1d67f1e7f802
/system/core/include/cutils/atomic-inline.h
096041174b1d8cc09b06c51053b2b7e8545bd93f 25-May-2012 Duane Sand <duanes@mips.com> Add Mips architecture to system/core/include

Change-Id: Ief7bdbd8d09cabe3f11f3ed47a932a7faa81cad9
/system/core/include/cutils/atomic-inline.h
b60d9ce1fcedf264f7cd7eb9fb8895b118f72ac3 12-Apr-2011 Carl Shapiro <cshapiro@google.com> Make atomic-inline.h usable from ordinary C++ code.

Change-Id: I18dcba9cb3adc22f26403e94df4b2684f51090ed
/system/core/include/cutils/atomic-inline.h
464431e65fbede57b0d41d230fe6f6dc465c20f8 24-Sep-2010 Brian Carlstrom <bdc@google.com> Add definitions for store barrier.

I usually call this a "store/store barrier" for maximum clarity, but
the common way of describing it is "store barrier" or "store fence".

This doesn't use "dmb st" yet since we're waiting on the toolchain
update, but it gets the various macros and inline functions in place
so we can use them in the VM.

Bug 3003477

git cherry-pick 2ba5eec3972b4ce46feb677116534fcd3d136e0a

Change-Id: Ifd2d3588be96aa529d490789436cf48c962021ba
/system/core/include/cutils/atomic-inline.h
93b0cb40c18cae594c931677be2b9214420610b7 04-Jun-2010 Carl Shapiro <cshapiro@google.com> Define inline atomic operations for x86 and ARM.

This change moves the ARM definitions into GCC extended inline
assembler. In addition, the same set of x86 definitions are now
shared among all x86 targets.

Change-Id: I6e5aa3a413d0af2acbe5d32994983d35a01fdcb3
/system/core/include/cutils/atomic-inline.h
8dfa47da8cb33ebaf7aae6db6548e75ed86e8f1e 27-May-2010 Andy McFadden <fadden@android.com> Atomic/SMP update, part 2.

Added new atomic functions, renamed some old ones. Some #defines have
been added for backward compatibility.

Merged the pre- and post-ARMv6 implementations into a single file.

Renamed the semi-private __android_membar_full_smp to USE_SCREAMING_CAPS
since that's more appropriate for a macro.

Added lots of comments.

Note Mac OS X primitives have not been tested.

Change-Id: If827260750aeb61ad5c2b760e30658e29dbb26f2
/system/core/include/cutils/atomic-inline.h
ac322da69ee48aa792baf5c48cfb719ce077f67e 20-May-2010 Andy McFadden <fadden@android.com> Atomic/SMP update.

Added atomic-inline.h. Added a platform-specific memory barrier call
there.

Added android_atomic_acquire_cmpxchg() and android_atomic_release_store().
Not tested on Mac OS X or SH.

Added memory barrier calls to linux-x86 atomics. Mac OS X has barrier
functions already. sh isn't really SMP-ready. linux-arm needs work
(to be done in a separate change).

Updated the makefile to make the SMP state visible to the code here.
Note that host binaries are NOT built with SMP enabled; while our hosts
are very likely SMP, it's not worth figuring out e.g. whether it's okay
to use the SSE2 mfence instruction or have to use something else. We
haven't had barriers enabled in host tools before, so there's probably
no need to stat now.

Removed quasiatomic 64-bit calls (now part of Dalvik).

Change-Id: I49e5e6c8abe70f304cdedb9d7b8e6e65f8925815
/system/core/include/cutils/atomic-inline.h