Cross Reference: /external/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

Lines Matching defs:Amt
1256 /// and the shift amount is a constant 'Amt'.  Expand the operation.
1257 void DAGTypeLegalizer::ExpandShiftByConstant(SDNode *N, unsigned Amt,
1270     if (Amt > VTBits) {
1272     } else if (Amt > NVTBits) {
1275                        NVT, InL, DAG.getConstant(Amt-NVTBits, ShTy));
1276     } else if (Amt == NVTBits) {
1279     } else if (Amt == 1 &&
1289       Lo = DAG.getNode(ISD::SHL, DL, NVT, InL, DAG.getConstant(Amt, ShTy));
1292                                    DAG.getConstant(Amt, ShTy)),
1294                                    DAG.getConstant(NVTBits-Amt, ShTy)));
1300     if (Amt > VTBits) {
1303     } else if (Amt > NVTBits) {
1305                        NVT, InH, DAG.getConstant(Amt-NVTBits,ShTy));
1307     } else if (Amt == NVTBits) {
1313                                    DAG.getConstant(Amt, ShTy)),
1315                                    DAG.getConstant(NVTBits-Amt, ShTy)));
1316       Hi = DAG.getNode(ISD::SRL, DL, NVT, InH, DAG.getConstant(Amt, ShTy));
1322   if (Amt > VTBits) {
1325   } else if (Amt > NVTBits) {
1327                      DAG.getConstant(Amt-NVTBits, ShTy));
1330   } else if (Amt == NVTBits) {
1337                                  DAG.getConstant(Amt, ShTy)),
1339                                  DAG.getConstant(NVTBits-Amt, ShTy)));
1340     Hi = DAG.getNode(ISD::SRA, DL, NVT, InH, DAG.getConstant(Amt, ShTy));
1350   SDValue Amt = N->getOperand(1);
1352   EVT ShTy = Amt.getValueType();
1375     Amt = DAG.getNode(ISD::AND, dl, ShTy, Amt,
1382       Hi = DAG.getNode(ISD::SHL, dl, NVT, InL, Amt); // High part from Lo part.
1386       Lo = DAG.getNode(ISD::SRL, dl, NVT, InH, Amt); // Lo part from Hi part.
1391       Lo = DAG.getNode(ISD::SRA, dl, NVT, InH, Amt); // Lo part from Hi part.
1402     SDValue Amt2 = DAG.getNode(ISD::XOR, dl, ShTy, Amt,
1423     Lo = DAG.getNode(N->getOpcode(), dl, NVT, InL, Amt);
1424     Hi = DAG.getNode(ISD::OR, dl, NVT, DAG.getNode(Op1, dl, NVT, InH, Amt),Sh2);
1438   SDValue Amt = N->getOperand(1);
1440   EVT ShTy = Amt.getValueType();
1451   SDValue AmtExcess = DAG.getNode(ISD::SUB, dl, ShTy, Amt, NVBitsNode);
1452   SDValue AmtLack = DAG.getNode(ISD::SUB, dl, ShTy, NVBitsNode, Amt);
1454                                  Amt, NVBitsNode, ISD::SETULT);
1461     LoS = DAG.getNode(ISD::SHL, dl, NVT, InL, Amt);
1463                       DAG.getNode(ISD::SHL, dl, NVT, InH, Amt),
1464     // FIXME: If Amt is zero, the following shift generates an undefined result
1477     HiS = DAG.getNode(ISD::SRL, dl, NVT, InH, Amt);
1479                       DAG.getNode(ISD::SRL, dl, NVT, InL, Amt),
1480     // FIXME: If Amt is zero, the following shift generates an undefined result
1493     HiS = DAG.getNode(ISD::SRA, dl, NVT, InH, Amt);
1495                       DAG.getNode(ISD::SRL, dl, NVT, InL, Amt),
1496     // FIXME: If Amt is zero, the following shift generates an undefined result