Lines Matching defs:newOpc
6795 unsigned newOpc;
6798 case ARM_AM::asr: newOpc = isNarrow ? ARM::tASRrr : ARM::t2ASRrr; break;
6799 case ARM_AM::lsr: newOpc = isNarrow ? ARM::tLSRrr : ARM::t2LSRrr; break;
6800 case ARM_AM::lsl: newOpc = isNarrow ? ARM::tLSLrr : ARM::t2LSLrr; break;
6801 case ARM_AM::ror: newOpc = isNarrow ? ARM::tROR : ARM::t2RORrr; break;
6803 TmpInst.setOpcode(newOpc);
6829 unsigned newOpc;
6832 case ARM_AM::asr: newOpc = isNarrow ? ARM::tASRri : ARM::t2ASRri; break;
6833 case ARM_AM::lsr: newOpc = isNarrow ? ARM::tLSRri : ARM::t2LSRri; break;
6834 case ARM_AM::lsl: newOpc = isNarrow ? ARM::tLSLri : ARM::t2LSLri; break;
6835 case ARM_AM::ror: newOpc = ARM::t2RORri; isNarrow = false; break;
6836 case ARM_AM::rrx: isNarrow = false; newOpc = ARM::t2RRX; break;
6840 TmpInst.setOpcode(newOpc);
6846 if (newOpc != ARM::t2RRX)
7278 unsigned newOpc;
7283 case ARM::ANDrsi: newOpc = ARM::ANDrr; break;
7284 case ARM::ORRrsi: newOpc = ARM::ORRrr; break;
7285 case ARM::EORrsi: newOpc = ARM::EORrr; break;
7286 case ARM::BICrsi: newOpc = ARM::BICrr; break;
7287 case ARM::SUBrsi: newOpc = ARM::SUBrr; break;
7288 case ARM::ADDrsi: newOpc = ARM::ADDrr; break;
7295 TmpInst.setOpcode(newOpc);